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    • 1. 发明申请
    • SYSTEM AND METHOD OF ANALYZING TIMING EFFECTS OF SPATIAL DISTRIBUTION IN CIRCUITS
    • 分析电路中空间分布的时序效应的系统与方法
    • US20070220345A1
    • 2007-09-20
    • US11754625
    • 2007-05-29
    • David HATHAWAYJerry HAYESAnthony POLSON
    • David HATHAWAYJerry HAYESAnthony POLSON
    • G06F11/00
    • G06F17/5031
    • Systems and methods are provided for analyzing the timing of circuits, including integrated circuits, by taking into account the location of cells or elements in the paths or logic cones of the circuit. In one embodiment, a bounding region may be defined around cells or elements of interest, and the size of the bounding region may be used to calculate a timing slack variation factor. The size of the bounding region may be adjusted to account for variability in timing delays. In other embodiments, centroids may be calculated using either the location or the delay-weighted location of elements or cells within the path or cone and the centroids used to calculate timing slack variation factor. The timing slack variation factors are used to calculate a new timing slack for the path or logic cone of the circuit.
    • 提供了系统和方法,用于通过考虑电路的路径或逻辑锥中的单元或元件的位置来分析电路的定时,包括集成电路。 在一个实施例中,可以围绕感兴趣的细胞或元件限定边界区域,并且可以使用边界区域的大小来计算定时松弛变化因子。 可以调整边界区域的大小以考虑定时延迟的变化。 在其他实施例中,可以使用路径或锥体内的元件或单元的位置或延迟加权位置以及用于计算定时松弛变化因子的质心来计算质心。 定时松弛变化因子用于计算电路的路径或逻辑锥的新的定时松弛。
    • 2. 发明申请
    • Corner or edge protector exhibiting improved flexural strength and resistance properties
    • 拐角或边缘保护器具有改善的抗弯强度和抗弯性能
    • US20060243621A1
    • 2006-11-02
    • US11115355
    • 2005-04-27
    • John KruelleJerry Hayes
    • John KruelleJerry Hayes
    • B65D85/20
    • B65D81/054B65D2581/055
    • A new and improved external corner protector is fabricated from predetermined materials and comprises a vertex portion, and a pair of leg members which diverge outwardly at a predetermined included angle with respect to each other from the vertex portion. The vertex portion and distal end portions of the leg members have relatively enlarged cross-sectional dimensions relative to the cross-sectional dimensions comprising those portions of the leg members which integrally interconnect the distal end portions of the leg members to the vertex portion, wherein the relatively enlarged cross-sectional dimensions serve to reinforce the vertex portion and to dispose only such relatively enlarged distal end portions of the leg members into contact with the external side wall members of the palletized load which define the external corner region being protected. In this manner, the leg members of the external corner protector are flexed more than has conventionally been the case such that forces are generated and transmitted to the vertex portion so as to rigidify the same whereby the vertex portion will exhibit enhanced flexural strength and bending resistance properties with respect to external forces which may be impressed upon the external corner protector thereby tending to flex or bend the same.
    • 新的改进的外角保护器由预定材料制成并且包括顶点部分和一对腿部件,其从顶点部分以相对于彼此以预定的夹角向外发散。 腿部件的顶点部分和远端部分相对于横截面尺寸具有相对扩大的横截面尺寸,该横截面尺寸包括将腿部件的远端部分与顶点部分整体连接的腿部件的那些部分,其中, 相对扩大的横截面尺寸用于加强顶点部分,并且仅将腿部构件的相对扩大的远端部分配置成与限定被保护的外角部区域的托盘化载荷的外侧壁构件接触。 以这种方式,外部角部保护器的腿部构件比传统上弯曲得更大,使得力产生并传递到顶点部分以使其刚性化,从而顶部部分将呈现增强的弯曲强度和抗弯曲性 相对于可能施加在外部角部保护器上的外力的特性,从而趋于弯曲或弯曲。
    • 4. 发明申请
    • SLACK SENSITIVITY TO PARAMETER VARIATION BASED TIMING ANALYSIS
    • 对参数变化的时序分析的灵敏度
    • US20080052656A1
    • 2008-02-28
    • US11930924
    • 2007-10-31
    • Eric ForemanPeter HabitzDavid HathawayJerry HayesJeffrey OppoldAnthony Polson
    • Eric ForemanPeter HabitzDavid HathawayJerry HayesJeffrey OppoldAnthony Polson
    • G06F17/50
    • G06F17/5031G06F17/5045
    • A method, system and program product are disclosed for improving an IC design that prioritize failure coefficients of slacks that lead to correction according to their probability of failure. With an identified set of independent parameters, a sensitivity analysis is performed on each parameter by noting the difference in timing, typically on endpoint slacks, when the parameter is varied. This step is repeated for every independent parameter. A failure coefficient is then calculated from the reference slack and the sensitivity of slack for each of the timing endpoints and a determination is made as to whether at least one timing endpoint fails a threshold test. Failing timing endpoints are then prioritized for modification according to their failure coefficients. The total number of runs required is one run that is used as a reference run, plus one additional run for each parameter.
    • 公开了一种用于改进IC设计的方法,系统和程序产品,其优先考虑根据其故障概率导致校正的松弛故障系数。 通过确定的一组独立参数,当参数变化时,通过注意时序上的差异,通常在端点松弛时,对每个参数执行灵敏度分析。 对于每个独立参数重复此步骤。 然后从参考松弛和每个定时端点的松弛的灵敏度计算失效系数,并且确定至少一个定时端点是否失败阈值测试。 然后将失败的定时终点根据其故障系数进行优先级修改。 所需的总运行次数是一次运行,用作参考运行,每个参数再运行一次运行。
    • 6. 发明申请
    • SLACK SENSITIVITY TO PARAMETER VARIATION BASED TIMING ANALYSIS
    • 对参数变化的时序分析的灵敏度
    • US20060101361A1
    • 2006-05-11
    • US10904309
    • 2004-11-03
    • Eric ForemanPeter HabitzDavid HathawayJerry HayesJeffrey OppoldAnthony Polson
    • Eric ForemanPeter HabitzDavid HathawayJerry HayesJeffrey OppoldAnthony Polson
    • G06F17/50G06F9/45
    • G06F17/5031G06F17/5045
    • A method, system and program product are disclosed for improving an IC design that prioritize failure coefficients of slacks that lead to correction according to their probability of failure. With an identified set of independent parameters, a sensitivity analysis is performed on each parameter by noting the difference in timing, typically on endpoint slacks, when the parameter is varied. This step is repeated for every independent parameter. A failure coefficient is then calculated from the reference slack and the sensitivity of slack for each of the timing endpoints and a determination is made as to whether at least one timing endpoint fails a threshold test. Failing timing endpoints are then prioritized for modification according to their failure coefficients. The total number of runs required is one run that is used as a reference run, plus one additional run for each parameter.
    • 公开了一种用于改进IC设计的方法,系统和程序产品,其优先考虑根据其故障概率导致校正的松弛故障系数。 通过确定的一组独立参数,当参数变化时,通过注意时序上的差异,通常在端点松弛时,对每个参数执行灵敏度分析。 对于每个独立参数重复此步骤。 然后从参考松弛和每个定时端点的松弛的灵敏度计算失效系数,并且确定至少一个定时端点是否失败阈值测试。 然后将失败的定时终点根据其故障系数进行优先级修改。 所需的总运行次数是一次运行,用作参考运行,每个参数再运行一次运行。
    • 9. 发明申请
    • METHOD OF GENERATING WIRING ROUTES WITH MATCHING DELAY IN THE PRESENCE OF PROCESS VARIATION
    • 在过程变化存在下产生匹配延迟的接线方法
    • US20060248488A1
    • 2006-11-02
    • US10908102
    • 2005-04-27
    • Peter HabitzDavid HathawayJerry HayesAnthony Polson
    • Peter HabitzDavid HathawayJerry HayesAnthony Polson
    • G06F17/50
    • G06F17/5077
    • A method and service of balancing delay in a circuit design begins with nodes that are to be connected together by a wiring design, or by being supplied with an initial wiring design that is to be altered. The wiring design will have many wiring paths, such as a first wiring path, a second wiring path, etc. Two or more of the wiring paths are designed to have matching timing, such that the time needed for a signal to travel along the first wiring path is about the same time needed for a signal to travel along the second wiring path, the third path, etc. The method/service designs one or all of the wiring paths to make the paths traverse wire segments of about the same length and orientation, within each wiring level that the first wiring path and the second wiring path traverse. Also, this process makes the first wiring path and the second wiring path traverse the wire segments in the same order, within each wiring level that the first wiring path and the second wiring path traverse.
    • 电路设计中的平衡延迟的方法和服务从通过布线设计连接在一起的节点开始,或通过提供要被改变的初始布线设计。 布线设计将具有许多布线路径,例如第一布线路径,第二布线路径等。两条或多条布线路径被设计成具有匹配的定时,使得信号沿着第一布线路径行进所需的时间 信号沿着第二布线路径,第三路径等移动所需的大致相同的时间。该方法/服务设计一个或所有布线路径,以使路径穿过大约相同长度的线段,并且 在第一布线路径和第二布线路径横越的各布线层内。 此外,该处理使得第一布线路径和第二布线路径在第一布线路径和第二布线路径横越的各布线层内以相同的顺序横穿线段。