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1. 发明申请

US20090085162A1 SEMICONDUCTOR DEVICE AND INTEGRATED SEMICONDUCTOR CIRCUIT DEVICE 审中-公开
标题翻译：半导体器件和集成半导体电路器件
公开(公告)号：US20090085162A1
公开(公告)日：2009-04-02
申请号：US12237648
申请日：2008-09-25
申请人： Atsushi Kurokawa , Kenji Sasaki , Isao Obu , Satoshi Suzuki
发明人： Atsushi Kurokawa , Kenji Sasaki , Isao Obu , Satoshi Suzuki
IPC分类号： H01L29/73
CPC分类号： H01L29/045 , H01L27/0207 , H01L29/0692 , H01L29/0817 , H01L29/205 , H01L29/66318 , H01L29/7371
摘要： The present invention provides a semiconductor device that includes a plurality of transistor cells and makes it possible to achieve higher degree of integration and lower cost of an integrated semiconductor circuit device as the first object, and provide an integrated semiconductor circuit device of high density integration and compact construction at a low cost.The semiconductor device includes a plurality of transistor cells each comprising the first layer, the base layer and the second layer formed in this order on the substrate, one of the first layer and the second layer serving as the collector layer and the other serving as the emitter layer, and the first electrode connected to the first layer of each of the transistor cells is formed in the etching trench formed in the first layer, wherein the etching trench has normal mesa surface on the side thereof in the longitudinal direction, and the first electrodes of the plurality of transistor cells are connected each other through a collective wiring that is provided so as to cross the normal mesa surfaces of the trenches of the plurality of transistor cells.
摘要翻译：本发明提供一种半导体器件，其包括多个晶体管单元，并且可以实现作为第一个目的的集成半导体电路器件的更高的集成度和更低的成本，并且提供高密度集成的集成半导体电路器件，紧凑的建筑成本低廉。半导体器件包括多个晶体管单元，每个晶体管单元包括在基板上依次形成的第一层，第一层和第二层，第一层和第二层之一用作集电极层，另一层用作第在第一层中形成的蚀刻沟槽中形成与每个晶体管单元的第一层连接的第一电极，其中蚀刻沟槽在其纵向方向上具有正常的台面表面，并且第一多个晶体管单元的电极通过设置成跨越多个晶体管单元的沟槽的正常台面的集合布线彼此连接。

2. 发明授权

US07723753B2 Semiconductor device and manufacturing method of the same 有权
标题翻译：半导体器件及其制造方法相同
公开(公告)号：US07723753B2
公开(公告)日：2010-05-25
申请号：US11962169
申请日：2007-12-21
申请人： Kenji Sasaki , Ikuro Akazawa , Yoshinori Imamura , Atsushi Kurokawa , Tatsuhiko Ikeda , Hiroshi Inagawa , Yasunari Umemoto , Isao Obu
发明人： Kenji Sasaki , Ikuro Akazawa , Yoshinori Imamura , Atsushi Kurokawa , Tatsuhiko Ikeda , Hiroshi Inagawa , Yasunari Umemoto , Isao Obu
IPC分类号： H01L27/082 , H01L21/331
CPC分类号： H01L21/8252 , H01L23/481 , H01L23/66 , H01L24/03 , H01L24/05 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L27/0605 , H01L29/0619 , H01L29/7371 , H01L29/7811 , H01L2224/04042 , H01L2224/05553 , H01L2224/05556 , H01L2224/05599 , H01L2224/29339 , H01L2224/32225 , H01L2224/45099 , H01L2224/451 , H01L2224/45117 , H01L2224/45144 , H01L2224/45155 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/48599 , H01L2224/49171 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01031 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/01078 , H01L2924/01079 , H01L2924/05042 , H01L2924/10158 , H01L2924/10329 , H01L2924/10336 , H01L2924/1305 , H01L2924/1306 , H01L2924/13064 , H01L2924/13091 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30107 , H01L2924/01032 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： In a GaAs substrate as a semi-insulating substrate, a heterojunction bipolar transistor (HBT) is formed in an element formation region, while an isolation region is formed in an insulating region. The isolation region formed in the insulating region is formed by introducing helium into the same semiconductor layers as the sub-collector semiconductor layer and collector semiconductor layer of the HBT. In an outer peripheral region, a conductive layer is formed to be exposed from protective films and coupled to a back surface electrode. Because a GND potential is supplied to the back surface electrode, the conductive layer is fixed to the GND potential. The conductive layer is formed of the same semiconductor layers as the sub-collector semiconductor layer and collector semiconductor layer of the HBT.
摘要翻译：在作为半绝缘基板的GaAs衬底中，在元件形成区域中形成异质结双极晶体管（HBT），而在绝缘区域中形成隔离区域。通过将氦引入与HBT的副集电极半导体层和集电体半导体层相同的半导体层中而形成在绝缘区域中的隔离区域。在外围区域中，形成导电层以从保护膜露出并耦合到背面电极。由于将GND电位提供给背面电极，所以导电层固定为GND电位。导电层由与HBT的副集电极半导体层和集电极半导体层相同的半导体层形成。

3. 发明申请

US20080224174A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080224174A1
公开(公告)日：2008-09-18
申请号：US11962169
申请日：2007-12-21
申请人： Kenji SASAKI , Ikuro Akazawa , Yoshinori Imamura , Atsushi Kurokawa , Tatsuhiko Ikeda , Hiroshi Inagawa , Yasunari Umemoto , Isao Obu
发明人： Kenji SASAKI , Ikuro Akazawa , Yoshinori Imamura , Atsushi Kurokawa , Tatsuhiko Ikeda , Hiroshi Inagawa , Yasunari Umemoto , Isao Obu
IPC分类号： H01L27/082 , H01L21/331
CPC分类号： H01L21/8252 , H01L23/481 , H01L23/66 , H01L24/03 , H01L24/05 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L27/0605 , H01L29/0619 , H01L29/7371 , H01L29/7811 , H01L2224/04042 , H01L2224/05553 , H01L2224/05556 , H01L2224/05599 , H01L2224/29339 , H01L2224/32225 , H01L2224/45099 , H01L2224/451 , H01L2224/45117 , H01L2224/45144 , H01L2224/45155 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/48599 , H01L2224/49171 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01031 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/01078 , H01L2924/01079 , H01L2924/05042 , H01L2924/10158 , H01L2924/10329 , H01L2924/10336 , H01L2924/1305 , H01L2924/1306 , H01L2924/13064 , H01L2924/13091 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30107 , H01L2924/01032 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A technology which allows an improvement in the moisture resistance of a semiconductor device is provided. In a GaAs substrate as a semi-insulating substrate, a HBT is formed in an element formation region, while an isolation region is formed in an insulating region. The isolation region formed in the insulating region is formed by introducing helium into the same semiconductor layers as the sub-collector semiconductor layer and collector semiconductor layer of the HBT. In an outer peripheral region, a conductive layer is formed to be exposed from protective films and coupled to a back surface electrode. Because a GND potential is supplied to the back surface electrode, the conductive layer is fixed to the GND potential. The conductive layer is formed of the same semiconductor layers as the sub-collector semiconductor layer and collector semiconductor layer of the HBT.
摘要翻译：提供了允许提高半导体器件的耐湿性的技术。在作为半绝缘基板的GaAs衬底中，在元件形成区域中形成HBT，而在绝缘区域中形成隔离区域。形成在绝缘区域中的隔离区域通过将氦引入与HBT的子集电极半导体层和集电极半导体层相同的半导体层中而形成。在外围区域中，形成导电层以从保护膜露出并耦合到背面电极。由于将GND电位提供给背面电极，所以导电层固定为GND电位。导电层由与HBT的副集电极半导体层和集电极半导体层相同的半导体层形成。

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