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1. 发明授权

US06902660B2 Method of manufacturing printed circuit board and multi-layered PCB 失效
标题翻译：制造印刷电路板和多层PCB的方法
公开(公告)号：US06902660B2
公开(公告)日：2005-06-07
申请号：US10231052
申请日：2002-08-30
申请人： Hyuek Jae Lee , Jin Yu
发明人： Hyuek Jae Lee , Jin Yu
IPC分类号： H05K3/00 , C25D5/02 , H05K3/20 , H05K3/38 , H05K3/42 , H05K3/46 , C25D1/00
CPC分类号： H05K3/4617 , C25D5/02 , H05K3/205 , H05K3/384 , H05K3/423 , H05K2201/0154 , H05K2203/0733
摘要： Disclosed is a fabrication method of a printed circuit board, consisting of plating a metal on a pattern-formed metallic substrate to form a conductive metal line; forming a polymer layer as a base substrate over the conductive metal line-formed metallic substrate and drying the formed polymer layer; forming a via hole in the polymer layer, followed by plugging the formed via hole by electroplating; and removing the metallic substrate. The method is advantageous in terms of maximum efficiency of use of the surface area of PCB, and fineness and high integration of circuits because of not requiring an additional etching process.
摘要翻译：公开了一种印刷电路板的制造方法，其包括在图案形成的金属基板上镀金属以形成导电金属线; 在导电金属线形金属基材上形成聚合物层作为基底，干燥所形成的聚合物层; 在聚合物层中形成通孔，然后通过电镀将形成的通孔堵塞; 并去除金属基底。该方法在PCB的表面积的最大使用效率以及电路的细度和高集成度方面是有利的，因为不需要另外的蚀刻工艺。

2. 发明申请

US20090256931A1 Camera module, method of manufacturing the same, and electronic system having the same 审中-公开
标题翻译：相机模块，其制造方法以及具有该相机模块的电子系统
公开(公告)号：US20090256931A1
公开(公告)日：2009-10-15
申请号：US12381489
申请日：2009-03-12
申请人： Chung-Sun Lee , Yong-Hwan Kwon , Un-Byoung Kang , Hyuek-Jae Lee , Woon-Seong Kwon , Hyung-Sun Jang
发明人： Chung-Sun Lee , Yong-Hwan Kwon , Un-Byoung Kang , Hyuek-Jae Lee , Woon-Seong Kwon , Hyung-Sun Jang
IPC分类号： H04N5/76 , H01L21/50 , H04N5/225
CPC分类号： H04N5/2253 , H01L24/97 , H01L2224/05001 , H01L2224/05009 , H01L2224/05124 , H01L2224/05147 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/16 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/3025 , H04N5/2257 , H01L2924/00014
摘要： A camera module, a method of manufacturing the same, and an electronic system having the same are provided. The camera module includes an image sensor chip having an active plane and a backside, a ground wiring extending from a sidewall of the image sensor chip to the backside, a lens structure having a light detector with at least one lens stacked on the active plane, and a conductive housing extending to the ground wiring along with an outer wall of the lens structure excluding the light detector.
摘要翻译：提供了相机模块，其制造方法和具有该相机模块的电子系统。相机模块包括具有活动平面和背面的图像传感器芯片，从图像传感器芯片的侧壁延伸到背面的接地布线，具有至少一个透镜的光检测器的透镜结构，该透镜结构堆叠在主动平面上，以及与除了光检测器之外的透镜结构的外壁一起延伸到接地布线的导电外壳。

3. 发明授权

US06594053B1 Apparatus for controlling cycles of optical pulse stream based on time correlation 有权
标题翻译：基于时间相关控制光脉冲周期的装置
公开(公告)号：US06594053B1
公开(公告)日：2003-07-15
申请号：US09432392
申请日：1999-11-02
申请人： Hyuek Jae Lee , Hae Geun Kim , Jee Yon Choi , Sung Wan Kim
发明人： Hyuek Jae Lee , Hae Geun Kim , Jee Yon Choi , Sung Wan Kim
IPC分类号： H04B1000
CPC分类号： H04B10/299
摘要： An apparatus for controlling cycles of optical pulse streams based on a time correlation is disclosed. The feedback optical pulses and the input optical pulses are subjected to a time interleaving so as to make them not overlapped together, and then they are subjected to a time correlation, thereby considerably reducing the polarized beam dependence of the input optical pulse streams. The apparatus includes a clock generating means for generating clocks, and an optical pulse generating means for receiving the clocks from the clock generating means to generate optical pulses in synchronization with the pulses of the clock generating means. An input optical pulse distributing means distributes the feedback optical pulses of an output optical pulse distributing means, and distributes the optical pulses of the optical pulse generating means. A time correlation means correlates the time of optical pulses of the input optical pulse distributing means, and an optical pulse transferring/processing means amplifies and filters the optical pulses of the time correlation means to attenuate them. An output optical distributing means distributes the optical pulses of the optical pulse transferring/ processing means.
摘要翻译：公开了一种用于基于时间相关来控制光脉冲流周期的装置。对反馈光脉冲和输入光脉冲进行时间交织，使它们不重叠在一起，然后对它们进行时间相关，从而大大降低了输入光脉冲流的偏振光束依赖性。该装置包括用于产生时钟的时钟产生装置和用于从时钟产生装置接收时钟以产生与时钟发生装置的脉冲同步的光脉冲的光脉冲发生装置。输入光脉冲分配装置分配输出光脉冲分配装置的反馈光脉冲，并分配光脉冲发生装置的光脉冲。时间相关装置使输入光脉冲分配装置的光脉冲的时间相关，并且光脉冲传送/处理装置对时间相关装置的光脉冲进行放大和滤波以对其进行衰减。输出光分配装置分配光脉冲传送/处理装置的光脉冲。

4. 发明申请

US20160082569A1 RETAINER AND WAFER CARRIER INCLUDING THE SAME 审中-公开
标题翻译：保持架和滚动架，包括它们
公开(公告)号：US20160082569A1
公开(公告)日：2016-03-24
申请号：US14729030
申请日：2015-06-02
申请人： Sang-Hyun BAE , Kyu-Dong JUNG , Il-Hwan KIM , Jung-Hwan KIM , Hyuek-Jae LEE , Tae-Je CHO
发明人： Sang-Hyun BAE , Kyu-Dong JUNG , Il-Hwan KIM , Jung-Hwan KIM , Hyuek-Jae LEE , Tae-Je CHO
IPC分类号： B24B37/32
CPC分类号： B24B37/32
摘要： A retainer for a wafer carrier comprising: a body including a plurality of slots configured to receive side surfaces of wafers; and for each of the slots, a supporting structure formed on a sidewall of the slot and configured to make contact with the side surfaces of a corresponding wafer, the supporting structure being spaced apart from an upper corner of the side surface of the corresponding wafer.
摘要翻译：一种用于晶片载体的保持器，包括：主体，其包括被配置为接收晶片的侧表面的多个槽; 并且对于每个狭槽，形成在所述槽的侧壁上并被配置为与相应晶片的侧表面接触的支撑结构，所述支撑结构与相应晶片的侧表面的上角隔开。

5. 发明授权

US08563349B2 Method of forming semiconductor device 有权
标题翻译：半导体器件形成方法
公开(公告)号：US08563349B2
公开(公告)日：2013-10-22
申请号：US13281870
申请日：2011-10-26
申请人： Jong-Yun Myung , Hyuek-Jae Lee , Ji-Sun Hong , Tae-Je Cho , Un-Byoung Kang , Hyung-Sun Jang , Eun-Mi Kim , Jung-Hwan Kim , Tae-Hong Min
发明人： Jong-Yun Myung , Hyuek-Jae Lee , Ji-Sun Hong , Tae-Je Cho , Un-Byoung Kang , Hyung-Sun Jang , Eun-Mi Kim , Jung-Hwan Kim , Tae-Hong Min
IPC分类号： H01L21/00
CPC分类号： H01L21/78 , H01L21/6836 , H01L21/76898 , H01L23/3128 , H01L24/05 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L27/1464 , H01L2221/68327 , H01L2224/0401 , H01L2224/05009 , H01L2224/05611 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/05666 , H01L2224/05684 , H01L2224/13007 , H01L2224/13022 , H01L2224/13025 , H01L2224/131 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/12043 , H01L2924/15311 , H01L2924/014 , H01L2924/00
摘要： A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.
摘要翻译：一种形成半导体器件的方法包括制备其上形成有多个芯片的半导体衬底和设置在芯片之间的划线，同时形成在划线中具有第一深度的凹槽，以及穿透芯片的通孔，并具有第二个深度。芯片沿凹槽分开。第一深度小于第二深度。

6. 发明授权

US08304288B2 Methods of packaging semiconductor devices including bridge patterns 失效
标题翻译：包括桥模式的半导体器件的封装方法
公开(公告)号：US08304288B2
公开(公告)日：2012-11-06
申请号：US13155647
申请日：2011-06-08
申请人： Hyuek-Jae Lee , Ji-Sun Hong , Tae-Je Cho , Jong-Yun Myung , Young-Bok Kim , Hyung-Sun Jang , Eun-Mi Kim
发明人： Hyuek-Jae Lee , Ji-Sun Hong , Tae-Je Cho , Jong-Yun Myung , Young-Bok Kim , Hyung-Sun Jang , Eun-Mi Kim
IPC分类号： H01L21/00
CPC分类号： H01L21/76898 , H01L27/14618 , H01L27/14683 , H01L2224/13
摘要： A method of packaging a semiconductor device may include providing a semiconductor substrate including first and second spaced apart semiconductor chip areas, and adhering a cover on the first and second spaced apart semiconductor chip areas of the semiconductor substrate. A scribe line may be formed through the semiconductor substrate between the first and second semiconductor chip areas with a semiconductor bridge pattern remaining connected between the first and second spaced apart semiconductor chip areas after forming the scribe line. The cover and the semiconductor bridge pattern may then be cut after forming the scribe line.
摘要翻译：封装半导体器件的方法可以包括提供包括第一和第二间隔开的半导体芯片区域的半导体衬底，以及将覆盖物粘附在半导体衬底的第一和第二间隔的半导体芯片区域上。可以在第一和第二半导体芯片区域之间通过半导体衬底形成划线，在形成划线之后，半导体电桥图案保持连接在第一和第二间隔开的半导体芯片区域之间。然后可以在形成划线之后切割盖和半导体桥模式。

7. 发明申请

US20120156823A1 METHOD OF FORMING SEMICONDUCTOR DEVICE 有权
标题翻译：形成半导体器件的方法
公开(公告)号：US20120156823A1
公开(公告)日：2012-06-21
申请号：US13281870
申请日：2011-10-26
申请人： Jong-Yun MYUNG , Hyuek-Jae Lee , Ji-Sun Hong , Tae-Je Cho , Un-Byoung Kang , Hyung-Sun Jang , Eun-Mi Kim , Jung-Hwan Kim , Tae-Hong Min
发明人： Jong-Yun MYUNG , Hyuek-Jae Lee , Ji-Sun Hong , Tae-Je Cho , Un-Byoung Kang , Hyung-Sun Jang , Eun-Mi Kim , Jung-Hwan Kim , Tae-Hong Min
IPC分类号： H01L31/18 , H01L21/50 , H01L21/78
CPC分类号： H01L21/78 , H01L21/6836 , H01L21/76898 , H01L23/3128 , H01L24/05 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L27/1464 , H01L2221/68327 , H01L2224/0401 , H01L2224/05009 , H01L2224/05611 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/05666 , H01L2224/05684 , H01L2224/13007 , H01L2224/13022 , H01L2224/13025 , H01L2224/131 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/12043 , H01L2924/15311 , H01L2924/014 , H01L2924/00
摘要： A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.
摘要翻译：一种形成半导体器件的方法包括制备其上形成有多个芯片的半导体衬底和设置在芯片之间的划线，同时形成在划线中具有第一深度的凹槽，以及穿透芯片的通孔，并具有第二个深度。芯片沿凹槽分开。第一深度小于第二深度。

8. 发明申请

US20110306167A1 Methods of Packaging Semiconductor Devices Including Bridge Patterns 失效
标题翻译：包括桥模式的半导体器件的封装方法
公开(公告)号：US20110306167A1
公开(公告)日：2011-12-15
申请号：US13155647
申请日：2011-06-08
申请人： Hyuek-Jae Lee , Ji-Sun Hong , Tae-je Cho , Jong-Yun Myung , Young-Bok Kim , Hyung-Sun Jang , Eun-Mi Kim
发明人： Hyuek-Jae Lee , Ji-Sun Hong , Tae-je Cho , Jong-Yun Myung , Young-Bok Kim , Hyung-Sun Jang , Eun-Mi Kim
IPC分类号： H01L21/782
CPC分类号： H01L21/76898 , H01L27/14618 , H01L27/14683 , H01L2224/13
摘要： A method of packaging a semiconductor device may include providing a semiconductor substrate including first and second spaced apart semiconductor chip areas, and adhering a cover on the first and second spaced apart semiconductor chip areas of the semiconductor substrate. A scribe line may be formed through the semiconductor substrate between the first and second semiconductor chip areas with a semiconductor bridge pattern remaining connected between the first and second spaced apart semiconductor chip areas after forming the scribe line. The cover and the semiconductor bridge pattern may then be cut after forming the scribe line.
摘要翻译：封装半导体器件的方法可以包括提供包括第一和第二间隔开的半导体芯片区域的半导体衬底，以及将覆盖物粘附在半导体衬底的第一和第二间隔的半导体芯片区域上。可以在第一和第二半导体芯片区域之间通过半导体衬底形成划线，在形成划线之后，半导体电桥图案保持连接在第一和第二间隔开的半导体芯片区域之间。然后可以在形成划线之后切割盖和半导体桥模式。

9. 发明授权

US07884392B2 Image sensor having through via 有权
标题翻译：图像传感器具有通孔
公开(公告)号：US07884392B2
公开(公告)日：2011-02-08
申请号：US12362210
申请日：2009-01-29
申请人： Hyuek-Jae Lee , Tae-Je Cho , Yong-Hwan Kwon , Un-Byoung Kang , Chung-Sun Lee , Woon-Seong Kwon , Hyung-Sun Jang
发明人： Hyuek-Jae Lee , Tae-Je Cho , Yong-Hwan Kwon , Un-Byoung Kang , Chung-Sun Lee , Woon-Seong Kwon , Hyung-Sun Jang
IPC分类号： H01L31/0328
CPC分类号： H01L27/14623 , H01L27/14618 , H01L27/14636 , H01L2224/02372 , H01L2224/05001 , H01L2224/05009 , H01L2224/05023 , H01L2224/05548 , H01L2224/05624 , H01L2224/05666 , H01L2224/05671 , H01L2224/13 , H01L2924/00014 , H01L2224/05099
摘要： One embodiment exemplarily described herein can be characterized as an image sensor including a substrate having a front surface and a rear surface; a photoelectric converting portion on the front surface of the substrate; a through via extending through the substrate, wherein the through via is electrically connected to the photoelectric converting portion; an external connection terminal on the rear surface of the substrate, wherein the external connection terminal is connected to the through via; and a light shading layer formed on a portion of the rear surface of the substrate, wherein the light shading layer is substantially opaque with respect to an external light. In some embodiments, the portion of the rear surface of the substrate on which the light shading layer is formed is not overlapped by the through via or the external connection terminal.
摘要翻译：本文示例性描述的一个实施例可以被表征为包括具有前表面和后表面的基板的图像传感器; 在所述基板的前表面上的光电转换部; 贯穿所述基板延伸的通孔，其中所述通孔电连接到所述光电转换部分; 在所述基板的后表面上的外部连接端子，其中所述外部连接端子连接到所述通孔; 以及形成在所述基板的后表面的一部分上的遮光层，其中所述遮光层相对于外部光基本上是不透明的。在一些实施例中，其上形成有遮光层的基板的后表面的部分不与通孔或外部连接端子重叠。

10. 发明申请

US20090200632A1 IMAGE SENSOR HAVING THROUGH VIA 有权
标题翻译：图像传感器通过通过
公开(公告)号：US20090200632A1
公开(公告)日：2009-08-13
申请号：US12362210
申请日：2009-01-29
申请人： Hyuek-Jae LEE , Tae-Je CHO , Yong-Hwan KWON , Un-Byoung KANG , Chung-Sun LEE , Woon-Seong KWON , Hyung-Sun JANG
发明人： Hyuek-Jae LEE , Tae-Je CHO , Yong-Hwan KWON , Un-Byoung KANG , Chung-Sun LEE , Woon-Seong KWON , Hyung-Sun JANG
IPC分类号： H01L27/146
CPC分类号： H01L27/14623 , H01L27/14618 , H01L27/14636 , H01L2224/02372 , H01L2224/05001 , H01L2224/05009 , H01L2224/05023 , H01L2224/05548 , H01L2224/05624 , H01L2224/05666 , H01L2224/05671 , H01L2224/13 , H01L2924/00014 , H01L2224/05099
摘要： One embodiment exemplarily described herein can be characterized as an image sensor including a substrate having a front surface and a rear surface; a photoelectric converting portion on the front surface of the substrate; a through via extending through the substrate, wherein the through via is electrically connected to the photoelectric converting portion; an external connection terminal on the rear surface of the substrate, wherein the external connection terminal is connected to the through via; and a light shading layer formed on a portion of the rear surface of the substrate, wherein the light shading layer is substantially opaque with respect to an external light. In some embodiments, the portion of the rear surface of the substrate on which the light shading layer is formed is not overlapped by the through via or the external connection terminal.
摘要翻译：本文示例性描述的一个实施例可以被表征为包括具有前表面和后表面的基板的图像传感器; 在所述基板的前表面上的光电转换部; 贯穿所述基板延伸的通孔，其中所述通孔电连接到所述光电转换部分; 在所述基板的后表面上的外部连接端子，其中所述外部连接端子连接到所述通孔; 以及形成在所述基板的后表面的一部分上的遮光层，其中所述遮光层相对于外部光基本上是不透明的。在一些实施例中，其上形成有遮光层的基板的后表面的部分不与通孔或外部连接端子重叠。

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