专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09525410B2 Power management chips and power management devices including the same 有权
标题翻译：电源管理芯片和电源管理设备包括相同
公开(公告)号：US09525410B2
公开(公告)日：2016-12-20
申请号：US13588488
申请日：2012-08-17
申请人： Ho-jung Kim , Jai-kwang Shin , U-in Chung , Hyun-sik Choi
发明人： Ho-jung Kim , Jai-kwang Shin , U-in Chung , Hyun-sik Choi
IPC分类号： H03K17/687 , H02M1/08 , H02M3/337 , H01L29/778 , H01L29/16 , H01L29/20 , H01L21/82 , H01L21/8252
CPC分类号： H03K17/687 , H01L21/8213 , H01L21/8252 , H01L29/1608 , H01L29/2003 , H01L29/7787 , H02M1/08 , H02M3/337 , H03K2217/0036 , H03K2217/0063 , H03K2217/0072 , H03K2217/0081
摘要： A power management chip and a power management device including the power management chip. The power management chip includes at least one power switch and a driver unit for generating a driving signal for driving the at least one power switch, the driver unit including one or more circuit units formed on a same substrate as the at least one power switch.
摘要翻译：电源管理芯片和包括电源管理芯片的电源管理装置。电源管理芯片包括至少一个电源开关和驱动器单元，用于产生用于驱动至少一个电源开关的驱动信号，所述驱动器单元包括形成在与所述至少一个电源开关相同的基板上的一个或多个电路单元。

2. 发明授权

US09450071B2 Field effect semiconductor devices and methods of manufacturing field effect semiconductor devices 有权
标题翻译：场效应半导体器件及制造场效半导体器件的方法
公开(公告)号：US09450071B2
公开(公告)日：2016-09-20
申请号：US12923266
申请日：2010-09-13
申请人： Ki-ha Hong , Jong-seob Kim , Jae-joon Oh , Jai-kwang Shin , Hyuk-soon Choi , In-jun Hwang , Ho-jung Kim
发明人： Ki-ha Hong , Jong-seob Kim , Jae-joon Oh , Jai-kwang Shin , Hyuk-soon Choi , In-jun Hwang , Ho-jung Kim
IPC分类号： H01L29/66 , H01L29/423 , H01L29/778 , H01L29/20
CPC分类号： H01L29/66462 , H01L29/2003 , H01L29/42316 , H01L29/7787
摘要： Field effect semiconductor devices and methods of manufacturing the same are provided, the field effect semiconductor devices include a second semiconductor layer on a first surface of a first semiconductor layer, a first and a second third semiconductor layer respectively on two sides of the second semiconductor layer, a source and a drain respectively on the first and second third semiconductor layer, and a gate electrode on a second surface of the first semiconductor layer.
摘要翻译：提供了场效应半导体器件及其制造方法，场效应半导体器件包括在第一半导体层的第一表面上的第二半导体层，以及分别在第二半导体层的两侧上的第一和第二第三半导体层，分别在第一和第二第三半导体层上的源极和漏极，以及在第一半导体层的第二表面上的栅电极。

3. 发明授权

US08963580B2 Logic device and method of operating the same 有权
标题翻译：逻辑器件及其操作方法
公开(公告)号：US08963580B2
公开(公告)日：2015-02-24
申请号：US13597732
申请日：2012-08-29
申请人： Hyun-sik Choi , Ho-jung Kim , Ki-chul Kim , Jai-kwang Shin , Joong-ho Choi , Hyung-su Jeong
发明人： Hyun-sik Choi , Ho-jung Kim , Ki-chul Kim , Jai-kwang Shin , Joong-ho Choi , Hyung-su Jeong
IPC分类号： H03K19/173 , H03K19/177
CPC分类号： H03K19/17756
摘要： A logic device may include a first functional block, the first functional block including, a first storage block, a second storage block, and a first function controller. In a first operation time period, the first function controller may be configured to receive a first configuration selection signal and a first configuration command signal that instructs a first function be configured, select the first storage block as a configured storage block in the first operation time period based on the first configuration selection signal, and configure the first function in the first storage block based on the first configuration command signal.
摘要翻译：逻辑设备可以包括第一功能块，第一功能块包括第一存储块，第二存储块和第一功能控制器。在第一操作时间段中，第一功能控制器可以被配置为接收第一配置选择信号和指示第一功能的第一配置命令信号，在第一操作时间中选择第一存储块作为配置的存储块基于第一配置选择信号，并且基于第一配置命令信号来配置第一存储块中的第一功能。

4. 发明授权

US08680605B2 Stacked memory devices and method of manufacturing the same 有权
标题翻译：堆叠式存储器件及其制造方法
公开(公告)号：US08680605B2
公开(公告)日：2014-03-25
申请号：US13112443
申请日：2011-05-20
申请人： Sang-hun Jeon , Ho-jung Kim
发明人： Sang-hun Jeon , Ho-jung Kim
IPC分类号： H01L29/792 , H01L21/336 , G11C16/04
CPC分类号： H01L27/11551 , G11C16/0483 , H01L27/11519 , H01L27/11526 , H01L27/11556 , H01L27/11565 , H01L27/11573 , H01L27/11575 , H01L27/11578 , H01L29/7889 , H01L29/7926
摘要： A stacked memory device may include at least one memory unit and at least one peripheral circuit unit arranged either above or below the at least one memory unit. The at least one memory unit may include a memory string array, a plurality of bit lines, and a plurality of string selection pads. The memory string may include a plurality of memory strings arranged in a matrix and each of the memory strings may include a plurality of memory cells and a string selection device arranged perpendicular to a substrate. The plurality of bit lines may extend in a first direction and may be connected to ends of the plurality of memory strings. The plurality of string selection pads may be arrayed in a single line along the first direction and may be connected to the string selection devices included in the plurality of memory strings.
摘要翻译：堆叠式存储器件可以包括至少一个存储器单元和布置在至少一个存储器单元的上方或下方的至少一个外围电路单元。所述至少一个存储器单元可以包括存储器串阵列，多个位线以及多个串选择焊盘。存储器串可以包括排列成矩阵的多个存储器串，并且每个存储器串可以包括多个存储单元和垂直于衬底布置的串选择装置。多个位线可以在第一方向上延伸并且可以连接到多个存储器串的端部。多个串选择板可以沿着第一方向排列成单行，并且可以连接到包括在多个存储器串中的串选择装置。

5. 发明授权

US08509430B2 Storage devices having a security function and methods of securing data stored in the storage device 有权
标题翻译：具有安全功能的存储设备和保存存储在存储设备中的数据的方法
公开(公告)号：US08509430B2
公开(公告)日：2013-08-13
申请号：US12923375
申请日：2010-09-17
申请人： Ho-jung Kim , In-kyeong Yoo , Jai-kwang Shin
发明人： Ho-jung Kim , In-kyeong Yoo , Jai-kwang Shin
IPC分类号： H04L29/06
CPC分类号： G06F21/85 , G06F21/78 , G11C7/24 , G11C11/005 , G11C13/0002 , G11C13/0059 , G11C14/009
摘要： A storage device may include a storage unit that stores data transmitted via a plurality of first wires; and a security control unit that controls connection between each of a plurality of second wires connected to an external device and each of the plurality of first wires by programming a plurality of switching devices according to an encryption key.
摘要翻译：存储装置可以包括：存储单元，存储经由多条第一布线发送的数据; 以及安全控制单元，其通过根据加密密钥对多个交换设备进行编程来控制连接到外部设备的多个第二线路中的每一个与所述多条第一线路中的每一条线路之间的连接。

6. 发明授权

US08503220B2 Semiconductor device and method of sensing data of the semiconductor device 有权
标题翻译：用于检测半导体器件的数据的半导体器件和方法
公开(公告)号：US08503220B2
公开(公告)日：2013-08-06
申请号：US13233304
申请日：2011-09-15
申请人： Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi , Hyung-su Jeong
发明人： Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi , Hyung-su Jeong
IPC分类号： G11C11/00
CPC分类号： G11C7/12 , G11C7/04 , G11C7/062 , G11C11/56 , G11C11/5642 , G11C11/5678 , G11C11/5685 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0016 , G11C13/0021 , G11C13/0026 , G11C13/004 , G11C2207/002
摘要： In one example embodiment, the semiconductor device includes a memory cell array having at least one memory cell disposed in a region at which at least one bit line and at least one word line cross. A sensing unit senses data stored in the at least one memory cell. The sensing unit includes a connection control unit configured to control a connection between the at least one bit line and a sensing line based on a control signal, the control signal having a voltage level that varies based on a value of data being sensed by the sensing unit.
摘要翻译：在一个示例性实施例中，半导体器件包括存储单元阵列，其具有设置在至少一个位线和至少一个字线交叉的区域中的至少一个存储单元。感测单元感测存储在至少一个存储单元中的数据。感测单元包括连接控制单元，其被配置为基于控制信号来控制至少一个位线和感测线之间的连接，所述控制信号具有基于由感测感测的数据的值而变化的电压电平单元。

7. 发明授权

US08406029B2 Identification of data positions in magnetic packet memory storage devices, memory systems including such devices, and methods of controlling such devices 有权
标题翻译：识别磁包存储器存储设备中的数据位置，包括这种设备的存储器系统以及控制这些设备的方法
公开(公告)号：US08406029B2
公开(公告)日：2013-03-26
申请号：US12658859
申请日：2010-02-16
申请人： Ho-jung Kim , Chul-woo Park , Sang-beom Kang , Jong-wan Kim , Hyun-ho Choi , Young-pil Kim , Sung-chul Lee
发明人： Ho-jung Kim , Chul-woo Park , Sang-beom Kang , Jong-wan Kim , Hyun-ho Choi , Young-pil Kim , Sung-chul Lee
IPC分类号： G11C19/00
CPC分类号： G11C19/0808 , G11C11/14 , G11C19/0841
摘要： In a memory device and in a method for controlling a memory device, the memory device comprises a magnetic structure that stores information in a plurality of domains of the magnetic structure. A read unit reads information from at least one of the plurality of domains of the magnetic structure by applying a read current to the magnetic structure. A position detector unit compares the information read by a read current from the read unit from multiple domains of the plurality of domains of the magnetic structure to identify the presence of an expected information pattern at select domains of the plurality of domains.
摘要翻译：在存储器装置和用于控制存储器件的方法中，存储器件包括将结构存储在磁性结构的多个域中的磁性结构。读取单元通过向磁性结构施加读取电流来从磁性结构的多个域中的至少一个域读取信息。位置检测器单元将来自读取单元的读取电流读取的信息与磁性结构的多个域的多个域进行比较，以识别多个域的选定域处的预期信息模式的存在。

8. 发明授权

US08369173B2 Semiconductor devices and methods for changing operating characteristics and semiconductor systems including the same 有权
标题翻译：用于改变工作特性的半导体器件和方法以及包括其的半导体系统
公开(公告)号：US08369173B2
公开(公告)日：2013-02-05
申请号：US12706756
申请日：2010-02-17
申请人： Ho Jung Kim , Chul Woo Park , Sang Beom Kang , Hyun Ho Choi , Jung Min Lee , Seung Eon Ahn
发明人： Ho Jung Kim , Chul Woo Park , Sang Beom Kang , Hyun Ho Choi , Jung Min Lee , Seung Eon Ahn
IPC分类号： G11C7/00
CPC分类号： G11C5/14 , G11C5/147 , G11C7/22 , G11C8/08 , G11C8/10 , G11C16/04 , G11C16/20 , G11C29/02 , G11C29/021 , G11C29/023 , G11C29/028 , G11C2029/4402 , G11C2207/2254
摘要： A method of changing a parameter in a semiconductor device is provided. The method includes receiving and storing data in a storage region; and changing at least one between a DC characteristic and an AC timing characteristic of a parameter, used to access a non-volatile memory cell included in a memory core of the semiconductor device, according to the data stored in the storage.
摘要翻译：提供了一种改变半导体器件中的参数的方法。该方法包括在存储区域中接收和存储数据; 以及根据存储在存储器中的数据，在用于访问包括在半导体器件的存储器核心中的非易失性存储单元的参数的DC特性和AC定时特性之间改变至少一个。

9. 发明申请

US20120326747A1 RECONFIGURABLE LOGIC DEVICE 审中-公开
标题翻译：可重构逻辑器件
公开(公告)号：US20120326747A1
公开(公告)日：2012-12-27
申请号：US13449778
申请日：2012-04-18
申请人： Hyun-su Jeong , Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi
发明人： Hyun-su Jeong , Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi
IPC分类号： H03K19/173
CPC分类号： G11C13/003 , G11C13/0007 , G11C2213/79 , G11C2213/82
摘要： A logic device that includes a plurality of non-volatile memory cells configured to store possible output results related to the input signal. The logic device generating an output signal by selecting and accessing one of the plurality of non-volatile memory cells based on the input signal.
摘要翻译：一种逻辑设备，包括多个非易失性存储器单元，其被配置为存储与输入信号有关的可能的输出结果。逻辑装置通过基于输入信号选择和访问多个非易失性存储器单元之一来产生输出信号。

10. 发明授权

US08301835B2 Apparatuses and methods providing redundant array of independent disks access to non-volatile memory chips 有权
标题翻译：提供独立磁盘的冗余阵列访问非易失性存储器芯片的装置和方法
公开(公告)号：US08301835B2
公开(公告)日：2012-10-30
申请号：US12713559
申请日：2010-02-26
申请人： Ho Jung Kim
发明人： Ho Jung Kim
IPC分类号： G06F12/00
CPC分类号： G06F3/0658 , G06F3/0619 , G06F3/0688 , G06F11/108
摘要： A controller may include a RAID controller and an access controller. The RAID controller exchanges data with a host and select ones of a plurality of RAID levels responsive to RAID level information. The access controller is connected to the RAID controller and to a plurality of channels that are each connected to a plurality of non-volatile memory chips. The access controller accesses data in at least one of the non-volatile memory chips connected to each of the channels according to the selected RAID level. The controller may alternatively or additionally include a storage device and a main processor. The main processor is configured to logically partition a plurality of non-volatile memory chips that are connected to each of a plurality of channels into a normal partition region and a RAID level partition region, where data access is performed according to a selected RAID level, in response partition information that is stored in the storage device.
摘要翻译：控制器可以包括RAID控制器和访问控制器。 RAID控制器与主机交换数据，并根据RAID级别信息选择多个RAID级别中的一个。访问控制器连接到RAID控制器和连接到多个非易失性存储器芯片的多个通道。访问控制器根据所选择的RAID级别访问连接到每个信道的至少一个非易失性存储器芯片中的数据。控制器可以可选地或另外包括存储设备和主处理器。主处理器被配置为将连接到多个通道中的每一个的多个非易失性存储器芯片逻辑地分割成正常分区区域和RAID级别分区区域，其中根据所选择的RAID级别执行数据访问，在存储在存储设备中的响应分区信息中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式