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    • 5. 发明申请
    • Verification method for nonvolatile semiconductor memory device
    • 非易失性半导体存储器件的验证方法
    • US20070230249A1
    • 2007-10-04
    • US11729216
    • 2007-03-28
    • Hiroyuki MiyakiMitsuaki OsameAya Miyazaki
    • Hiroyuki MiyakiMitsuaki OsameAya Miyazaki
    • G11C11/34G11C16/06
    • G11C16/3436G11C16/26
    • The present invention provides nonvolatile semiconductor memory devices which operate with low power consumption. In a nonvolatile semiconductor memory device, a plurality of nonvolatile memory elements are connected in series. The plurality of nonvolatile memory elements include a semiconductor layer including a channel forming region and a control gate provided to overlap with the channel forming region. Operations of write, erase, a first read, and a second read in a verify operation of data to the nonvolatile memory elements, are conducted by changing voltage to the control gates of the nonvolatile memory elements. The second read in the verify operation after erase operation is conducted by changing only one of a potential of the control gate of a nonvolatile memory element which are selected from the plurality of nonvolatile memory elements, and as the potential, a potential different from a potential of the first read is used.
    • 本发明提供了以低功耗工作的非易失性半导体存储器件。 在非易失性半导体存储器件中,多个非易失性存储元件串联连接。 多个非易失性存储元件包括包括沟道形成区域的半导体层和设置成与沟道形成区域重叠的控制栅极。 通过将电压改变为非易失性存储器元件的控制栅极来进行对非易失性存储器元件的数据的验证操作的写入,擦除,第一读取和第二次读取操作。 在擦除操作之后的验证操作中的第二次读取是通过仅改变从多个非易失性存储元件中选择的非易失性存储元件的控制栅极的电位中的一个,并且作为电势,与电位不同的电位 的第一次读取被使用。