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    • 3. 发明申请
    • Polishing composition for a semiconductor substrate
    • 半导体衬底抛光组合物
    • US20070084828A1
    • 2007-04-19
    • US11546427
    • 2006-10-12
    • Yasuhiro YonedaMami ShirotaHaruki NojoHirofumi Kashihara
    • Yasuhiro YonedaMami ShirotaHaruki NojoHirofumi Kashihara
    • C09K13/00H01L21/461C03C15/00B44C1/22H01L21/302
    • H01L21/31053C03C19/00C09G1/02C09K3/1436C09K3/1463
    • A polishing composition for a semiconductor substrate comprising dihydroxyethylglycine, ceria particles, a dispersant, and an aqueous medium, wherein the ceria particles are contained in an amount of from 2 to 22% by weight of the polishing composition, and the dispersant is contained in an amount of from 0.001 to 1.0% by weight of the polishing composition; a polishing process of a semiconductor substrate with the polishing composition for a semiconductor substrate; and a method for manufacturing a semiconductor device including the step of polishing a substrate to be polished in accordance with the polishing process. The polishing composition is used, for example, for the steps of subjecting to shallow trench isolation, subjecting an interlayer dielectric to planarization, forming an embedded metal line, forming an embedded capacitor, and the like. Especially, the method is suitable for the step of shallow trench isolation or the step of subjecting an interlayer dielectric to planarization, and preferably used for manufacturing a semiconductor device such as memory ICs, logic ICs, or system LSIs.
    • 一种用于半导体衬底的抛光组合物,其包含二羟基乙基甘氨酸,二氧化铈颗粒,分散剂和水性介质,其中二氧化铈颗粒的含量为抛光组合物的2至22重量%,并且分散剂包含在 的量为抛光组合物的0.001〜1.0重量% 具有半导体衬底的抛光组合物的半导体衬底的抛光工艺; 以及一种用于制造半导体器件的方法,包括根据抛光工艺抛光待抛光的基底的步骤。 抛光组合物例如用于进行浅沟槽隔离,使层间电介质平坦化,形成嵌入金属线,形成嵌入式电容器等的步骤。 特别地,该方法适用于浅沟槽隔离的步骤或使层间电介质平坦化的步骤,并且优选用于制造诸如存储器IC,逻辑IC或系统LSI的半导体器件。