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1. 发明授权

US08237281B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08237281B2
公开(公告)日：2012-08-07
申请号：US12984142
申请日：2011-01-04
申请人： Koji Takemura , Hiroshige Hirano , Yutaka Itoh , Hikari Sano , Masao Takahashi , Koji Koike
发明人： Koji Takemura , Hiroshige Hirano , Yutaka Itoh , Hikari Sano , Masao Takahashi , Koji Koike
IPC分类号： H01L23/495
CPC分类号： H01L23/585 , H01L21/76832 , H01L23/522 , H01L23/53295 , H01L23/562 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.
摘要翻译：一种半导体器件包括在半导体衬底上的层间绝缘膜中堆叠的至少三个或更多个布线层，设置在半导体衬底的芯片区域的外周处的密封环和在芯片区域的一部分中提供的芯片强度增强靠近密封圈。芯片强度加强件由多个虚拟布线结构构成，并且多个虚设布线结构中的每一个形成为跨越两个或更多个布线层中的两个或更多个布线层，包括最下面的布线层和最上面的布线层使用通孔部分。

2. 发明授权

US08164163B2 Semiconductor device having sealing ring 有权
标题翻译：具有密封环的半导体器件
公开(公告)号：US08164163B2
公开(公告)日：2012-04-24
申请号：US12029969
申请日：2008-02-12
申请人： Koji Takemura , Hiroshige Hirano , Yutaka Itoh , Hikari Sano , Koji Koike
发明人： Koji Takemura , Hiroshige Hirano , Yutaka Itoh , Hikari Sano , Koji Koike
IPC分类号： H01L23/544
CPC分类号： H01L23/585 , H01L23/562 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: an interlayer insulating film formed on a substrate; a wiring formed in the interlayer insulating film in a chip region of the substrate; a seal ring formed in the interlayer insulating film in a periphery of the chip region and continuously surrounding the chip region; and a first protective film formed on the interlayer insulating film having the wiring and the seal ring formed therein. A first opening is formed in the first protective film in a region located outside the seal ring when viewed from the chip region, and the interlayer insulating film is exposed in the first opening.
摘要翻译：半导体器件包括：形成在衬底上的层间绝缘膜; 在衬底的芯片区域中的层间绝缘膜中形成的布线; 密封环，形成在所述芯片区域的周围的所述层间绝缘膜中，并且连续地围绕所述芯片区域; 以及形成在其上形成有布线和密封环的层间绝缘膜上的第一保护膜。当从芯片区域观察时，在位于密封环外侧的区域中的第一保护膜中形成第一开口，并且层间绝缘膜在第一开口中露出。

3. 发明授权

US08134231B2 Semiconductor chip and semiconductor device 有权
标题翻译：半导体芯片和半导体器件
公开(公告)号：US08134231B2
公开(公告)日：2012-03-13
申请号：US12348543
申请日：2009-01-05
申请人： Hikari Sano , Yoshihiro Tomita , Takahiro Nakano
发明人： Hikari Sano , Yoshihiro Tomita , Takahiro Nakano
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L27/14618 , H01L23/3677 , H01L23/481 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L2224/02351 , H01L2224/02372 , H01L2224/0401 , H01L2224/05 , H01L2224/05548 , H01L2224/06181 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2924/014
摘要： A semiconductor chip, including: a substrate including an front surface; an integrated circuit formed on the front surface and including a plurality of semiconductor elements; and a heat-radiating plug formed in a region of the substrate corresponding to at least one of the semiconductor elements. The heat-radiating plug is made of a material having a thermal conductivity greater than that of the substrate formed in a non-penetrating hole having its opening on a reverse surface of the substrate.
摘要翻译：一种半导体芯片，包括：包括前表面的基板; 形成在所述前表面上且包括多个半导体元件的集成电路; 以及形成在所述基板的与所述半导体元件中的至少一个相对应的区域中的散热塞。散热塞由具有大于在其基板的背面上具有开口的非穿透孔中形成的基板的热导率的材料制成。

4. 发明授权

US08102056B2 Semiconductor device having pads and which minimizes defects due to bonding and probing processes 有权
标题翻译：半导体器件具有焊盘并且使由于接合和探测过程引起的缺陷最小化
公开(公告)号：US08102056B2
公开(公告)日：2012-01-24
申请号：US11511306
申请日：2006-08-29
申请人： Koji Takemura , Hiroshige Hirano , Masao Takahashi , Hikari Sano , Yutaka Itoh , Koji Koike
发明人： Koji Takemura , Hiroshige Hirano , Masao Takahashi , Hikari Sano , Yutaka Itoh , Koji Koike
IPC分类号： H01L23/48
CPC分类号： H01L24/05 , H01L22/32 , H01L2224/02166 , H01L2224/04042 , H01L2224/05093 , H01L2224/05094 , H01L2224/05095 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01033 , H01L2924/01057 , H01L2924/01074 , H01L2924/01079 , H01L2924/3025 , H01L2924/00
摘要： A semiconductor device includes: a semiconductor substrate; a first interlayer insulating film formed over the semiconductor substrate; a pad formed above the first interlayer insulating film; and a plurality of first interconnects spaced apart from each other in a portion of the first interlayer insulating film located below the pad. Below the pad, the first interconnects are formed in quadrangular plan shapes.
摘要翻译：半导体器件包括：半导体衬底; 形成在半导体衬底上的第一层间绝缘膜; 形成在第一层间绝缘膜上方的焊盘; 以及在位于所述垫下方的所述第一层间绝缘膜的部分中彼此间隔开的多个第一互连。在焊盘下面，第一互连以四边形的平面形状形成。

5. 发明申请

US20110204487A1 SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS 审中-公开
标题翻译：半导体器件和电子设备
公开(公告)号：US20110204487A1
公开(公告)日：2011-08-25
申请号：US13100398
申请日：2011-05-04
申请人： TAKAHIRO NAKANO , MASAKI UTSUMI , HIKARI SANO
发明人： TAKAHIRO NAKANO , MASAKI UTSUMI , HIKARI SANO
IPC分类号： H01L23/48
CPC分类号： H01L27/14618 , H01L23/3114 , H01L23/481 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/93 , H01L24/94 , H01L2224/0231 , H01L2224/02372 , H01L2224/02377 , H01L2224/0239 , H01L2224/0401 , H01L2224/1132 , H01L2224/11334 , H01L2224/11462 , H01L2224/13022 , H01L2224/13024 , H01L2224/32225 , H01L2224/8385 , H01L2224/92 , H01L2224/93 , H01L2224/94 , H01L2924/12044 , H01L2224/83 , H01L2224/11 , H01L2924/3512 , H01L2924/00
摘要： A semiconductor device includes: a semiconductor substrate; a through electrode passing through the semiconductor substrate in a thickness direction of the semiconductor substrate; an internal electrode provided in a part of the top surface of the semiconductor substrate and electrically connected to the through electrode which reaches the part; a first protective film covering the top surface except a part of the internal electrode; a second protective film formed apart from the first protective film, on the part of the internal electrode, the part being not covered by the first protective film; and metal wiring formed on the back surface of the semiconductor substrate and electrically connected to the through electrode, the second main surface being on a side of the semiconductor substrate opposite the first main surface.
摘要翻译：半导体器件包括：半导体衬底; 在半导体衬底的厚度方向上穿过半导体衬底的贯通电极; 设置在所述半导体基板的上表面的一部分中并与到达所述部分的所述贯通电极电连接的内部电极; 覆盖除了内部电极的一部分之外的顶表面的第一保护膜; 与第一保护膜分开形成的第二保护膜，在内部电极的一部分上，该部分不被第一保护膜覆盖; 以及形成在所述半导体基板的背面上并与所述贯通电极电连接的金属配线，所述第二主面位于所述半导体基板的与所述第一主面相反的一侧。

6. 发明授权

US07696607B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07696607B2
公开(公告)日：2010-04-13
申请号：US11889210
申请日：2007-08-09
申请人： Hikari Sano , Masao Takahashi , Hiroshige Hirano , Koji Takemura
发明人： Hikari Sano , Masao Takahashi , Hiroshige Hirano , Koji Takemura
IPC分类号： H01L23/544
CPC分类号： H01L23/585 , H01L21/78 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a circuit region having a function element formed on a semiconductor substrate; a scribe region located between the circuit region and another circuit region formed spaced from the circuit region, the scribe region including a cutting region and non-cutting regions provided at both sides of the cutting region; a first interlayer insulating film formed in the scribe region on the semiconductor substrate; a first dummy pattern made of conductive material and formed in the first interlayer insulating film in the cutting region; and a second dummy pattern made of conductive material and formed in the first interlayer insulating film in each of the non-cutting regions. The ratio, per unit area, of the area of the first dummy pattern to the area of the cutting region is lower than the ratio, per unit area, of the area of the second dummy pattern to the area of the non-cutting regions.
摘要翻译：半导体器件包括：具有形成在半导体衬底上的功能元件的电路区域; 位于所述电路区域和与所述电路区域间隔开的另一电路区域之间的划线区域，所述划线区域包括切割区域和设置在所述切割区域两侧的非切割区域; 形成在半导体衬底上的划线区域中的第一层间绝缘膜; 由导电材料制成并形成在切割区域中的第一层间绝缘膜中的第一虚设图形; 以及由导电材料制成并形成在每个非切割区域中的第一层间绝缘膜中的第二虚设图案。第一虚设图形的面积与切割区域的面积的单位面积的比率低于第二虚拟图案的面积与非切割区域的面积的每单位面积的比率。

7. 发明申请

US20090059055A1 OPTICAL DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：光学装置及其制造方法
公开(公告)号：US20090059055A1
公开(公告)日：2009-03-05
申请号：US12195081
申请日：2008-08-20
申请人： Takahiro Nakano , Yoshihiro Tomita , Hikari Sano
发明人： Takahiro Nakano , Yoshihiro Tomita , Hikari Sano
IPC分类号： H04N5/225
CPC分类号： H04N5/2253 , H01L27/14618 , H01L27/14627 , H01L27/14687 , H01L2224/02372 , H01L2224/05001 , H01L2224/05009 , H01L2224/05022 , H01L2224/05548 , H01L2224/0557 , H01L2224/11 , H01L2924/00014 , H04N5/2254 , H01L2224/05099
摘要： An optical device includes: an optical element including an imaging region, a peripheral circuit region formed at the rim of the imaging region and including a plurality of electrode portions, and a plurality of microlenses formed on the imaging region; a plurality of through-hole electrodes connected to the respective electrode portions and formed through the semiconductor substrate along the thickness of the semiconductor substrate; a plurality of metal interconnects connected to the respective through-hole electrodes and formed on a back surface of the semiconductor substrate opposite to a principal surface of the semiconductor substrate; an adhesive member formed on a surface of the optical element and made of a resin; and a transparent board bonded to the optical element with the adhesive member interposed therebetween. The transparent board has a planar shape larger than that of the optical element.
摘要翻译：光学装置包括：光学元件，包括成像区域，形成在成像区域的边缘处并包括多个电极部分的外围电路区域和形成在成像区域上的多个微透镜; 多个通孔电极，其连接到各个电极部分并沿半导体衬底的厚度形成在半导体衬底上; 多个金属互连件，连接到相应的通孔电极并形成在与半导体衬底的主表面相对的半导体衬底的背面上; 形成在所述光学元件的表面上并由树脂制成的粘合部件; 以及粘合到光学元件上的透明板，其间插入有粘合构件。透明板具有比光学元件大的平面形状。

8. 发明申请

US20080258266A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080258266A1
公开(公告)日：2008-10-23
申请号：US12029969
申请日：2008-02-12
申请人： Koji TAKEMURA , Hiroshige HIRANO , Yutaka ITOH , Hikari SANO , Koji KOIKE
发明人： Koji TAKEMURA , Hiroshige HIRANO , Yutaka ITOH , Hikari SANO , Koji KOIKE
IPC分类号： H01L23/00 , H01L21/71
CPC分类号： H01L23/585 , H01L23/562 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: an interlayer insulating film formed on a substrate; a wiring formed in the interlayer insulating film in a chip region of the substrate; a seal ring formed in the interlayer insulating film in a periphery of the chip region and continuously surrounding the chip region; and a first protective film formed on the interlayer insulating film having the wiring and the seal ring formed therein. A first opening is formed in the first protective film in a region located outside the seal ring when viewed from the chip region, and the interlayer insulating film is exposed in the first opening.
摘要翻译：半导体器件包括：形成在衬底上的层间绝缘膜; 在衬底的芯片区域中的层间绝缘膜中形成的布线; 密封环，形成在所述芯片区域的周围的所述层间绝缘膜中，并且连续地围绕所述芯片区域; 以及形成在其上形成有布线和密封环的层间绝缘膜上的第一保护膜。当从芯片区域观察时，在位于密封环外侧的区域中的第一保护膜中形成第一开口，并且层间绝缘膜在第一开口中露出。

9. 发明授权

US08810039B2 Semiconductor device having a pad and plurality of interconnects 有权
标题翻译：具有焊盘和多个互连的半导体器件
公开(公告)号：US08810039B2
公开(公告)日：2014-08-19
申请号：US13323454
申请日：2011-12-12
申请人： Koji Takemura , Hiroshige Hirano , Masao Takahashi , Hikari Sano , Yutaka Itoh , Koji Koike
发明人： Koji Takemura , Hiroshige Hirano , Masao Takahashi , Hikari Sano , Yutaka Itoh , Koji Koike
IPC分类号： H01L23/48 , H01L23/00 , H01L21/66
CPC分类号： H01L24/05 , H01L22/32 , H01L2224/02166 , H01L2224/04042 , H01L2224/05093 , H01L2224/05094 , H01L2224/05095 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01033 , H01L2924/01057 , H01L2924/01074 , H01L2924/01079 , H01L2924/3025 , H01L2924/00
摘要： A semiconductor device includes: a semiconductor substrate; a first interlayer insulating film formed over the semiconductor substrate; a pad formed above the first interlayer insulating film; and a plurality of first interconnects spaced apart from each other in a portion of the first interlayer insulating film located below the pad. Below the pad, the first interconnects are formed in quadrangular plan shapes.
摘要翻译：半导体器件包括：半导体衬底; 形成在半导体衬底上的第一层间绝缘膜; 形成在第一层间绝缘膜上方的焊盘; 以及在位于所述垫下方的所述第一层间绝缘膜的部分中彼此间隔开的多个第一互连。在焊盘下面，第一互连以四边形的平面形状形成。

10. 发明申请

US20110169118A1 OPTICAL DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS 审中-公开
标题翻译：光学装置，其制造方法和电子装置
公开(公告)号：US20110169118A1
公开(公告)日：2011-07-14
申请号：US13004354
申请日：2011-01-11
申请人： Hikari SANO
发明人： Hikari SANO
IPC分类号： H01L31/0232 , H01L31/18
CPC分类号： H01L27/14618 , H01L27/14625 , H01L27/14683 , H01L2224/13
摘要： The present invention is has an object of providing an optical device miniaturized while maintaining bonding strength between a semiconductor substrate and a light-transmissive plate, reducing possibility of warpage, and maintaining yields and design flexibility, a method of manufacturing the optical device, and an electronic apparatus. The optical device according to the present invention includes a semiconductor substrate having one surface in which a light-receiving element is formed; and a light-transmissive plate provided above the semiconductor substrate so as to cover the light-receiving element. The semiconductor substrate and the light-transmissive plate are partially bonded above a light-receiving unit of the semiconductor substrate. The light-receiving element is formed in the light-receiving unit.
摘要翻译：本发明的目的是提供一种小型化的光学装置，同时保持半导体基板和透光板之间的结合强度，降低翘曲的可能性，并且保持屈服和设计灵活性，制造光学装置的方法和电子仪器根据本发明的光学装置包括其中形成有光接收元件的一个表面的半导体衬底; 以及设置在半导体衬底上方以覆盖光接收元件的透光板。半导体衬底和透光板部分地接合在半导体衬底的光接收单元的上方。光接收元件形成在光接收单元中。

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