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1. 发明授权

US08304820B2 Semiconductor device utilizing dummy gate to enhance processing precision 有权
标题翻译：半导体器件利用虚拟栅极提高加工精度
公开(公告)号：US08304820B2
公开(公告)日：2012-11-06
申请号：US13304350
申请日：2011-11-24
申请人： Hideaki Yamakoshi , Hideyuki Yashima , Shinichiro Abe , Yasuhiro Taniguchi
发明人： Hideaki Yamakoshi , Hideyuki Yashima , Shinichiro Abe , Yasuhiro Taniguchi
IPC分类号： H01L29/76
CPC分类号： H01L27/11575 , H01L27/11546 , H01L27/11548
摘要： Processing of memory cells forming a nonvolatile memory in a semiconductor device. A second polysilicon film is formed in such a manner as to cover a first polysilicon film and a dummy gate electrode. Thus, the second polysilicon film is formed reflecting the shapes of a step difference portion and a gap groove. Particularly, in the second polysilicon film covering the gap groove, a concave part is formed. Subsequently, over the second polysilicon film, an antireflection film is formed. Thus, the antireflection film having high flowability flows from the higher region to the lower region of the step difference portion, but is stored in a sufficient amount in the concave part. Accordingly, the antireflection film is supplied from the concave part so as to compensate for the amount of the antireflection film to flow out therefrom.
摘要翻译：在半导体器件中形成非易失性存储器的存储单元的处理。以覆盖第一多晶硅膜和虚拟栅电极的方式形成第二多晶硅膜。因此，第二多晶硅膜形成为反映台阶差部分和间隙凹槽的形状。特别地，在覆盖间隙槽的第二多晶硅膜中，形成凹部。接着，在第二多晶硅膜上形成防反射膜。因此，具有高流动性的防反射膜从台阶差部分的较高区域流向下部区域，但是在凹部中以足够的量储存。因此，从凹部供给防反射膜，以补偿从其中流出的防反射膜的量。

2. 发明授权

US08084303B2 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08084303B2
公开(公告)日：2011-12-27
申请号：US12771673
申请日：2010-04-30
申请人： Kazuyoshi Shiba , Hideyuki Yashima
发明人： Kazuyoshi Shiba , Hideyuki Yashima
IPC分类号： H01L21/82
CPC分类号： H01L27/11546 , H01L27/105 , H01L27/11526 , H01L29/66825 , H01L29/7833 , H01L29/7883
摘要： In a memory cell array on a main surface of a semiconductor substrate, a floating gate electrode for accumulating charges for information is arranged. The floating gate electrode is covered with a cap insulating film and a pattern of an first insulating film formed thereon. Further, over the entire main surface of the semiconductor substrate, an second insulating film is deposited so that it covers the pattern of the first insulating film and a gate electrode. The second insulating film is formed by a silicon nitride film formed by a plasma CVD method. The first insulating film is formed by a silicon nitride film formed by a low-pressure CVD method. By the provision of such an first insulating film, it is possible to suppress or prevent water or hydrogen ions from diffusing to the floating gate electrode, and therefore, the data retention characteristics of a flash memory can be improved.
摘要翻译：在半导体衬底的主表面上的存储单元阵列中，布置用于累积信息电荷的浮栅电极。浮栅电极覆盖有帽绝缘膜和形成在其上的第一绝缘膜的图案。此外，在半导体基板的整个主表面上沉积第二绝缘膜，以覆盖第一绝缘膜和栅电极的图案。第二绝缘膜由通过等离子体CVD法形成的氮化硅膜形成。第一绝缘膜由通过低压CVD方法形成的氮化硅膜形成。通过设置这样的第一绝缘膜，可以抑制或防止水或氢离子扩散到浮栅电极，因此可以提高闪速存储器的数据保持特性。

3. 发明申请

US20100219458A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100219458A1
公开(公告)日：2010-09-02
申请号：US12771673
申请日：2010-04-30
申请人： KAZUYOSHI SHIBA , Hideyuki Yashima
发明人： KAZUYOSHI SHIBA , Hideyuki Yashima
IPC分类号： H01L27/105 , H01L29/788
CPC分类号： H01L27/11546 , H01L27/105 , H01L27/11526 , H01L29/66825 , H01L29/7833 , H01L29/7883
摘要： The data retention characteristics of a nonvolatile memory circuit are improved. In a memory cell array on a main surface of a semiconductor substrate, a floating gate electrode for accumulating charges for information is arranged. The floating gate electrode is covered with a cap insulating film and a pattern of an insulating film 4a formed thereon. Further, over the entire main surface of the semiconductor substrate, an insulating film 2a is deposited so that it covers the pattern of the insulating film 4a and a gate electrode. The insulating film 2a is formed by a silicon nitride film formed by the plasma CVD method. The insulating film 4a is formed by a silicon nitride film formed by the low-pressure CVD method. By the provision of such an insulating film 4a, it is possible to suppress or prevent water or hydrogen ions from diffusing to the floating gate electrode, and therefore, the data retention characteristics of a flash memory can be improved.
摘要翻译：提高了非易失性存储器电路的数据保持特性。在半导体衬底的主表面上的存储单元阵列中，布置用于累积信息电荷的浮栅电极。浮栅电极覆盖有帽绝缘膜和形成在其上的绝缘膜4a的图案。此外，在半导体基板的整个主表面上沉积绝缘膜2a，以覆盖绝缘膜4a和栅电极的图案。绝缘膜2a由通过等离子体CVD法形成的氮化硅膜形成。绝缘膜4a由通过低压CVD法形成的氮化硅膜形成。通过设置这样的绝缘膜4a，可以抑制或防止水或氢离子扩散到浮栅电极，因此可以提高闪存的数据保持特性。

4. 发明申请

US20090008690A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090008690A1
公开(公告)日：2009-01-08
申请号：US12137955
申请日：2008-06-12
申请人： Kazuyoshi SHIBA , Hideyuki Yashima
发明人： Kazuyoshi SHIBA , Hideyuki Yashima
IPC分类号： H01L27/108 , H01L29/788 , H01L21/336
CPC分类号： H01L27/11546 , H01L27/105 , H01L27/11526 , H01L29/66825 , H01L29/7833 , H01L29/7883
摘要： The data retention characteristics of a nonvolatile memory circuit are improved. In a memory cell array on a main surface of a semiconductor substrate, a floating gate electrode for accumulating charges for information is arranged. The floating gate electrode is covered with a cap insulating film and a pattern of an insulating film 4a formed thereon. Further, over the entire main surface of the semiconductor substrate, an insulating film 2a is deposited so that it covers the pattern of the insulating film 4a and a gate electrode. The insulating film 2a is formed by a silicon nitride film formed by the plasma CVD method. The insulating film 4a is formed by a silicon nitride film formed by the low-pressure CVD method. By the provision of such an insulating film 4a, it is possible to suppress or prevent water or hydrogen ions from diffusing to the floating gate electrode, and therefore, the data retention characteristics of a flash memory can be improved.
摘要翻译：提高了非易失性存储器电路的数据保持特性。在半导体衬底的主表面上的存储单元阵列中，布置用于累积信息电荷的浮栅电极。浮栅电极覆盖有帽绝缘膜和形成在其上的绝缘膜4a的图案。此外，在半导体基板的整个主表面上沉积绝缘膜2a，以覆盖绝缘膜4a和栅电极的图案。绝缘膜2a由通过等离子体CVD法形成的氮化硅膜形成。绝缘膜4a由通过低压CVD法形成的氮化硅膜形成。通过设置这样的绝缘膜4a，可以抑制或防止水或氢离子扩散到浮栅电极，因此可以提高闪存的数据保持特性。

5. 发明授权

US08076191B2 Method for manufacturing a semiconductor device including memory cell formation region 有权
标题翻译：包括存储单元形成区域的半导体器件的制造方法
公开(公告)号：US08076191B2
公开(公告)日：2011-12-13
申请号：US12753075
申请日：2010-04-01
申请人： Hideaki Yamakoshi , Hideyuki Yashima , Shinichiro Abe , Yasuhiro Taniguchi
发明人： Hideaki Yamakoshi , Hideyuki Yashima , Shinichiro Abe , Yasuhiro Taniguchi
IPC分类号： H01L21/336 , H01L21/8234
CPC分类号： H01L27/11575 , H01L27/11546 , H01L27/11548
摘要： In processing memory cells for forming a nonvolatile memory in a semiconductor device, a second polysilicon film is formed in such a manner as to cover a first polysilicon film and a dummy gate electrode. Thus, the second polysilicon film is formed reflecting the shapes of a step difference portion and a gap groove. Particularly, in the second polysilicon film covering the gap groove, a concave part is formed. Subsequently, over the second polysilicon film, an antireflection film is formed. Thus, the antireflection film having high flowability flows from the higher region to the lower region of the step difference portion, but is stored in a sufficient amount in the concave part. Accordingly, the antireflection film is supplied from the concave part so as to compensate for the amount of the antireflection film to flow out therefrom.
摘要翻译：在处理用于在半导体器件中形成非易失性存储器的存储单元中，以覆盖第一多晶硅膜和伪栅电极的方式形成第二多晶硅膜。因此，第二多晶硅膜形成为反映台阶差部分和间隙凹槽的形状。特别地，在覆盖间隙槽的第二多晶硅膜中，形成凹部。接着，在第二多晶硅膜上形成防反射膜。因此，具有高流动性的防反射膜从台阶差部分的较高区域流向下部区域，但是在凹部中以足够的量存储。因此，从凹部供给防反射膜，以补偿从其中流出的防反射膜的量。

6. 发明申请

US20120061745A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120061745A1
公开(公告)日：2012-03-15
申请号：US13304350
申请日：2011-11-24
申请人： HIDEAKI YAMAKOSHI , HIDEYUKI YASHIMA , SHINICHIRO ABE , YASUHIRO TANIGUCHI
发明人： HIDEAKI YAMAKOSHI , HIDEYUKI YASHIMA , SHINICHIRO ABE , YASUHIRO TANIGUCHI
IPC分类号： H01L29/792
CPC分类号： H01L27/11575 , H01L27/11546 , H01L27/11548
摘要： There is provided a technology capable of improving the processing precision of memory cells forming a nonvolatile memory in a semiconductor device including the nonvolatile memory. A second polysilicon film is formed in such a manner as to cover a first polysilicon film and a dummy gate electrode. Thus, the second polysilicon film is formed reflecting the shapes of a step difference portion and a gap groove. Particularly, in the second polysilicon film covering the gap groove, a concave part is formed. Subsequently, over the second polysilicon film, an antireflection film is formed. Thus, the antireflection film having high flowability flows from the higher region to the lower region of the step difference portion, but is stored in a sufficient amount in the concave part. Accordingly, the antireflection film is supplied from the concave part so as to compensate for the amount of the antireflection film to flow out therefrom.
摘要翻译：提供了一种能够在包括非易失性存储器的半导体器件中提高形成非易失性存储器的存储单元的处理精度的技术。以覆盖第一多晶硅膜和虚拟栅电极的方式形成第二多晶硅膜。因此，第二多晶硅膜形成为反映台阶差部分和间隙凹槽的形状。特别地，在覆盖间隙槽的第二多晶硅膜中，形成凹部。接着，在第二多晶硅膜上形成防反射膜。因此，具有高流动性的防反射膜从台阶差部分的较高区域流向下部区域，但是在凹部中以足够的量储存。因此，从凹部供给防反射膜，以补偿从其中流出的防反射膜的量。

7. 发明申请

US20100255647A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100255647A1
公开(公告)日：2010-10-07
申请号：US12753075
申请日：2010-04-01
申请人： Hideaki YAMAKOSHI , Hideyuki Yashima , Shinichiro Abe , Yasuhiro Taniguchi
发明人： Hideaki YAMAKOSHI , Hideyuki Yashima , Shinichiro Abe , Yasuhiro Taniguchi
IPC分类号： H01L21/8246
CPC分类号： H01L27/11575 , H01L27/11546 , H01L27/11548
摘要： There is provided a technology capable of improving the processing precision of memory cells forming a nonvolatile memory in a semiconductor device including the nonvolatile memory. A second polysilicon film is formed in such a manner as to cover a first polysilicon film and a dummy gate electrode. Thus, the second polysilicon film is formed reflecting the shapes of a step difference portion and a gap groove. Particularly, in the second polysilicon film covering the gap groove, a concave part is formed. Subsequently, over the second polysilicon film, an antireflection film is formed. Thus, the antireflection film having high flowability flows from the higher region to the lower region of the step difference portion, but is stored in a sufficient amount in the concave part. Accordingly, the antireflection film is supplied from the concave part so as to compensate for the amount of the antireflection film to flow out therefrom.
摘要翻译：提供了一种能够在包括非易失性存储器的半导体器件中提高形成非易失性存储器的存储单元的处理精度的技术。以覆盖第一多晶硅膜和虚拟栅电极的方式形成第二多晶硅膜。因此，第二多晶硅膜形成为反映台阶差部分和间隙凹槽的形状。特别地，在覆盖间隙槽的第二多晶硅膜中，形成凹部。接着，在第二多晶硅膜上形成防反射膜。因此，具有高流动性的防反射膜从台阶差部分的较高区域流向下部区域，但是在凹部中以足够的量存储。因此，从凹部供给防反射膜，以补偿从其中流出的防反射膜的量。

8. 发明申请

US20080211001A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080211001A1
公开(公告)日：2008-09-04
申请号：US12013470
申请日：2008-01-13
申请人： Kazuyoshi Shiba , Hideyuki Yashima , Yasushi Oka
发明人： Kazuyoshi Shiba , Hideyuki Yashima , Yasushi Oka
IPC分类号： H01L27/06 , H01L21/28
CPC分类号： H01L27/105 , H01L27/1052 , H01L27/11526 , H01L27/11529 , H01L29/7833
摘要： Provided is a semiconductor device having, over the main surface of a semiconductor substrate, a main circuit region and a memory cell array of a flash memory. The memory cell array has a floating gate electrode for accumulating charges of data, while the main circuit region has a gate electrode of MIS•FET constituting the main circuit. In the main circuit region, an insulating film made of a silicon nitride film is formed to cover the gate electrode, whereby miniaturization of elements in the main circuit region is not impaired. The memory cell array has no such insulating film. This means that the upper surface of the floating gate electrode is not contiguous to the insulating film but is covered directly with an interlayer insulating film. According to such a constitution, leakage of electrons from the floating gate electrode of the memory cell array can be suppressed or prevented and the flash memory thus obtained has improved data retention characteristics.
摘要翻译：提供一种半导体器件，其在半导体衬底的主表面上具有闪存的主电路区域和存储单元阵列。存储单元阵列具有用于累积数据电荷的浮栅电极，而主电路区域具有构成主电路的MIS.FET的栅电极。在主电路区域中，形成由氮化硅膜构成的绝缘膜，以覆盖栅电极，从而不损害主电路区域中元件的小型化。存储单元阵列不具有这种绝缘膜。这意味着浮栅电极的上表面不与绝缘膜邻接，而是直接用层间绝缘膜覆盖。根据这种结构，可以抑制或防止电子从存储单元阵列的浮置栅电极泄漏，从而获得的闪速存储器具有改善的数据保持特性。

9. 发明授权

US07732261B2 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07732261B2
公开(公告)日：2010-06-08
申请号：US12137955
申请日：2008-06-12
申请人： Kazuyoshi Shiba , Hideyuki Yashima
发明人： Kazuyoshi Shiba , Hideyuki Yashima
IPC分类号： H01L21/82
CPC分类号： H01L27/11546 , H01L27/105 , H01L27/11526 , H01L29/66825 , H01L29/7833 , H01L29/7883
摘要： In a memory cell array on a main surface of a semiconductor substrate, a floating gate electrode for accumulating charges for information is arranged. The floating gate electrode is covered with a cap insulating film and a pattern of a first insulating film formed thereon. Further, over the entire main surface of the semiconductor substrate, a second insulating film is deposited so that it covers the pattern of the first insulating film and a gate electrode. The second insulating film is formed by a silicon nitride film formed by a plasma CVD method. The first insulating film is formed by a silicon nitride film formed by a low-pressure CVD method. By the provision of such a first insulating film, it is possible to suppress or prevent water or hydrogen ions from diffusing to the floating gate electrode, and therefore, the data retention characteristics of a flash memory can be improved.
摘要翻译：在半导体衬底的主表面上的存储单元阵列中，布置用于累积信息电荷的浮栅电极。浮栅电极覆盖有帽绝缘膜和形成在其上的第一绝缘膜的图案。此外，在半导体基板的整个主表面上，沉积第二绝缘膜，以覆盖第一绝缘膜和栅电极的图案。第二绝缘膜由通过等离子体CVD法形成的氮化硅膜形成。第一绝缘膜由通过低压CVD法形成的氮化硅膜形成。通过设置这样的第一绝缘膜，可以抑制或防止水或氢离子扩散到浮栅电极，因此可以提高闪存的数据保持特性。

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