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1. 发明专利

JP2015049143A 検出性能算出装置及びその方法並びにプログラム审中-公开
标题翻译：检测性能计算装置，其方法和程序
公开(公告)号：JP2015049143A
公开(公告)日：2015-03-16
申请号：JP2013181100
申请日：2013-09-02
申请人：英俊古川 , Hidetoshi Furukawa , 英俊古川
发明人： FURUKAWA HIDETOSHI
IPC分类号： G01S7/32 , G01S7/526
摘要：【課題】モンテカルロ・シミュレーションを実施するための大規模な検出性能算出装置を用いずに、スキャン間積分を行う信号処理部の検出性能と検出諸元の少なくとも一つを短時間に算出する。【解決手段】検出性能算出装置は、ガンマ分布またはアーラン分布の確率密度関数または累積分布関数に基づいて、スキャン間積分を行う信号処理部の検出性能と検出諸元の少なくとも一つを算出する検出性能算出部を備える。【選択図】図1
摘要翻译：要解决的问题：为了在短时间内计算用于在扫描期间执行集成的信号处理部分的检测性能和检测项目中的至少一个，而不使用用于执行蒙特卡洛模拟的大规模检测性能计算装置。解决方案：A检测性能计算装置包括检测性能计算部分，用于根据伽马分布或Erlang分布的累积分布函数的概率密度函数，计算用于在扫描期间执行积分的信号处理部分的检测性能和检测项目中的至少一个。

2. 发明专利

JP2005013424A Golf shoe 审中-公开
标题翻译：高尔夫鞋
公开(公告)号：JP2005013424A
公开(公告)日：2005-01-20
申请号：JP2003181567
申请日：2003-06-25
申请人： Hidetoshi Furukawa , 秀利古川
发明人： FURUKAWA HIDETOSHI
IPC分类号： A43B13/22 , A43B5/00
摘要： PROBLEM TO BE SOLVED: To provide a spike for a golf shoe and a golf shoe which is fitted with the spike and from which the spike does not come off during play.
SOLUTION: The golf shoe is provided with the spike with a screw threaded in a direction in which it is tightened by the counterclockwise rotation. The spike is fitted to at least a part of the front half of the golf shoe for the right foot.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为高尔夫球鞋和高尔夫球鞋提供穗状物，高尔夫球鞋和高尔夫球鞋装配有穗状物，并且穗状物在游戏过程中不会脱落。解决方案：高尔夫球鞋具有螺钉，该螺钉带有沿着逆时针方向旋紧的方向螺纹。尖头安装在右脚的高尔夫球鞋的前半部分的至少一部分上。版权所有（C）2005，JPO＆NCIPI

3. 发明授权

US09121919B2 Target tracking device and target tracking method 有权
标题翻译：目标跟踪设备和目标跟踪方法
公开(公告)号：US09121919B2
公开(公告)日：2015-09-01
申请号：US13403310
申请日：2012-02-23
申请人： Hidetoshi Furukawa
发明人： Hidetoshi Furukawa
IPC分类号： G01S13/66 , G01S13/72 , G01S7/00 , G01S13/86
CPC分类号： G01S7/003 , G01S13/726 , G01S13/86
摘要： According to one embodiment, target tracking device includes passive processor, active processor, fusion unit and correction unit. Passive processor calculates passive track of target based on passive measurement of target angle measured by passive sensor. Active processor calculates active track of target based on active measurement of target distance and angle measured by active sensor. Fusion unit combines passive track and active track to output combined track. Correction unit calculates correction data based on combined track. Passive processor calculates track of the target for motion models based on passive measurement and correction data and calculates passive track by weighted sum of all tracks for motion models.
摘要翻译：根据一个实施例，目标跟踪装置包括无源处理器，有源处理器，融合单元和校正单元。被动处理器根据被动传感器测量的目标角度的被动测量，计算目标的被动轨迹。有源处理器根据主动传感器测量的目标距离和角度的有效测量来计算目标的活动轨迹。融合单元将无源轨道和主动轨道组合到输出组合轨道。校正单元根据组合轨迹计算校正数据。被动处理器基于被动测量和校正数据计算运动模型目标的轨迹，并通过运动模型的所有轨道的加权和来计算被动轨迹。

4. 发明授权

US08963766B2 Target tracking system and method using data of angle sensors 有权
标题翻译：使用角度传感器数据的目标跟踪系统和方法
公开(公告)号：US08963766B2
公开(公告)日：2015-02-24
申请号：US13488788
申请日：2012-06-05
申请人： Hidetoshi Furukawa
发明人： Hidetoshi Furukawa
IPC分类号： G01S13/72 , G01S5/04 , G01S5/00 , G01S5/02 , G01S5/16 , G01S5/18 , G01S5/20 , G01S13/00
CPC分类号： G01S5/04 , G01S5/00 , G01S5/0294 , G01S5/16 , G01S5/18 , G01S5/20
摘要： According to one embodiment, a target tracking apparatus calculates N-dimensional predicted values from a respective stored (N+1)-dimensional tracks for each of the targets, determines whether or not the N-dimensional predicted value for each of the targets is correlated with the received N-dimensional angle observed value for the target, if the N-dimensional predicted value is not correlated, generates a new (N+1)-dimensional track for the target based on the N-dimensional track corresponding to the N-dimensional angle observed value and if the N-dimensional predicted value is correlated, updates and stores the (N+1)-dimensional track using the N-dimensional angle observed value.
摘要翻译：根据一个实施例，目标跟踪装置从针对每个目标的相应存储的（N + 1）维轨迹计算N维预测值，确定每个目标的N维预测值是否相关对于目标的所接收的N维角度观测值，如果N维预测值不相关，则基于对应于N维的N维轨迹，生成用于目标的新的（N + 1）维轨迹，三维角度观测值，如果N维预测值相关，则使用N维角度观测值更新并存储（N + 1）维轨迹。

5. 发明申请

US20120221274A1 TARGET TRACKING DEVICE AND TARGET TRACKING METHOD 有权
标题翻译：目标跟踪装置和目标跟踪方法
公开(公告)号：US20120221274A1
公开(公告)日：2012-08-30
申请号：US13403353
申请日：2012-02-23
申请人： Hidetoshi FURUKAWA
发明人： Hidetoshi FURUKAWA
IPC分类号： G06F19/00 , G01P21/00
CPC分类号： G01S13/68
摘要： According to one embodiment, target tracking device includes track calculator and correction unit. Track calculator calculates a track of a target based on angular measurement of the target measured by a passive sensor. Correction unit sends correction data to the track calculator. Correction unit calculates correction data based on state vector of target input from an external device. Track calculator calculates track for each of a plurality of motion models based on angular measurement and correction data. Track calculator calculates the track of the target based on the track for each of the motion models. Track calculator calculates the track of the target by weighted sum of all tracks for the motion models.
摘要翻译：根据一个实施例，目标跟踪装置包括轨迹计算器和校正单元。轨道计算器根据被动传感器测得的目标的角度测量计算目标轨迹。校正单元向轨道计算器发送校正数据。校正单元基于来自外部设备的目标输入的状态矢量来计算校正数据。轨迹计算器基于角度测量和校正数据计算多个运动模型中的每一个的轨迹。轨道计算器根据每个运动模型的轨迹计算目标的轨迹。轨道计算器通过运动模型的所有轨道的加权和来计算目标的轨迹。

6. 发明授权

US07439621B1 Radio frequency signal processing device 失效
标题翻译：射频信号处理装置
公开(公告)号：US07439621B1
公开(公告)日：2008-10-21
申请号：US09707844
申请日：2000-11-08
申请人： Hidetoshi Ishida , Kazuo Miyatsuji , Hidetoshi Furukawa , Tsuyoshi Tanaka , Daisuke Ueda
发明人： Hidetoshi Ishida , Kazuo Miyatsuji , Hidetoshi Furukawa , Tsuyoshi Tanaka , Daisuke Ueda
IPC分类号： H01L23/34 , H01L23/552
CPC分类号： H01L23/552 , H01L27/0207 , H01L27/088 , H01L2223/6644 , H01L2924/0002 , H01L2924/00
摘要： The RF device of the present invention includes: a semiconductor substrate; and first and second semiconductor components provided on the substrate. Each of the components includes source electrodes, a gate electrode and a drain electrode. And multiple through holes, which pass through the substrate in the thickness direction, are opened in a region of the substrate between the two components. To enhance the effect of suppressing electrical interference between the components, a gap between two adjacent ones of the through holes is preferably smaller than the thickness of the substrate.
摘要翻译：本发明的RF器件包括：半导体衬底; 以及设置在基板上的第一和第二半导体部件。每个组件包括源电极，栅电极和漏电极。并且在两个部件之间的基板的区域中打开穿过基板的厚度方向上的多个通孔。为了增强抑制部件之间的电气干扰的效果，两个相邻的通孔之间的间隙优选小于基板的厚度。

7. 发明申请

US20060023765A1 Semiconductor laser having two or more laser diode portions and a manufacturing method for the same 审中-公开
标题翻译：具有两个或更多个激光二极管部分的半导体激光器及其制造方法
公开(公告)号：US20060023765A1
公开(公告)日：2006-02-02
申请号：US11153556
申请日：2005-06-16
申请人： Toshiya Fukuhisa , Masaya Mannoh , Hidetoshi Furukawa , Kohji Makita
发明人： Toshiya Fukuhisa , Masaya Mannoh , Hidetoshi Furukawa , Kohji Makita
IPC分类号： H01S5/00
CPC分类号： H01S5/4025 , H01S5/4087
摘要： The semiconductor laser according to the present invention has a substrate used as a shared base, on which an infrared laser diode portion and a red laser diode portion are formed apart from each other. The top surfaces of the laminated layers of the individual laser diode portions have different height positions in the thickness direction of the substrate in relation to the reference point Bf. Neighboring members are formed on the outer edge of the laser, sandwiching therebetween where the laser diode portions are formed. The top surface positions of the neighboring members are all set to the same height which is higher than or equal to the top surface position of the higher laser diode portion of the two.
摘要翻译：根据本发明的半导体激光器具有用作共享基底的基板，红外激光二极管部分和红色激光二极管部分彼此分开形成。各个激光二极管部分的层压层的顶表面相对于参考点Bf在基板的厚度方向上具有不同的高度位置。相邻构件形成在激光器的外边缘上，夹在其间形成激光二极管部分的位置处。相邻构件的顶表面位置都被设置为高于或等于两者的较高激光二极管部分的顶表面位置的相同高度。

8. 发明授权

US06025632A Semiconductor integrated circuit with tungston silicide nitride thermal resistor 失效
标题翻译：半导体集成电路与钨硅化硅热电阻
公开(公告)号：US06025632A
公开(公告)日：2000-02-15
申请号：US988799
申请日：1997-12-11
申请人： Takeshi Fukuda , Hiroshi Takenaka , Hidetoshi Furukawa , Takeshi Fukui , Daisuke Ueda
发明人： Takeshi Fukuda , Hiroshi Takenaka , Hidetoshi Furukawa , Takeshi Fukui , Daisuke Ueda
IPC分类号： H01L29/74 , H01L21/822 , H01L23/58 , H01L27/04 , H01L27/06 , H01L27/08 , H01L23/62
CPC分类号： H01L27/0658 , H01L27/0802
摘要： A semiconductor integrated circuit includes a thermal resistor which is made of a tungsten silicon nitride containing at least about 5% by weight of silicon and formed on a semiconductor substrate directly or via an insulating film. The semiconductor integrated circuit is produced by a method including the steps of: forming a tungsten silicide nitride film on a semiconductor substrate; patterning the tungsten silicide nitride film in a predetermined pattern to form a thermal resistor; and forming a pair of electrodes to be connected to the thermal resistor. The semiconductor integrated circuit is provided so as to have a predetermined resistance by measuring electric characteristics of the semiconductor integrated circuit; obtaining a difference between the measured electric characteristics and desired electric characteristics to calculate a required adjusting amount of a resistance of the thermal resistor; and adjusting the resistance of the thermal resistor by the adjusting amount through heating of the thermal resistor with electric power.
摘要翻译：半导体集成电路包括由包含至少约5重量％的硅的钨硅氮化物制成的热电阻器，并且直接或通过绝缘膜形成在半导体衬底上。半导体集成电路通过包括以下步骤的方法制造：在半导体衬底上形成硅化钨化硅膜; 以预定图案图案化硅化钨氮化膜以形成热电阻; 并形成一对要连接到热电阻器的电极。半导体集成电路通过测量半导体集成电路的电特性而具有预定的电阻; 获得测量的电特性和期望的电特性之间的差以计算所需热调节电阻的调整量; 并且通过用电力加热热敏电阻器来调整热敏电阻的电阻达到调节量。

9. 发明授权

US5708292A Power amplification circuit 失效
标题翻译：功率放大电路
公开(公告)号：US5708292A
公开(公告)日：1998-01-13
申请号：US704163
申请日：1996-08-28
申请人： Hidetoshi Furukawa , Daisuke Ueda
发明人： Hidetoshi Furukawa , Daisuke Ueda
IPC分类号： H01L29/04 , H01L29/423 , H03F1/30 , H03F3/193 , H01L31/036
CPC分类号： H03F3/1935 , H01L29/045 , H01L29/42316 , H03F1/306
摘要： Variations in the waveform of high-frequency signals amplified by a field-effect transistor (FET) in a power amplification circuit due to changes in temperature are reduced. A FET having an n-type active layer, a source electrode, a drain electrode and a gate electrode is formed on a (1 0 0)-crystal plane of a semi-insulating GaAs substrate. The FET is protected by a passivation film. The angle .theta., formed between the longitudinal axial direction of the gate electrode and the -direction, is set at an angle of from 0.degree. to 90.degree. corresponding to the impurity concentration of the n-type active layer, in order that the temperature coefficient of the FET threshold voltage becomes substantially equal to the temperature coefficient of the gate bias voltage applied from a power supply to the gate electrode. If the angle .theta. is set at 45.degree., then the temperature coefficient of the FET threshold voltage becomes zero.
摘要翻译：降低了由于温度变化而在功率放大电路中由场效晶体管（FET）放大的高频信号的波形的变化。在半绝缘GaAs衬底的（110°）晶面上形成具有n型有源层，源电极，漏电极和栅电极的FET。 FET由钝化膜保护。形成在栅电极的纵向轴向和<0 -1 -1方向之间的角度θ被设定为对应于n型有源层的杂质浓度的0°至90°的角度，以使FET阈值电压的温度系数基本上等于从电源施加到栅电极的栅偏压的温度系数。如果角度θ设定为45°，则FET阈值电压的温度系数为零。

10. 发明授权

US07439900B2 Radar system with resampling features 有权
标题翻译：雷达系统具有重采样功能
公开(公告)号：US07439900B2
公开(公告)日：2008-10-21
申请号：US11430055
申请日：2006-05-09
申请人： Hidetoshi Furukawa
发明人： Hidetoshi Furukawa
IPC分类号： G01S13/00
CPC分类号： G01S7/2923 , G01S13/28 , G01S13/723
摘要： Disclosed is a radar system which comprises an AD conversion unit for converting an analog signal obtained from an antenna into a digital signal, a frequency analysis unit for performing a frequency analysis of the digital signal converted by the AD conversion unit, a time-frequency analysis unit for performing a time-frequency analysis of the digital signal converted by the AD conversion unit, and a target detection unit for detecting a target based on a signal of which the frequency analysis is performed by the frequency analysis unit and a signal of which the time-frequency analysis is performed by the time-frequency analysis unit.
摘要翻译：本发明公开了一种雷达系统，包括：将从天线获得的模拟信号转换为数字信号的AD转换单元，进行由AD转换单元转换的数字信号的频率分析的频率分析单元，时频分析用于执行由AD转换单元转换的数字信号的时间 - 频率分析的单元，以及用于基于由频率分析单元执行频率分析的信号来检测目标的目标检测单元，以及信号时频分析由时间频率分析单元进行。

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