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1. 发明专利

JP2013057758A Active matrix type display device 有权
标题翻译：主动矩阵型显示装置
公开(公告)号：JP2013057758A
公开(公告)日：2013-03-28
申请号：JP2011195384
申请日：2011-09-07
申请人： Hideo Kawano , 英郎川野
发明人： KAWANO HIDEO
IPC分类号： G09G3/36 , G02F1/1368 , G09F9/30 , G09G3/20 , G09G3/30 , H01L21/336 , H01L27/32 , H01L29/786 , H01L51/05 , H01L51/50
CPC分类号： G02F1/134336 , G02F1/13439 , G02F1/1362 , G09G3/3648 , G09G2300/0417 , G09G2300/0819 , G09G2300/0852 , G09G2320/0247 , H01L27/1225 , H01L27/1255 , H01L27/3276 , H01L29/41733
摘要： PROBLEM TO BE SOLVED: To suppress degrading of display quality due to increase of flicker level and evenness deterioration of screen luminance which are caused by increase of excessive charging effect when an organic semiconductor or amorphous metal oxide based semiconductor which has larger field-effect mobility than amorphous silicon is used for pixel TFTs of a liquid crystal display device or an organic EL display device.SOLUTION: A relational expression between a feed through voltage in a halftone display where visibility of flicker and image persistence and the like is high, and in-plane difference of counter electrode potential which is an index of the excessive charging effect is newly derived. A display device is designed so as to satisfy a condition by which the newly derived in-plane difference of counter electrode potential is decreased to not higher than an allowable limit.
摘要翻译：要解决的问题：为了抑制由于具有较大场强的有机半导体或非晶态金属氧化物基半导体而引起的过度充电效应的增加引起的闪烁水平的增加和屏幕亮度的均匀性劣化引起的显示质量的劣化，效应迁移率比非晶硅用于液晶显示装置或有机EL显示装置的像素TFT。解决方案：闪烁可见度和图像持久性等的半色调显示中的馈通电压之间的关系表达式较高，作为过充电效果指标的对置电极电位的面内差异为新派生。显示装置被设计成满足将新导出的对置电极电位的平面内的差减小到允许极限以下的条件。版权所有（C）2013，JPO＆INPIT

2. 发明申请

US20080074571A1 Display device and manufacturing method thereof 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US20080074571A1
公开(公告)日：2008-03-27
申请号：US11900246
申请日：2007-09-11
申请人： Hideo Kawano , Hideki Sunayama
发明人： Hideo Kawano , Hideki Sunayama
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G02F1/136204 , G02F1/136213
摘要： The object of the present invention is to provide a liquid crystal display device, which can be used in the active matrix type liquid crystal display device and has a wiring structure of superfine wiring, and a method for manufacturing the liquid crystal display device, wherein it can reduce the occurrence rate of the failures caused by the static electricity which damages the insulating layer of the electrodes or between the electrodes in the manufacturing process, and the time constant of the scan line can be improved simultaneously. In the manufacturing process for the array substrate, the wiring width in the portions of the scan line where the scan lines intersect the auxiliary capacitance bunching lines is narrowed, meanwhile, the area of the portions where the scan lines intersect the auxiliary capacitance bunching lines is reduced, and the wiring capacitance is reduced, the time constant of the scan line is decreased, meanwhile, the wiring width in portions of the auxiliary capacitance lines where they intersect the auxiliary capacitance bunching line is enlarged, the distance between the adjacent scan line and the nearest portion of the auxiliary capacitance line is shortened, and the static charges brought by the manufacturing process, and the like, discharge at the nearest portion, and the failure products caused by the static damage during the manufacturing process can be prevented from occurring.
摘要翻译：本发明的目的是提供一种可用于有源矩阵型液晶显示装置并具有超细布线的布线结构的液晶显示装置和液晶显示装置的制造方法，其中可以降低在制造过程中由于电极绝缘层或电极之间的静电引起的故障的发生率，并且可以同时提高扫描线的时间常数。在阵列基板的制造工序中，扫描线与辅助电容聚束线相交的扫描线的部分的布线宽度变窄，同时扫描线与辅助电容聚束线相交的部分的面积为并且布线电容减小，扫描线的时间常数减小，同时辅助电容线的与辅助电容聚束线相交的部分的布线宽度增大，相邻的扫描线与辅助电容线的最近部分被缩短，并且由制造过程引起的静电等等在最近部分放电，并且可以防止在制造过程中由静电损伤引起的故障产物。

3. 发明授权

US06380591B1 Electrode wiring board subjected to counter measure against static electricity and display device using the same 有权
标题翻译：对静电进行对抗的电极接线板及使用其的显示装置
公开(公告)号：US06380591B1
公开(公告)日：2002-04-30
申请号：US09198530
申请日：1998-11-24
申请人： Hideo Kawano
发明人： Hideo Kawano
IPC分类号： H01L2940
CPC分类号： G02F1/136204
摘要： A step portion is formed in an insulating layer provided between two opposing electrode layers outside a pixel electrode formation region, so that a projection portions are formed on the two electrode layers, wherein the shape of the projection portions of the electrode layers is of an electric-field concentration type to induce discharging between the opposing portions of the layers via the insulating layer.
摘要翻译：在设置在像素电极形成区域外部的两个相对电极层之间的绝缘层中形成台阶部分，使得在两个电极层上形成突起部分，其中电极层的突出部分的形状为电场浓度型，以经由绝缘层诱导层的相对部分之间的放电。

4. 发明授权

US6078366A Array substrate comprising semiconductor contact layers having same outline as signal lines 有权
标题翻译：阵列基板包括具有与信号线相同轮廓的半导体接触层
公开(公告)号：US6078366A
公开(公告)日：2000-06-20
申请号：US187422
申请日：1998-11-06
申请人： Masayuki Dohjo , Hideo Kawano , Akira Kubo , Makoto Shibusawa , Tetsuya Iizuka , Tamio Nakai , Kazushige Mori
发明人： Masayuki Dohjo , Hideo Kawano , Akira Kubo , Makoto Shibusawa , Tetsuya Iizuka , Tamio Nakai , Kazushige Mori
IPC分类号： G02F1/13 , G02F1/1345 , G02F1/1362 , H01L21/77 , H01L21/84 , H01L27/12 , G02F1/136 , G02F1/1343 , H01L29/04
CPC分类号： G02F1/13458 , G02F1/1345 , G02F1/13452 , G02F1/136213 , G02F1/136227 , H01L27/1214 , G02F2001/13629
摘要： An array substrate includes plural scanning lines (111); a thin film transistor (112) having a first dielectric film (115), (117), a semiconductor film (120) thereon, and a source electrode (126b) electrically coupled to the semiconductor film (120) and a drain electrode (126a); a signal line (110) as taken out of the drain electrode (126a) to extend at substantially right angles to the scanning lines (111); and a pixel electrode (131) electrically connected to the source electrode (126b), wherein the pixel electrode (131) is electrically connected to the source electrode (126b) through a second dielectric film (127) as disposed on at least the signal line (110) while the pixel electrode (131) overlaps an elongate region (113) from its neighboring scanning line (111) through the first and second dielectric films (115), (117), (127). With such an arrangement, an appropriate storage capacitor can be formed by causing the scanning lines and pixel electrode to overlap each other without having to decrease the manufacturing yield while enabling achievement of high aperture ratio.
摘要翻译：阵列基板包括多个扫描线（111）; 具有第一电介质膜（115），（117），其上的半导体膜（120）和与半导体膜（120）电耦合的源电极（126b）和漏电极（126a）的薄膜晶体管（112））; 从所述漏电极（126a）取出以与所述扫描线（111）大致直角延伸的信号线（110）。以及与源电极（126b）电连接的像素电极（131），其中像素电极（131）通过设置在至少信号线上的第二电介质膜（127）与源电极（126b）电连接（110），而像素电极（131）通过第一和第二介电膜（115），（117），（127）与其相邻扫描线（111）的细长区域（113）重叠。通过这样的布置，可以通过使扫描线和像素电极彼此重叠而不必降低制造成品率而能够实现高开口率而形成适当的存储电容器。

5. 发明授权

US6028652A Array substrate for display device and manufacturing method thereof 有权
标题翻译：显示装置用阵列基板及其制造方法
公开(公告)号：US6028652A
公开(公告)日：2000-02-22
申请号：US187919
申请日：1998-11-06
申请人： Masayuki Dohjo , Hideo Kawano , Akira Kubo , Makoto Shibusawa , Tetsuya Iizuka , Tamio Nakai , Kazushige Mori
发明人： Masayuki Dohjo , Hideo Kawano , Akira Kubo , Makoto Shibusawa , Tetsuya Iizuka , Tamio Nakai , Kazushige Mori
IPC分类号： G02F1/13 , G02F1/1345 , G02F1/1362 , H01L21/77 , H01L21/84 , H01L27/12 , G02F1/136 , G02F1/139 , H01L29/04
CPC分类号： G02F1/13458 , G02F1/1345 , G02F1/13452 , G02F1/136213 , G02F1/136227 , H01L27/1214 , G02F2001/13629
摘要： An array substrate includes plural scanning lines (111); a thin film transistor (112) having a first dielectric film (115), (117), a semiconductor film (120) thereon, and a source electrode (126b) electrically coupled to the semiconductor film (120) and a drain electrode (126a); a signal line (110) as taken out of the drain electrode (126a) to extend at substantially right angles to the scanning lines (111); and a pixel electrode (131) electrically connected to the source electrode (126b), wherein the pixel electrode (131) is electrically connected to the source electrode (126b) through a second dielectric film (127) as disposed on at least the signal line (110) while the pixel electrode (131) overlaps an elongate region (113) from its neighboring scanning line (111) through the first and second dielectric films (115), (117), (127).With such an arrangement, an appropriate storage capacitor can be formed by causing the scanning lines and pixel electrode to overlap each other without having to decrease the manufacturing yield while enabling achievement of high aperture ratio.
摘要翻译：阵列基板包括多个扫描线（111）; 具有第一电介质膜（115），（117），其上的半导体膜（120）和与半导体膜（120）电耦合的源电极（126b）和漏电极（126a）的薄膜晶体管（112））; 从所述漏电极（126a）取出以与所述扫描线（111）大致直角延伸的信号线（110）。以及与源电极（126b）电连接的像素电极（131），其中像素电极（131）通过设置在至少信号线上的第二电介质膜（127）与源电极（126b）电连接（110），而像素电极（131）通过第一和第二介电膜（115），（117），（127）与其相邻扫描线（111）的细长区域（113）重叠。通过这样的布置，可以通过使扫描线和像素电极彼此重叠而不必降低制造成品率而能够实现高开口率而形成适当的存储电容器。

6. 发明授权

US5858853A Method for forming capacitor electrode having jagged surface 失效
标题翻译：形成具有锯齿状表面的电容器电极的方法
公开(公告)号：US5858853A
公开(公告)日：1999-01-12
申请号：US550624
申请日：1995-10-31
申请人： Seiichi Shishiguchi , Tatsuya Suzuki , Hideo Kawano , Keiji Shiotani , Masao Mikami
发明人： Seiichi Shishiguchi , Tatsuya Suzuki , Hideo Kawano , Keiji Shiotani , Masao Mikami
IPC分类号： H01L27/04 , H01L21/02 , H01L21/31 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L29/94 , H01L21/20
CPC分类号： H01L28/84 , H01L29/94 , Y10S148/014
摘要： In a method for forming a capacitor, after preparing a substrate having at least one device area thereon, an amorphous silicon film containing one type of dopant is formed on the device area. A mask layer comprising mask islands is formed and distributed on a surface of the amorphous silicon film. The surface of the amorphous silicon is dry-etched by using the mask layer as a selective etching mask to produce a jagged surface having a lot of protrusions. After forming the jagged surface, the amorphous silicon film is changed into a polycrystalline silicon film serving as a storage electrode. Finally, a dielectric film and then another storage electrode are formed sequentially on the jagged surface of the storage electrode.
摘要翻译：在形成电容器的方法中，在制备其上具有至少一个器件面积的衬底之后，在器件区域上形成含有一种类型的掺杂剂的非晶硅膜。包含掩模岛的掩模层形成并分布在非晶硅膜的表面上。通过使用掩模层作为选择性蚀刻掩模对非晶硅的表面进行干蚀刻，以产生具有大量突起的锯齿状表面。在形成锯齿状表面之后，将非晶硅膜变成用作存储电极的多晶硅膜。最后，在存储电极的锯齿状表面上依次形成电介质膜，然后形成另一个存储电极。

7. 发明授权

US4434491A Semiconductor laser 失效
标题翻译：半导体激光器
公开(公告)号：US4434491A
公开(公告)日：1984-02-28
申请号：US248157
申请日：1981-03-30
申请人： Isamu Sakuma , Katsuhiko Nishida , Hideo Kawano , Masayasu Ueno , Yoshishige Matsumoto , Shohei Matsumoto , Takao Furuse
发明人： Isamu Sakuma , Katsuhiko Nishida , Hideo Kawano , Masayasu Ueno , Yoshishige Matsumoto , Shohei Matsumoto , Takao Furuse
IPC分类号： H01S5/223 , H01S3/19
CPC分类号： H01S5/2232 , H01S5/2234
摘要： A semiconductor laser of the rib guide type having the thickness of an active layer within a stripe-shaped region thicker than that of the outside, and thus the stripe-shaped region is made to have a waveguide action and, thereby, fundamental mode laser may be achieved.
摘要翻译：肋引导型的半导体激光器具有比外部厚的条形区域内的有源层的厚度，并且因此使条形区域具有波导作用，因此基模激光器实现。

8. 发明申请

US20140253858A1 ACTIVE MATRIX DISPLAY DEVICE 审中-公开
标题翻译：主动矩阵显示设备
公开(公告)号：US20140253858A1
公开(公告)日：2014-09-11
申请号：US14343419
申请日：2012-05-30
申请人： Hideo Kawano
发明人： Hideo Kawano
IPC分类号： G02F1/1343 , H01L27/32
CPC分类号： G02F1/134336 , G02F1/13439 , G02F1/1362 , G09G3/3648 , G09G2300/0417 , G09G2300/0819 , G09G2300/0852 , G09G2320/0247 , H01L27/1225 , H01L27/1255 , H01L27/3276 , H01L29/41733
摘要： To restrain decrease of display quality because of increases in flicker level and decrease of uniformity in screen luminance caused by increases in the overcharging effect when an amorphous metal oxide semiconductor or an organic semiconductor that has an field-effect mobility greater than amorphous silicon is used for pixel TFTs in a liquid crystal display device or organic EL display device. A new relational formula is derived for punch-through voltage in gray scale display, where the visibility of flicker, screen burn-in, and the like is high, and in-plane differential in counter electrode potential, which are an index of the overcharging effect. A design is made so as to satisfy conditions for decreasing the in-plane differential in counter electrode potential that have been newly derived on the basis of this formula to an allowable limit value or less.
摘要翻译：为了抑制由于使用非晶态金属氧化物半导体或具有大于非晶硅的场效应迁移率的有机半导体而使过度充电效果增加而引起的闪烁水平增加和屏幕亮度均匀性降低的显示质量降低液晶显示装置或有机EL显示装置中的像素TFT。导出了灰度显示中的穿透电压的新关系公式，其中闪烁，屏幕老化等的可视性高，并且对电极电位的面内差异是过度充电的指标影响。进行设计以满足将根据该公式新近导出的对置电极的面内差异减小到允许极限值以下的条件。

9. 发明授权

US07602453B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US07602453B2
公开(公告)日：2009-10-13
申请号：US11900246
申请日：2007-09-11
申请人： Hideo Kawano , Hideki Sunayama
发明人： Hideo Kawano , Hideki Sunayama
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G02F1/136204 , G02F1/136213
摘要： A liquid crystal display (LCD) device has a wiring structure of superfine wiring, wherein it can reduce the occurrence rate of electrostatic discharge (ESD), and the time constant of the scan line can be improved simultaneously. The wiring width in the portions of the scan lines where they intersect the auxiliary capacitance bunching lines is narrowed, so that the area of the intersection and the wiring capacitance is reduced, thus the time constant of the scan line is decreased, meanwhile, the wiring width in portions of the auxiliary capacitance lines where they intersect the auxiliary capacitance bunching line is enlarged, the distance between the adjacent scan line and the nearest portion of the auxiliary capacitance line is shortened, and the ESD occurs at the nearest portion, and the failure products caused by the ESD can be decreased.
摘要翻译：液晶显示器（LCD）器件具有超细布线的布线结构，可以降低静电放电（ESD）的发生率，同时可以提高扫描线的时间常数。扫描线与辅助电容聚束线相交的部分的布线宽度变窄，交叉区域和布线电容减小，扫描线的时间常数减小，同时布线辅助电容线的与辅助电容聚束线相交的部分的宽度被扩大，相邻扫描线与辅助电容线的最近部分之间的距离缩短，并且ESD发生在最近的部分，并且故障可以减少由ESD引起的产品。

10. 发明申请

US20080164524A1 Optical mask employed for manufacturing array substrate, array substrate and method for manufacturing the same 审中-公开
标题翻译：用于制造阵列基板的光掩模，阵列基板及其制造方法
公开(公告)号：US20080164524A1
公开(公告)日：2008-07-10
申请号：US12002704
申请日：2007-12-18
申请人： Hideo Kawano , Hideki Sunayama
发明人： Hideo Kawano , Hideki Sunayama
IPC分类号： H01L27/12 , G03F1/00 , H01L21/84
CPC分类号： H01L27/1288 , G03F1/00 , G03F7/70791 , H01L27/1214
摘要： The invention provides wiring, which can form or disconnect freely the adjacent exposure regions by employing the same optical mask under a condition that a plurality of array substrates are produced on one mother glass substrate; and an optical mask, which can be inspected by utilizing the same probe device for inspecting even though under a condition that the same mother glass substrate is used to produce the array substrates with different sizes; array substrates; and the manufacture method of the same. The solution means is: the above optical mask is formed to allow: the wiring in upper section at up and down direction is formed in the upper end section of the array substrate, and the wiring in lower section at up and down direction is formed in the lower end section; and a “U shape turning section towards the boundary”, which is turned in a U shape to the boundary at the lower end side of said array substrate, is formed, and a “U shape turning section towards the center”, which is turned again in a U shape to the center section of said array substrate, is formed.
摘要翻译：本发明提供了一种布线，其可以在一个母玻璃基板上制造多个阵列基板的条件下，通过使用相同的光掩模，自由地形成或断开相邻的曝光区域; 即使在使用相同的母玻璃基板来制造具有不同尺寸的阵列基板的条件下，也可以通过利用相同的探针装置进行检查来检查光学掩模。阵列基板; 及其制造方法。解决方案是：上述光掩模形成为：可以在阵列基板的上端部形成上下方向的上部布线，并且在上下方向上的布线形成在下端部分; 和形成为U形的“U形转向部分朝向边界”的方式形成在所述阵列基板的下端侧的边界，并且形成“朝向中心的U形转动部分” 再次形成U形到所述阵列基板的中心部分。

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