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1. 发明授权

US08018006B2 Semiconductor device having an enlarged space area surrounding an isolation trench for reducing thermal resistance and improving heat dissipation 失效
标题翻译：半导体器件具有围绕隔离沟槽的扩大的空间区域，用于降低热阻并改善散热
公开(公告)号：US08018006B2
公开(公告)日：2011-09-13
申请号：US12759188
申请日：2010-04-13
申请人： Mitsuru Arai , Shinichiro Wada , Hideaki Nonami
发明人： Mitsuru Arai , Shinichiro Wada , Hideaki Nonami
IPC分类号： H01L21/70
CPC分类号： H01L21/84 , H01L27/1203 , H01L29/0692 , H01L29/7317 , H01L29/732
摘要： A semiconductor device includes a lower substrate, a thin semiconductor layer and an insulating layer formed between the lower substrate and the semiconductor layer. An active transistor area is formed with a base formed along a surface of the semiconductor layer, an emitter region formed in the base, a buried collector in the thin semiconductor layer to contact the insulating layer, a collector contacting the buried collector, and emitter, collector and base contacts. The active transistor area is configured to operate at an emitter current at least in the order of mA (milli-ampere). An isolation trench extends through the semiconductor layer to the insulating layer and surrounds the active transistor area with a distance in the order of μm (micron) from the active transistor area and with a space area of more than 50 μm2 between the active transistor area and the isolation trench.
摘要翻译：半导体器件包括下基板，薄半导体层和形成在下基板和半导体层之间的绝缘层。有源晶体管区域形成有沿着半导体层的表面形成的基底，形成在基底中的发射极区域，薄的半导体层中的与绝缘层接触的掩埋集电极，与埋入集电极接触的集电极和发射极，收集器和基座触点。有源晶体管区域被配置为以至少大约数毫安（毫安）的发射极电流工作。隔离沟槽延伸穿过半导体层到绝缘层并且围绕有源晶体管区域，距离有源晶体管区域的距离为μm（微米），并且在有源晶体管区域与有源晶体管区域之间具有大于50μm2的空间区域隔离沟。

2. 发明授权

US07696582B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07696582B2
公开(公告)日：2010-04-13
申请号：US12372847
申请日：2009-02-18
申请人： Mitsuru Arai , Shinichiro Wada , Hideaki Nonami
发明人： Mitsuru Arai , Shinichiro Wada , Hideaki Nonami
IPC分类号： H01L29/94 , H01L29/788 , H01L21/8238
CPC分类号： H01L27/1203 , H01L21/84 , H01L29/0692 , H01L29/7317
摘要： A semiconductor device having a bipolar transistor improved with heat dissipation. A semiconductor device having bipolar transistors formed in a plurality of device forming regions electrically isolated from each other by device isolation trenches traversing the semiconductor layer, in which a device isolation trench for each of unit bipolar transistors connected in parallel is removed and the plurality of unit bipolar transistors connected in series are entirely surrounded with one device isolation trench.
摘要翻译：具有通过散热改善的双极晶体管的半导体器件。一种具有双极晶体管的半导体器件，其形成在通过穿过半导体层的器件隔离沟槽彼此电隔离的多个器件形成区域中，其中用于并联连接的每个单位双极晶体管的器件隔离沟槽被去除，并且多个单元串联连接的双极晶体管完全被一个器件隔离沟道包围。

3. 发明授权

US07576406B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07576406B2
公开(公告)日：2009-08-18
申请号：US10773658
申请日：2004-02-09
申请人： Yoichi Tamaki , Hideaki Nonami , Masato Hamamoto
发明人： Yoichi Tamaki , Hideaki Nonami , Masato Hamamoto
IPC分类号： H01L29/00
CPC分类号： H01L27/0823
摘要： A plurality of the same kind of npn-type bipolar transistors are disposed regularly on a semiconductor layer that is provided over an insulation layer. The plurality of unit bipolar transistors are connected in parallel, thereby to form a plurality of desired bipolar transistors. A deep trench isolation surrounds a group of or the whole of the plurality of unit bipolar transistors that are connected in parallel, for a plurality of desired bipolar transistor that require thermal stability.
摘要翻译：多个相同种类的npn型双极晶体管规则地设置在设置在绝缘层上的半导体层上。多个单位双极晶体管并联连接，从而形成多个希望的双极晶体管。对于需要热稳定性的多个所需双极晶体管，深沟槽隔离围绕并联连接的多个单元双极晶体管的一组或全部。

4. 发明授权

US07569895B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07569895B2
公开(公告)日：2009-08-04
申请号：US11334498
申请日：2006-01-19
申请人： Mitsuri Arai , Shinichiro Wada , Hideaki Nonami
发明人： Mitsuri Arai , Shinichiro Wada , Hideaki Nonami
IPC分类号： H01L29/94
CPC分类号： H01L27/1203 , H01L21/84 , H01L29/0692 , H01L29/7317
摘要： A semiconductor device having a bipolar transistor improved with heat dissipation. A semiconductor device having bipolar transistors formed in a plurality of device forming regions electrically isolated from each other by device isolation trenches traversing the semiconductor layer, in which a device isolation trench for each of unit bipolar transistors connected in parallel is removed and the plurality of unit bipolar transistors connected in series are entirely surrounded with one device isolation trench.
摘要翻译：具有通过散热改善的双极晶体管的半导体器件。一种具有双极晶体管的半导体器件，其形成在通过穿过半导体层的器件隔离沟槽彼此电隔离的多个器件形成区域中，其中用于并联连接的每个单位双极晶体管的器件隔离沟槽被去除，并且多个单元串联连接的双极晶体管完全被一个器件隔离沟道包围。

5. 发明申请

US20090160016A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20090160016A1
公开(公告)日：2009-06-25
申请号：US12372847
申请日：2009-02-18
申请人： Mitsuru ARAI , Shinichiro Wada , Hideaki Nonami
发明人： Mitsuru ARAI , Shinichiro Wada , Hideaki Nonami
IPC分类号： H01L29/72
CPC分类号： H01L27/1203 , H01L21/84 , H01L29/0692 , H01L29/7317
摘要： A semiconductor device having a bipolar transistor improved with heat dissipation. A semiconductor device having bipolar transistors formed in a plurality of device forming regions electrically isolated from each other by device isolation trenches traversing the semiconductor layer, in which a device isolation trench for each of unit bipolar transistors connected in parallel is removed and the plurality of unit bipolar transistors connected in series are entirely surrounded with one device isolation trench.
摘要翻译：具有通过散热改善的双极晶体管的半导体器件。一种具有双极晶体管的半导体器件，其形成在通过穿过半导体层的器件隔离沟槽彼此电隔离的多个器件形成区域中，其中用于并联连接的每个单位双极晶体管的器件隔离沟槽被去除，并且多个单元串联连接的双极晶体管完全被一个器件隔离沟道包围。

6. 发明申请

US20080036032A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20080036032A1
公开(公告)日：2008-02-14
申请号：US11768740
申请日：2007-06-26
申请人： Hideaki Nonami
发明人： Hideaki Nonami
IPC分类号： H01L29/00
CPC分类号： H01L27/1203 , H01L23/5256 , H01L27/0802 , H01L2924/0002 , H01L2924/00
摘要： A trimming element for trimming a redundant circuit and a high-accuracy resistance in consideration of the stability and the ease of fuse cutting, and more specifically a trimming element which is easily formed by an existing process. An SOI substrate, a heater connected to the SOI substrate, and a fuse connected to the heater are formed.
摘要翻译：考虑到熔丝切割的稳定性和易熔性，更具体地说，通过现有方法容易地形成的修整元件，用于修整冗余电路的修整元件和高精度电阻。形成SOI衬底，连接到SOI衬底的加热器和连接到加热器的熔丝。

7. 发明申请

US20100314712A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20100314712A1
公开(公告)日：2010-12-16
申请号：US12759188
申请日：2010-04-13
申请人： Mitsuru Arai , Shinichiro Wada , Hideaki Nonami
发明人： Mitsuru Arai , Shinichiro Wada , Hideaki Nonami
IPC分类号： H01L29/73
CPC分类号： H01L21/84 , H01L27/1203 , H01L29/0692 , H01L29/7317 , H01L29/732
摘要： A semiconductor device includes a lower substrate, a thin semiconductor layer and an insulating layer formed between the lower substrate and the semiconductor layer. An active transistor area is formed with a base formed along a surface of the semiconductor layer, an emitter region formed in the base, a buried collector in the thin semiconductor layer to contact the insulating layer, a collector contacting the buried collector, and emitter, collector and base contacts. The active transistor area is configured to operate at an emitter current at least in the order of mA (milli-ampere). An isolation trench extends through the semiconductor layer to the insulating layer and surrounds the active transistor area with a distance in the order of μm (micron) from the active transistor area and with a space area of more than 50 μm2 between the active transistor area and the isolation trench.
摘要翻译：半导体器件包括下基板，薄半导体层和形成在下基板和半导体层之间的绝缘层。有源晶体管区域形成有沿着半导体层的表面形成的基底，形成在基底中的发射极区域，薄的半导体层中的与绝缘层接触的掩埋集电极，与埋入集电极接触的集电极和发射极，收集器和基座触点。有源晶体管区域被配置为以至少大约数毫安（毫安）的发射极电流工作。隔离沟槽延伸穿过半导体层到绝缘层并且围绕有源晶体管区域，距离有源晶体管区域的距离为μm（微米），并且在有源晶体管区域与有源晶体管区域之间具有大于50μm2的空间区域隔离沟。

8. 发明申请

US20060175635A1 Semiconductor device 失效
公开(公告)号：US20060175635A1
公开(公告)日：2006-08-10
申请号：US11334498
申请日：2006-01-19
申请人： Mitsuru Arai , Shinichiro Wada , Hideaki Nonami
发明人： Mitsuru Arai , Shinichiro Wada , Hideaki Nonami
IPC分类号： H01L31/109
CPC分类号： H01L27/1203 , H01L21/84 , H01L29/0692 , H01L29/7317
摘要： A semiconductor device having a bipolar transistor improved with heat dissipation. A semiconductor device having bipolar transistors formed in a plurality of device forming regions electrically isolated from each other by device isolation trenches traversing the semiconductor layer, in which a device isolation trench for each of unit bipolar transistors connected in parallel is removed and the plurality of unit bipolar transistors connected in series are entirely surrounded with one device isolation trench.

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