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1. 发明授权

US08840265B2 Illumination apparatus employing light-emitting device package 有权
标题翻译：采用发光装置封装的照明装置
公开(公告)号：US08840265B2
公开(公告)日：2014-09-23
申请号：US13099972
申请日：2011-05-03
申请人： Kyung-mi Moon , Young-hee Song , Ill-heung Choi , Jeong-wook Lee , Young-jin Lee
发明人： Kyung-mi Moon , Young-hee Song , Ill-heung Choi , Jeong-wook Lee , Young-jin Lee
IPC分类号： F21S4/00 , F21K99/00 , F21V29/00 , F21V23/06
CPC分类号： F21V23/06 , F21K9/275 , F21V29/507 , F21V29/83 , F21Y2103/10 , F21Y2115/10 , H01L2224/48091 , H01L2224/48247 , H01L2924/12044 , H01L2924/00014 , H01L2924/00
摘要： An illumination apparatus includes a light source unit comprising at least one light source module comprising a plurality of light-emitting device chips and a lead frame on which the light-emitting device chips are mounted and which connects the mounted light-emitting device chips; a diffusion cover having an interior space in which the light source module is accommodated and diffusing light emitted from the light source module; and an installation portion formed adjacent to the diffusion cover to install the light source module.
摘要翻译：一种照明装置，包括：光源单元，包括至少一个光源模块，所述至少一个光源模块包括多个发光器件芯片和引导框架，所述引线框架安装有所述发光器件芯片，并且连接所安装的发光器件芯片; 扩散盖，其具有容纳光源模块的内部空间和从光源模块发射的光; 以及与扩散罩相邻形成的安装部，以安装光源模块。

2. 发明授权

US07541682B2 Semiconductor chip having bond pads 有权
标题翻译：具有接合垫的半导体芯片
公开(公告)号：US07541682B2
公开(公告)日：2009-06-02
申请号：US11556153
申请日：2006-11-02
申请人： Young-Hee Song , Il-Heung Choi , Jeong-Jin Kim , Hae-Jeong Sohn , Chung-Woo Lee
发明人： Young-Hee Song , Il-Heung Choi , Jeong-Jin Kim , Hae-Jeong Sohn , Chung-Woo Lee
IPC分类号： H01L23/48 , H01L23/52 , H01L23/495 , H01L23/525 , H01L25/065
CPC分类号： H01L24/05 , H01L23/3128 , H01L23/4951 , H01L23/49575 , H01L23/525 , H01L23/5389 , H01L24/03 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L2224/0231 , H01L2224/0401 , H01L2224/04042 , H01L2224/05082 , H01L2224/05116 , H01L2224/05118 , H01L2224/05155 , H01L2224/0516 , H01L2224/05554 , H01L2224/05556 , H01L2224/05616 , H01L2224/05618 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/0566 , H01L2224/05669 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/48235 , H01L2224/48247 , H01L2224/4826 , H01L2224/48463 , H01L2224/48471 , H01L2224/49113 , H01L2224/73215 , H01L2224/73265 , H01L2225/0651 , H01L2225/06524 , H01L2225/06527 , H01L2225/06555 , H01L2225/06558 , H01L2225/06575 , H01L2225/06582 , H01L2225/06586 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/0105 , H01L2924/01068 , H01L2924/01078 , H01L2924/014 , H01L2924/04941 , H01L2924/10161 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/00 , H01L2924/00012 , H01L2224/45099
摘要： A semiconductor chip has one or more peripheral bond pads. The semiconductor chip comprises a semiconductor substrate having a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on at least a part of the peripheral region of the semiconductor substrate. A passivation layer is formed on the bond pad-wiring pattern and exposed portions of the semiconductor substrate; a pad-rearrangement pattern disposed over the passivation layer and electrically connected to the bond pad-wiring pattern; and an insulating layer formed over the pad-rearrangement pattern. The insulating layer has an opening therein that exposes a portion of the pad-rearrangement pattern to define a bond pad. The bond pad is disposed over at least a part of the cell region.
摘要翻译：半导体芯片具有一个或多个外围接合焊盘。半导体芯片包括具有彼此相邻的单元区域和外围电路区域的半导体衬底。在半导体衬底的周边区域的至少一部分上形成接合焊盘布线图案。在接合焊盘布线图案和半导体衬底的暴露部分上形成钝化层; 衬垫重排图案，设置在钝化层上并电连接到接合焊盘布线图案; 以及形成在垫重排图案上的绝缘层。绝缘层在其中具有露出焊盘重排图案的一部分以限定接合焊盘的开口。接合焊盘设置在电池区域的至少一部分上。

3. 发明授权

US07453159B2 Semiconductor chip having bond pads 有权
标题翻译：具有接合垫的半导体芯片
公开(公告)号：US07453159B2
公开(公告)日：2008-11-18
申请号：US11616857
申请日：2006-12-27
申请人： Young-Hee Song , Il-Heung Choi , Jeong-Jin Kim , Hae-Jeong Sohn , Chung-Woo Lee
发明人： Young-Hee Song , Il-Heung Choi , Jeong-Jin Kim , Hae-Jeong Sohn , Chung-Woo Lee
IPC分类号： H01L23/48 , H01L23/495 , H01L23/52 , H01L23/525 , H01L25/065
CPC分类号： H01L24/06 , H01L23/3128 , H01L23/4951 , H01L23/49575 , H01L23/525 , H01L23/5389 , H01L24/03 , H01L24/05 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L2224/02166 , H01L2224/0231 , H01L2224/0401 , H01L2224/04042 , H01L2224/05082 , H01L2224/05116 , H01L2224/05118 , H01L2224/05155 , H01L2224/0516 , H01L2224/05554 , H01L2224/05556 , H01L2224/05616 , H01L2224/05618 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/0566 , H01L2224/05669 , H01L2224/32145 , H01L2224/32245 , H01L2224/48 , H01L2224/48091 , H01L2224/48095 , H01L2224/48235 , H01L2224/48247 , H01L2224/4826 , H01L2224/48463 , H01L2224/48471 , H01L2224/73215 , H01L2224/73265 , H01L2225/0651 , H01L2225/06524 , H01L2225/06527 , H01L2225/06555 , H01L2225/06575 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2224/48227 , H01L2924/00 , H01L2924/00012 , H01L2224/32225 , H01L2224/45099
摘要： A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on the semiconductor substrate. A pad-rearrangement pattern is electrically connected to the bond pad-wiring pattern. The pad-rearrangement pattern includes a bond pad disposed over at least a part of the cell region. Thus, with the embodiments of the present invention, the overall chip size can thereby be substantially reduced and an MCP can be fabricated without the problems mentioned above.
摘要翻译：半导体芯片包括具有形成在单元区域和彼此相邻的外围电路区域的集成电路的半导体基板。在半导体衬底上形成接合焊盘布线图形。焊盘重排图案电连接到接合焊盘布线图案。垫重排图案包括设置在单元区域的至少一部分上的接合焊盘。因此，利用本发明的实施例，由此可以大大减小总体芯片尺寸，并且可以制造MCP而没有上述问题。

4. 发明申请

US20080105675A1 Cooking device 有权
标题翻译：烹饪设备
公开(公告)号：US20080105675A1
公开(公告)日：2008-05-08
申请号：US11976352
申请日：2007-10-24
申请人： Heung Choi , Hyun Kim
发明人： Heung Choi , Hyun Kim
IPC分类号： H05B6/72
CPC分类号： H05B6/745 , H05B6/74
摘要： A cooking device that cooks food and drink by using heat generation of a heater, or a heat source such as microwaves. A cooking device is provided in which the radiation of microwaves can be varied depending on load, such as cooking objects, when microwaves are used as a heat source. The cooking device includes a stirring shaft provided to rotate within a cooking chamber, a stirring shaft power source to rotate the stirring shaft, and a stirring vane coupled to the stirring shaft through a hinge unit and configured to rotate by a centrifugal force according to a rotation speed of the stirring shaft. The radiation of microwaves can be varied depending on a load such as a cooking object, and a cooking device having an optimized performance can be provided.
摘要翻译：通过使用加热器的发热或诸如微波的热源来烹饪食物和饮料的烹饪装置。提供了一种烹饪装置，其中当使用微波作为热源时，微波的辐射可以根据诸如烹饪物体之类的负载而变化。烹调装置包括设置成在烹饪室内旋转的搅拌轴，用于使搅拌轴旋转的搅拌轴动力源和通过铰链单元联接到搅拌轴的搅拌叶片，并且构造成通过离心力根据搅拌轴的转速。微波的辐射可以根据诸如烹饪物体的负载而变化，并且可以提供具有优化性能的烹饪装置。

5. 发明申请

US20070057367A1 SEMICONDUCTOR CHIP HAVING BOND PADS AND MULTI-CHIP PACKAGE 有权
公开(公告)号：US20070057367A1
公开(公告)日：2007-03-15
申请号：US11556156
申请日：2006-11-02
申请人： Young-Hee SONG , Il-Heung CHOI , Jeong-Jin KIM , Hae-Jeong SOHN , Chung-Woo LEE
发明人： Young-Hee SONG , Il-Heung CHOI , Jeong-Jin KIM , Hae-Jeong SOHN , Chung-Woo LEE
IPC分类号： H01L23/34
CPC分类号： H01L24/05 , H01L23/3128 , H01L23/4951 , H01L23/49575 , H01L23/525 , H01L23/5389 , H01L24/03 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L2224/0231 , H01L2224/0401 , H01L2224/04042 , H01L2224/05082 , H01L2224/05116 , H01L2224/05118 , H01L2224/05155 , H01L2224/0516 , H01L2224/05554 , H01L2224/05556 , H01L2224/05616 , H01L2224/05618 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/0566 , H01L2224/05669 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/48235 , H01L2224/48247 , H01L2224/4826 , H01L2224/48463 , H01L2224/48471 , H01L2224/49113 , H01L2224/73215 , H01L2224/73265 , H01L2225/0651 , H01L2225/06524 , H01L2225/06527 , H01L2225/06555 , H01L2225/06558 , H01L2225/06575 , H01L2225/06582 , H01L2225/06586 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/0105 , H01L2924/01068 , H01L2924/01078 , H01L2924/014 , H01L2924/04941 , H01L2924/10161 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/00 , H01L2924/00012 , H01L2224/45099
摘要： A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on the semiconductor substrate. A pad-rearrangement pattern is electrically connected to the bond pad-wiring pattern. The pad-rearrangement pattern includes a bond pad disposed over at least a part of the cell region. The bond pad-wiring pattern is formed substantially in a center region of the semiconductor substrate. Thus, with the embodiments of the present invention, the overall chip size can thereby be substantially reduced and an MCP can be fabricated without the problems mentioned above.

6. 发明授权

US06864566B2 Duel die package 有权
标题翻译：决斗模包
公开(公告)号：US06864566B2
公开(公告)日：2005-03-08
申请号：US10157585
申请日：2002-05-28
申请人： Ill Heung Choi
发明人： Ill Heung Choi
IPC分类号： H01L25/18 , H01L23/48 , H01L23/495 , H01L25/065 , H01L25/07 , H01L23/02
CPC分类号： H01L24/06 , H01L23/4951 , H01L23/49537 , H01L23/49575 , H01L24/05 , H01L24/48 , H01L2224/04042 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/06136 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2924/19107 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： An improved dual die package is disclosed. The dual die package includes a first lead frame connected to a first semiconductor chip and a second lead frame connected to a second semiconductor chip. The first leads and the second leads are electrically connected to one another using a wirebonding process rather than a thermocompression process thereby allowing conventional packaging equipment to be used when manufacturing a dual die package.
摘要翻译：公开了一种改进的双管芯封装。双管芯封装包括连接到第一半导体芯片的第一引线框架和连接到第二半导体芯片的第二引线框架。第一引线和第二引线使用引线键合工艺而不是热压工艺彼此电连接，从而允许在制造双管芯封装时使用常规封装设备。

7. 发明授权

US06825511B2 Semiconductor device having fuse circuit on cell region and method of fabricating the same 失效
标题翻译：在单元区域具有熔丝电路的半导体器件及其制造方法
公开(公告)号：US06825511B2
公开(公告)日：2004-11-30
申请号：US10269202
申请日：2002-10-10
申请人： Young-Hee Song , Ill-Heung Choi , Min-Young Son , Min-Sang Park
发明人： Young-Hee Song , Ill-Heung Choi , Min-Young Son , Min-Sang Park
IPC分类号： H01L2710
CPC分类号： H01L24/05 , H01L23/5258 , H01L24/03 , H01L24/45 , H01L24/48 , H01L27/10897 , H01L2224/04042 , H01L2224/05155 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/451 , H01L2224/45144 , H01L2224/48463 , H01L2224/48599 , H01L2224/48624 , H01L2224/48644 , H01L2224/48647 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/12042 , H01L2924/19041 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device, capable of improving integration density and solving problems that may occur in a laser repair process, and a method of fabricating the same are provided. A fuse circuit is formed in a cell region, not in a peripheral region, and thus it is possible to reduce the size of a semiconductor chip.
摘要翻译：提供能够提高集成密度并解决激光修复过程中可能发生的问题的半导体器件及其制造方法。在单元区域中形成熔丝电路，而不是在周边区域，因此可以减小半导体芯片的尺寸。

8. 发明授权

US06522385B2 Air shower head of photolithography equipment for directing air towards a wafer stage 失效
标题翻译：用于将空气引向晶片台的光刻设备的空气喷头
公开(公告)号：US06522385B2
公开(公告)日：2003-02-18
申请号：US09848284
申请日：2001-05-04
申请人： Yo-Han Ahn , Byung-Moo Lee , Hyun-Joon Kim , Jai-Heung Choi
发明人： Yo-Han Ahn , Byung-Moo Lee , Hyun-Joon Kim , Jai-Heung Choi
IPC分类号： G03B2752
CPC分类号： G03F7/70908 , G03F7/70866 , G03F7/70933
摘要： An air shower head of an exposure device of photolithography equipment is free of chemical substances that could otherwise contaminate a photoresist layer on a semiconductor wafer and degrade the profile of the photoresist pattern. The air shower head is interposed between a lens system of the exposure device and a wafer stage, and has a hole in the middle thereof through which exposure light can pass to a wafer supported on the stage. The air shower head includes an upper frame defining a cavity open at the bottom thereof, and a porous bottom member covering the bottom of the upper frame. The porous member is mechanically secured to bottom ends of both the inner and outer side walls of the upper frame, i.e., without the use of chemical binders, to reduce the ability of the air shower head to serve as a source of contamination.
摘要翻译：光刻设备的曝光装置的空气喷头不含化学物质，否则会污染半导体晶片上的光致抗蚀剂层并降低光致抗蚀剂图案的轮廓。空气喷头插入在曝光装置的透镜系统和晶片台之间，并且在其中间具有曝光光可以通过其到支撑在平台上的晶片的孔。空气喷头包括限定在其底部开口的空腔的上框架和覆盖上框架的底部的多孔底部构件。多孔构件机械地固定到上框架的内侧壁和外侧壁的底端，即不使用化学粘合剂，以降低空气淋浴头作为污染源的能力。

9. 发明授权

US06183589B2 Method for manufacturing lead-on-chip (LOC) semiconductor packages using liquid adhesive applied under the leads 失效
标题翻译：使用在引线下施加的液体粘合剂来制造片上芯片（LOC）半导体封装的方法
公开(公告)号：US06183589B2
公开(公告)日：2001-02-06
申请号：US09035965
申请日：1998-03-06
申请人： Shin Kim , Byung Man Kim , Il Heung Choi , Jeong Ho Bang
发明人： Shin Kim , Byung Man Kim , Il Heung Choi , Jeong Ho Bang
IPC分类号： B32B3100
CPC分类号： H01L24/27 , H01L23/4951 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/743 , H01L24/83 , H01L2224/2919 , H01L2224/32014 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/73215 , H01L2224/743 , H01L2224/83192 , H01L2224/8385 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/181 , Y10T29/49121 , Y10T29/53178 , Y10T156/17 , H01L2924/00 , H01L2924/3512 , H01L2224/45015 , H01L2924/207 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2224/85399
摘要： A method for manufacturing lead-on-chip (LOC) semiconductor packages includes steps of preparing a lead frame having inner leads and outer leads, and applying a liquid adhesive having a certain viscosity to the bottom surfaces of the inner leads. The method also includes positioning a semiconductor chip under the lead frame, to expose electrode pads through the space defined between opposing rows of inner leads. The inner leads are then attached to the active surface of the semiconductor chip by means of the liquid adhesive. The adhesive applying step may be carried out using a tool having discharge projections through which liquid adhesive is discharged from a reservoir. The liquid adhesive under the lead frame may be cured and then turned into a solid adhesive layer by thermocompression. The liquid adhesive is a thermosetting resin or a thermoplastic resin.
摘要翻译：一种制造芯片上芯片（LOC）半导体封装的方法包括制备具有内引线和外引线的引线框架的步骤，以及向内引线的底表面施加具有一定粘度的液体粘合剂。该方法还包括将半导体芯片定位在引线框架下方，以通过在相应的内引线行之间限定的空间露出电极焊盘。然后通过液体粘合剂将内部引线附接到半导体芯片的有源表面。粘合剂施加步骤可以使用具有从贮存器排出液体粘合剂的排出突起的工具进行。引线框架下方的液体粘合剂可以固化，然后通过热压变成固体粘合剂层。液体粘合剂是热固性树脂或热塑性树脂。

10. 发明申请

US20130092962A1 LIGHT EMITTING DEVICE (LED), MANUFACTURING METHOD THEREOF, AND LED MODULE USING THE SAME 审中-公开
标题翻译：发光装置（LED）及其制造方法及其使用的LED模块
公开(公告)号：US20130092962A1
公开(公告)日：2013-04-18
申请号：US13655100
申请日：2012-10-18
申请人： Ho Sun Paek , Hak Hwan Kim , Ill Heung Choi , Kyung Mi Moon
发明人： Ho Sun Paek , Hak Hwan Kim , Ill Heung Choi , Kyung Mi Moon
IPC分类号： H01L33/08 , H01L33/62
CPC分类号： H01L33/62 , H01L33/44 , H01L2224/16225
摘要： A light emitting device (LED), a manufacturing method thereof, and an LED module using the same. The LED may include a first semiconductor layer, an active layer, and a second semiconductor layer formed sequentially on a light-transmitting substrate, a first electrode formed in a region exposed by removing a part of the first semiconductor layer, a second electrode formed on the second semiconductor layer, a passivation layer formed on the first electrode and the second electrode to expose a region of the first electrode and a region of the second electrode, a first bump formed in a first region including the first electrode exposed through the passivation layer, and extended to another region of the second electrode on which the passivation layer is formed, and a second bump formed in a second region including the second electrode exposed through the passivation layer.
摘要翻译：发光装置（LED）及其制造方法以及使用其的LED模块。 LED可以包括在透光性基板上依次形成的第一半导体层，有源层和第二半导体层，形成在通过去除第一半导体层的一部分而露出的区域中的第一电极，形成在所述第二半导体层，形成在所述第一电极和所述第二电极上以钝化所述第一电极的区域和所述第二电极的区域的钝化层，形成在包括通过所述钝化层暴露的所述第一电极的第一区域中的第一凸起并且延伸到其上形成有钝化层的第二电极的另一区域，以及形成在包括通过钝化层暴露的第二电极的第二区域中的第二凸块。

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