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1. 发明授权

US5346862A Method for the electrical insulation of a circuit function element on a semiconductor component 失效
标题翻译：半导体元件上的电路功能元件的电绝缘方法
公开(公告)号：US5346862A
公开(公告)日：1994-09-13
申请号：US55351
申请日：1993-05-03
申请人： Lothar Schleicher , Hans-Peter Zwicknagl , Elke Schoening
发明人： Lothar Schleicher , Hans-Peter Zwicknagl , Elke Schoening
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/316 , H01L21/318 , H01L21/76 , H01L21/465
CPC分类号： H01L21/7605
摘要： Method for the electrical insulation of a function element on a semiconductor component, wherein the function element is etched into a mesa (9) using a mask (8). A dielectric (10) is then applied surface-wide at least up to the height of the mesa (9). The more deeply disposed portions of this dielectric layer are covered with photoresist (11), and the photoresist (11) is caused to flow by tempering and, thus, is caused to level the surface. Finally, the photoresist (11) and the dielectric (10) are re-etched with the same etching rate until the mesa is uncovered.
摘要翻译：用于半导体部件上的功能元件的电绝缘的方法，其中所述功能元件使用掩模（8）蚀刻到台面（9）中。然后将电介质（10）至少直至台面（9）的高度施加到表面宽度上。该介电层的较深的部分被光致抗蚀剂（11）覆盖，并使光致抗蚀剂（11）通过回火流动，从而使表面平坦化。最后，以相同的蚀刻速率再次蚀刻光致抗蚀剂（11）和电介质（10），直到台面未被覆盖。

2. 发明授权

US5070028A Method for manufacturing bipolar transistors having extremely reduced base-collection capacitance 失效
标题翻译：制造具有极低的基底电容的双极晶体管的方法
公开(公告)号：US5070028A
公开(公告)日：1991-12-03
申请号：US678047
申请日：1991-04-01
申请人： Helmut Tews , Hans-Peter Zwicknagl
发明人： Helmut Tews , Hans-Peter Zwicknagl
IPC分类号： H01L29/205 , H01L21/331 , H01L29/06 , H01L29/73 , H01L29/737
CPC分类号： H01L29/66318 , H01L29/0649 , Y10S148/01
摘要： A method for manufacturing a heterobipolar transistor having and at least greatly diminished extrinsic base-collector capacitance provides an insulation implantation in a sub-collector layer grown onto a semi-insulating substrate via a first mask that covers a region provided for the sub-collector to be constructed or the sub-collector is formed by doping the semi-insulating substrate through a mask. The semiconductor layers for the collector, the base and the emitter, the sub-collector being fashioned in a limited region provided therefore and the emitter is aligned on the sub-collector with a second mask.
摘要翻译：用于制造具有并且至少大大减小的非本征基极 - 集电极电容器的异质双极晶体管的方法通过覆盖设置用于次集电极的区域的第一掩模在半绝缘基板上生长的子集电极层中提供绝缘注入或通过掩模掺杂半绝缘基板形成子集电极。用于集电极，基极和发射极的半导体层，子集电极的形状设计在有限的区域内，并且发射极与第二掩模在子集电极上对准。

3. 发明授权

US4904612A Method for manufacturing a planar, self-aligned emitter-base complex 失效
标题翻译：制造平面，自对准发射体 - 基复合物的方法
公开(公告)号：US4904612A
公开(公告)日：1990-02-27
申请号：US374617
申请日：1989-06-30
申请人： Hans-Peter Zwicknagl , Josef Willer , Helmut Tews
发明人： Hans-Peter Zwicknagl , Josef Willer , Helmut Tews
IPC分类号： H01L29/73 , H01L21/28 , H01L21/331 , H01L29/737
CPC分类号： H01L29/66272 , H01L21/28 , H01L29/66318 , H01L29/7371 , Y10S148/011 , Y10S438/951
摘要： A method for the manufacture of a planar, self-aligned emitter-base complex, whereby a semiconductor layer structure standard for hetero-bipolar transistors is first grown on a substrate, the base regions are subsequently etching through a mask technique and are provided with the base metallization and with a first dielectric layer and insulation implantations and spacers for electrical insulation of the base are manufactured, and, following thereupon, the emitter region is provided with the emitter metallization and with a third dielectric layer.
摘要翻译：一种用于制造平面，自对准的发射极 - 基极复合体的方法，由此首先在衬底上生长用于异质双极晶体管的半导体层结构标准，然后通过掩模技术蚀刻基底区域，并且提供基底金属化和第一介电层，并且制造用于基底的电绝缘的绝缘注入和间隔物，随后，发射极区域设置有发射极金属化和第三介电层。

4. 发明授权

US06548882B1 Power transistor cell 有权
标题翻译：功率晶体管单元
公开(公告)号：US06548882B1
公开(公告)日：2003-04-15
申请号：US09500410
申请日：2000-02-08
申请人： Hans-Peter Zwicknagl , Peter Baureis , Jan-Erik Müller
发明人： Hans-Peter Zwicknagl , Peter Baureis , Jan-Erik Müller
IPC分类号： H01L2900
CPC分类号： H01L23/367 , H01L23/3677 , H01L25/072 , H01L2924/0002 , H01L2924/00
摘要： A power transistor cell includes an air bridge and a plurality of individual transistors. Each of the plurality of individual transistors has at least one separate connection contact. Each of the at least one separate connection contact of the plurality of individual transistors is thermally conductively connected to one another through the air bridge forming air bridge connections, which define a contact plane. A surface of the contact plane that contains each connection path between two of the air bridge connections defines a convex region. The air bridge is formed to have, in the contact plane, dimensions that exceed a smallest convex region containing all of the air bridge connections in all directions of the air bridge. Each of the plurality of power transistor cells can be respectively thermally conductively connected to one another through the air bridge to form a block of power transistor cells. The air bridge has a dimension that significantly exceeds the length of the contact fingers in the longitudinal direction of the contact fingers, so that components of the air bridge that are present at the sides of a row of contact fingers can be mounted on metallic connection surfaces or on the substrate surface by conductive contact pillars. The configuration provides good heat dissipation from the individual transistors.
摘要翻译：功率晶体管单元包括空气桥和多个单独的晶体管。多个独立晶体管中的每一个具有至少一个单独的连接触点。多个单独晶体管的至少一个独立的连接触点中的每一个通过限定接触平面的空气桥形成空气桥连接彼此导热连接。包含两个空气桥连接件之间的每个连接路径的接触平面的表面限定了一个凸区域。空气桥形成为在接触平面中具有超过包含空气桥的所有方向上的所有空气桥连接的最小凸区域的尺寸。多个功率晶体管单元中的每一个可以分别通过空气桥彼此导热连接以形成功率晶体管单元的块。空气桥具有显着地超过接触指的纵向方向上的接触指的长度的尺寸，使得存在于一排接触指的侧面的空气桥的部件可以安装在金属连接表面上或者通过导电接触柱在基板表面上。该配置提供了来自各个晶体管的良好散热。

5. 发明授权

US5340755A Method of making planar heterobipolar transistor having trenched isolation of the collector terminal 失效
标题翻译：制造具有沟槽隔离集电极端子的平面异双极晶体管的方法
公开(公告)号：US5340755A
公开(公告)日：1994-08-23
申请号：US912271
申请日：1992-10-13
申请人： Hans-Peter Zwicknagl , Joachim Hoepfner , Lothar Schleicher
发明人： Hans-Peter Zwicknagl , Joachim Hoepfner , Lothar Schleicher
IPC分类号： H01L21/28 , H01L21/331 , H01L29/737 , H01L21/265 , H01L29/70
CPC分类号： H01L29/66318 , H01L21/28 , H01L29/7371 , Y10S148/072
摘要： A planar heterobipolar transistor and its methods for manufacture provide that the transistor has the base-emitter region separated from the collector terminal by a collector parting trench and the parting trench structure may be used to separate the transistor from adjoining function components.
摘要翻译：平面异质双极晶体管及其制造方法提供晶体管具有通过集电极分离沟槽与集电极端子分离的基极 - 发射极区域，并且分离沟槽结构可用于将晶体管与相邻的功能部件分离。

6. 发明授权

US5436475A Bipolar transistor for high power in the microwave range 失效
标题翻译：双极晶体管用于大功率微波范围
公开(公告)号：US5436475A
公开(公告)日：1995-07-25
申请号：US246481
申请日：1994-05-19
申请人： Helmut Tews , Hans-Peter Zwicknagl
发明人： Helmut Tews , Hans-Peter Zwicknagl
IPC分类号： H01L21/331 , H01L29/417 , H01L29/73 , H01L29/737 , H01L29/161 , H01L29/205 , H01L29/225
CPC分类号： H01L29/7371 , H01L29/41708 , H01L29/73
摘要： A power transistor has a plurality of small emitter-base complexes arranged in an array. These complexes are electrically insulated from the surrounding semiconductor material by separating regions such that for the current supply to the collectors, a joint subcollector layer and thereupon a collector metallization exist outside of the emitter-base complexes and reaching up to the separating regions. The individual emitter-base complexes are electrically connected with each other via strip-shaped base supply lines and strip-shaped emitter supply lines, and also with a base contact surface and an emitter contact surface.
摘要翻译：功率晶体管具有排列成阵列的多个小的发射极 - 基极复合体。这些络合物通过分离区域与周围半导体材料电绝缘，使得对于集电体的电流供应，接合子集电极层和集电极金属化存在于发射极 - 基极复合体之外并且达到分离区域。单独的发射极 - 基极复合体通过条形基极电源线和条形发射器电源线以及基极接触表面和发射极接触表面彼此电连接。

7. 发明授权

US5274266A Permeable base transistor having selectively grown emitter 失效
标题翻译：具有选择性地生长的发射极的可渗透的基极晶体管
公开(公告)号：US5274266A
公开(公告)日：1993-12-28
申请号：US15040
申请日：1993-02-08
申请人： Helmut Tews , Hans-Peter Zwicknagl
发明人： Helmut Tews , Hans-Peter Zwicknagl
IPC分类号： H01L21/335 , H01L29/772 , H01L29/72
CPC分类号： H01L29/66424 , H01L29/66454 , H01L29/7722
摘要： A permeable base transistor has an emitter layer or emitter layer sequence composed of a semiconductor material which has a greater energy band gap than a semiconductor material of a base layer. This emitter layer or emitter layer sequence is selectively grown into an opening of the base layer and onto a collector layer situated therebelow.
摘要翻译：可渗透的基极晶体管具有由半导体材料构成的发射极层或发射极层序列，该半导体材料具有比基底层的半导体材料更大的能带隙。该发射极层或发射极层序列被选择性地生长到基底层的开口中并位于其下方的集电极层上。

8. 发明授权

US5093272A Manufacturing method for a self-aligned emitter-base-complex for heterobipolar transistors 失效
标题翻译：用于双极晶体管的自对准发射极复合物的制造方法
公开(公告)号：US5093272A
公开(公告)日：1992-03-03
申请号：US620625
申请日：1990-12-03
申请人： Joachim Hoepfner , Helmut Tews , Hans-Peter Zwicknagl
发明人： Joachim Hoepfner , Helmut Tews , Hans-Peter Zwicknagl
IPC分类号： H01L29/73 , H01L21/28 , H01L21/331 , H01L29/205 , H01L29/737
CPC分类号： H01L29/66318 , H01L21/28 , Y10S148/01 , Y10S438/951
摘要： Method for manufacturing a self-aligned emitter-base complex whereby a sequence of epitaxial layers, which corresponds to the optimal base-emitter layer sequence in the re-etched part of the heterobipolar transistor is grown. Subsequently, the base implantation is introduced using a dummy-emitter as a mask. Using a dielectric mask covering the region not covered by the dummy-emitter, after the removal of the dummy-emitter the emitter contact layers are selectively grown in its region. The contacting is then provided.
摘要翻译：用于制造自对准发射极 - 基极复合体的方法，由此生长对应于异质双极晶体管的再蚀刻部分中的最佳基极 - 发射极层序列的外延层序列。随后，使用伪发射极作为掩模引入基极注入。使用覆盖未被虚拟 - 发射极覆盖的区域的介电掩模，在去除虚拟 - 发射极之后，在其区域中选择性地生长发射极接触层。然后提供接触。

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