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1. 发明申请

WO1987001511A1 NON-VOLATILE SEMICONDUCTOR MEMORIES 审中-公开
标题翻译：非易失性半导体存储器
公开(公告)号：WO1987001511A1
公开(公告)日：1987-03-12
申请号：PCT/GB1986000509
申请日：1986-08-27
申请人： HUGHES MICROELECTRONICS LIMITED , WEST, James, Lionel , OWEN, Alan, Ernest , KRISHNA, Komanduri, Venkata , DELIMA, Joaquim, Joao
发明人： HUGHES MICROELECTRONICS LIMITED
IPC分类号： H01L29/62
CPC分类号： H01L29/513 , H01L29/517 , H01L29/518 , H01L29/792
摘要： Insulating layers responsible for the trapping of electric charge in non-volatile semiconductor memories, such as FAMOS or MNOS, are fabricated as thicker layers when doped with metals having partially filled d or f electron shells. Typically the insulating layer is silicon oxide doped with up to 10 atomic % of a first transition series metal.
摘要翻译：当掺杂有具有部分填充的d或f电子壳的金属时，负责在非易失性半导体存储器（例如FAMOS或MNOS）中捕获电荷的绝缘层被制造为更厚的层。通常，绝缘层是掺杂有多达10原子％的第一过渡系列金属的氧化硅。

2. 发明申请

WO1988000775A1 AN ELECTRONIC COUNTER 审中-公开
标题翻译：电子计数器
公开(公告)号：WO1988000775A1
公开(公告)日：1988-01-28
申请号：PCT/GB1987000487
申请日：1987-07-10
申请人： HUGHES MICROELECTRONICS LIMITED , WARNER, David, John
发明人： HUGHES MICROELECTRONICS LIMITED
IPC分类号： H03K23/54
CPC分类号： H03K21/403 , H03K21/00 , H03K23/542
摘要： An electronic counter such as for use in the odometer of a motor vehicle is provided comprising an array (10) of m rows and n columns of single flip-flop data latches and a central shifting unit (CSU) (14). The CSU (14) comprises a row of n data latches arranged to read data from and write data to each of the m rows of data latches of the array (10). In operation, the CSU (14) reads data from a row of data latches of the array, performs a shift operation on the data and an invert operation on one of n data latches of the CSU (14) and returns the data so operated on to the row of data latches in the array (10). By these steps, a counting operation in Johnson code is performed on the data. This invention uses less chip area than known counters.

3. 发明授权

EP0408234B1 A non-volatile counter 失效
标题翻译：非易失性计数器
公开(公告)号：EP0408234B1
公开(公告)日：1996-03-20
申请号：EP90307241.1
申请日：1990-07-03
申请人： HUGHES MICROELECTRONICS LIMITED
发明人： Bennett, Daniel Harrison , Murray, Kenelm Gerald Digby , Dodd, Gary Lawrence
IPC分类号： H03K21/40 , G06F11/20
CPC分类号： H03K21/403

4. 发明授权

EP0408233B1 A non-volatile RAM bit cell 失效
标题翻译：非易失性RAM位单元。
公开(公告)号：EP0408233B1
公开(公告)日：1995-09-13
申请号：EP90307240.3
申请日：1990-07-03
申请人： HUGHES MICROELECTRONICS LIMITED
发明人： Bennett, Daniel Harrison , Murray, Kenelm Gerald Digby , Dodd, Gary Lawrence
IPC分类号： G11C11/00 , G11C14/00 , G11C16/04 , G11C29/00
CPC分类号： G11C29/04 , G11C11/005 , G11C14/00 , G11C16/0441

5. 发明授权

EP0273954B1 AN ELECTRONIC COUNTER 失效
标题翻译：电子计数器
公开(公告)号：EP0273954B1
公开(公告)日：1992-09-30
申请号：EP87904400.6
申请日：1987-07-10
申请人： Hughes Microelectronics Limited
发明人： WARNER, David, John
IPC分类号： H03K23/54
CPC分类号： H03K21/403 , H03K21/00 , H03K23/542
摘要： An electronic counter such as for use in the odometer of a motor vehicle is provided comprising an array (10) of m rows and n columns of single flip-flop data latches and a central shifting unit (CSU) (14). The CSU (14) comprises a row of n data latches arranged to read data from and write data to each of the m rows of data latches of the array (10). In operation, the CSU (14) reads data from a row of data latches of the array, performs a shift operation on the data and an invert operation on one of n data latches of the CSU (14) and returns the data so operated on to the row of data latches in the array (10). By these steps, a counting operation in Johnson code is performed on the data. This invention uses less chip area than known counters.

6. 发明公开

EP0408234A3 A non-volatile counter 失效
标题翻译：非挥发性计数器
公开(公告)号：EP0408234A3
公开(公告)日：1991-10-30
申请号：EP90307241.1
申请日：1990-07-03
申请人： HUGHES MICROELECTRONICS LIMITED
发明人： Bennett, Daniel Harrison , Murray, Kenelm Gerald Digby , Dodd, Gary Lawrence
IPC分类号： H03K21/40 , G06F11/20
CPC分类号： H03K21/403
摘要： A non-volatile counter comprising:
an array of memory cells incorporating groups 1 of cells, each group 1 of cells being divided into word strings X, X′ capable of storing data words and associated fault flags FR,
sensing means 3 for checking the status of the memory cells and for issuing fault signals to the fault flags, and
logic means 5 responsive to the fault signals and fault flags for selecting the word strings,
wherein the memory cells each include at least two non-volatile transistors and wherein on detection of a fault in a word string X the stored data word is written into a second word string X′.

7. 发明公开

EP0408234A2 A non-volatile counter 失效
标题翻译： NichtflüchtigerZähler。
公开(公告)号：EP0408234A2
公开(公告)日：1991-01-16
申请号：EP90307241.1
申请日：1990-07-03
申请人： HUGHES MICROELECTRONICS LIMITED
发明人： Bennett, Daniel Harrison , Murray, Kenelm Gerald Digby , Dodd, Gary Lawrence
IPC分类号： H03K21/40 , G06F11/20
CPC分类号： H03K21/403
摘要： A non-volatile counter comprising:
an array of memory cells incorporating groups 1 of cells, each group 1 of cells being divided into word strings X, X′ capable of storing data words and associated fault flags FR,
sensing means 3 for checking the status of the memory cells and for issuing fault signals to the fault flags, and
logic means 5 responsive to the fault signals and fault flags for selecting the word strings,
wherein the memory cells each include at least two non-volatile transistors and wherein on detection of a fault in a word string X the stored data word is written into a second word string X′.
摘要翻译：一种非易失性计数器，包括：包含单元组1的存储单元阵列，每组1个单元被分成字串X，能够存储数据字的X min和相关联的故障标志FR，用于检查状态的检测装置3 并且用于向故障标志发出故障信号，以及逻辑装置5，其响应故障信号和用于选择字串的故障标志，其中存储器单元各自包括至少两个非易失性晶体管，并且其中在检测到字串X中的故障将存储的数据字写入第二字串X min。

8. 发明公开

EP0390404A2 Sense amplifier 有权
标题翻译： Abfühlverstärker。
公开(公告)号：EP0390404A2
公开(公告)日：1990-10-03
申请号：EP90302995.7
申请日：1990-03-20
申请人： HUGHES MICROELECTRONICS LIMITED
发明人： Lever, Andrew Michael
IPC分类号： G11C7/06 , G11C16/06
CPC分类号： G11C16/28 , G11C7/062 , G11C2207/063
摘要： A sense amplifier for determining the logic state of a memory cell consists of a switch transistor (N2) for receiving current during sensing from the memory cell (NV1), a nonvolatile transistor (NV2) providing a reference current which is compared to a representation of the sensed current through the switch transistor (itself dependent on the state of NV1), a bistable latch (N4P4, N5P5) which is switched into one or other of its states depending on the result of the comparison, and a feedback from the output of the latch (NODE 3) to the gate of the switch transistor (N2) to isolate the amplifier from the memory cell after sensing.
摘要翻译：用于确定存储器单元的逻辑状态的读出放大器包括用于在从存储器单元（NV1）感测期间接收电流的开关晶体管（N2），提供参考电流的非易失性晶体管（NV2），其与通过开关晶体管的感测电流（其本身取决于NV1的状态），根据比较结果被切换到其状态中的一个或其他状态的双稳态锁存器（N4P4，N5P5）以及来自该输出的反馈锁存器（NODE 3）到开关晶体管（N2）的栅极，以便在感测后将放大器与存储器单元隔离。

9. 发明授权

EP0004734B1 Comparator 有权
标题翻译：比较器
公开(公告)号：EP0004734B1
公开(公告)日：1984-03-07
申请号：EP79300468.0
申请日：1979-03-23
申请人： Hughes Microelectronics Limited
发明人： Fowler, Albert Lewis
IPC分类号： G05D11/13 , F02D35/00 , G01R19/00
CPC分类号： F02D41/1479 , G01R19/0038

10. 发明公开

EP0058279A2 Non-volatile semiconductor memory circuits 失效
标题翻译： Nicht-flüchtigeHalbleiterspeicherschaltungen。
公开(公告)号：EP0058279A2
公开(公告)日：1982-08-25
申请号：EP81305783.3
申请日：1981-12-08
申请人： Hughes Microelectronics Limited
发明人： Edwards, Colin Walter , Murray, Kenelm Gerald Digby
IPC分类号： G11C11/34 , G11C5/00
CPC分类号： H03K3/356008 , G11C5/005 , G11C14/00
摘要： A non-volatile semiconductor memory circuit having at least one variable threshold FATMOS transistor (Q3, Q4) in the cross-coupled lateral branches and a plurality of input switching transistors controlling operation of the circuit. Capacitive imbalance between the nodes (X1, X2) of the circuit between a node (X1) and an input switching transistor (Q14) driven by the same control signal as a corresponding transistor (Q13) connected between the other node (X2) and an input switching transistor (Q15). This reduces the occurrence of wrong-state switching in the circuit during reading.
摘要翻译：一种在交叉耦合的侧向分支中具有至少一个可变阈值FATMOS晶体管（Q3，Q4）的非易失性半导体存储器电路以及控制该电路的操作的多个输入开关晶体管。节点（X1）和输入开关晶体管（Q14）之间的电路的节点（X1，X2）之间的电容性不平衡是由与另一个节点（X2）之间连接的相应晶体管（Q13）相同的控制信号驱动的，输入开关晶体管（Q15）。这减少了读取期间电路中错误状态切换的发生。

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