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    • 2. 发明申请
    • Information processing apparatus and access control method
    • 信息处理装置和访问控制方法
    • US20080270736A1
    • 2008-10-30
    • US12075220
    • 2008-03-10
    • Tsuyoshi NishidaGen WatanabeKazuyoshi KuwaharaHajime Sonobe
    • Tsuyoshi NishidaGen WatanabeKazuyoshi KuwaharaHajime Sonobe
    • G06F12/08
    • G06F12/08G06F9/30098G06F9/3824G06F9/3891
    • According to one embodiment, an information processing apparatus includes a processor including a register file which holds physical registers to which general purpose registers provided by an instruction set architecture are assigned, a virtual register assigning unit which assigns a virtual address in the main memory space to a physical register in the register file based on a request from a program, and records a correspondence between each of the virtual addresses and a corresponding one of the physical registers in a virtual register conversion table, and an access converting unit which determines whether or not a virtual address to be accessed is recorded in the virtual register conversion table managed by the virtual register assigning unit, and executes, when the virtual address is recorded therein, processing of accessing the physical register of which a correspondence to the virtual address is recorded in the virtual register conversion table.
    • 根据一个实施例,一种信息处理设备包括:处理器,包括:寄存器文件,其保存由指定集架构提供的通用寄存器被分配到的物理寄存器;虚拟寄存器分配单元,其将主存储器空间中的虚拟地址分配给 基于来自程序的请求的寄存器文件中的物理寄存器,并且记录虚拟寄存器转换表中的每个虚拟地址和对应的一个物理寄存器之间的对应关系,以及访问转换单元,其确定是否 要访问的虚拟地址被记录在由虚拟寄存器分配单元管理的虚拟寄存器转换表中,并且当虚拟地址被记录在其中时,执行访问与虚拟地址的对应关系的物理寄存器的处理被记录在 虚拟寄存器转换表。
    • 7. 发明申请
    • INFORMATION PROCESSING APPARATUS AND CONTROL METHOD OF PROCESSOR CIRCUIT
    • 信号处理装置和处理器电路的控制方法
    • US20080267256A1
    • 2008-10-30
    • US12110230
    • 2008-04-25
    • Gen WatanabeTsuyoshi NishidaKazuyoshi KuwaharaHajime Sonobe
    • Gen WatanabeTsuyoshi NishidaKazuyoshi KuwaharaHajime Sonobe
    • G01K13/00
    • G01K7/425
    • According to one embodiment, an information processing apparatus comprises a plurality of temperature transmission sections provided in each of first and second semiconductor circuits, and configure to transmit first measured temperature of one of the first and second semiconductor circuits to the other of first and second semiconductor circuits when the first measured temperature is higher than a threshold temperature, and a plurality of operation speed varying sections provided in each of the first and second semiconductor circuits configure to reduce operation speed of the processor circuit possessed by the other of first and second semiconductor circuits, when the received first measured temperature is higher than the second measured temperature of the other of the first and second semiconductor circuits.
    • 根据一个实施例,信息处理设备包括设置在第一和第二半导体电路中的每一个中的多个温度传输部分,并且被配置为将第一和第二半导体电路之一的第一测量温度传输到第一和第二半导体中的另一个 第一测量温度高于阈值温度的电路,并且设置在第一和第二半导体电路中的每一个中的多个操作速度变化部分被配置为降低由第一和第二半导体电路中的另一个拥有的处理器电路的操作速度 当接收的第一测量温度高于第一和第二半导体电路中的另一个的第二测量温度时。