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    • 1. 发明授权
    • Parallel path frequency divider circuit
    • 并行路径分频电路
    • US08570076B2
    • 2013-10-29
    • US12829107
    • 2010-07-01
    • Gary L. BrownAlberto CicaliniDongjiang Qiao
    • Gary L. BrownAlberto CicaliniDongjiang Qiao
    • H03B19/06
    • H03L7/00H03K23/667H03K23/68
    • A parallel path frequency divider (PPFD) includes a low power frequency divider and a high speed latch. A first portion of an oscillating input signal present on an input node of the PPFD is communicated to the divider and a second portion is communicated to the latch. The divider generates a frequency divided enable signal that is communicated to the latch. The latch generates a divided down output signal based on the oscillating input signal and the enable signal. The output signal is insensitive to phase noise present on the enable signal as long as the phase noise on the enable signal is less than one-half of the period of oscillation of the oscillating input signal. Because the noise generated by the low power frequency divider is not propagated to the output signal generated by the PPFD, the PPFD generates low noise, frequency divided signals with relatively low power consumption.
    • 并行路径分频器(PPFD)包括低功耗分频器和高速锁存器。 存在于PPFD的输入节点上的振荡输入信号的第一部分被传送到分频器,并且第二部分被传送到锁存器。 分频器产生与锁存器通信的分频使能信号。 锁存器基于振荡输入信号和使能信号产生分频输出信号。 输出信号对使能信号中存在的相位噪声不敏感,只要使能信号的相位噪声小于振荡输入信号的振荡周期的一半即可。 由于低功耗分频器产生的噪声不会传播到由PPFD产生的输出信号,所以PPFD产生低噪声,分频信号,功耗相对较低。
    • 2. 发明申请
    • PARALLEL PATH FREQUENCY DIVIDER CIRCUIT
    • 并行路径分频电路
    • US20120001666A1
    • 2012-01-05
    • US12829107
    • 2010-07-01
    • Gary L. BrownAlberto CicaliniDongjiang Qiao
    • Gary L. BrownAlberto CicaliniDongjiang Qiao
    • H03B19/06
    • H03L7/00H03K23/667H03K23/68
    • A parallel path frequency divider (PPFD) includes a low power frequency divider and a high speed latch. A first portion of an oscillating input signal present on an input node of the PPFD is communicated to the divider and a second portion is communicated to the latch. The divider generates a frequency divided enable signal that is communicated to the latch. The latch generates a divided down output signal based on the oscillating input signal and the enable signal. The output signal is insensitive to phase noise present on the enable signal as long as the phase noise on the enable signal is less than one-half of the period of oscillation of the oscillating input signal. Because the noise generated by the low power frequency divider is not propagated to the output signal generated by the PPFD, the PPFD generates low noise, frequency divided signals with relatively low power consumption.
    • 并行路径分频器(PPFD)包括低功耗分频器和高速锁存器。 存在于PPFD的输入节点上的振荡输入信号的第一部分被传送到分频器,并且第二部分被传送到锁存器。 分频器产生与锁存器通信的分频使能信号。 锁存器基于振荡输入信号和使能信号产生分频输出信号。 输出信号对使能信号中存在的相位噪声不敏感,只要使能信号的相位噪声小于振荡输入信号的振荡周期的一半即可。 由于低功耗分频器产生的噪声不会传播到由PPFD产生的输出信号,所以PPFD产生低噪声,分频信号,功耗相对较低。
    • 6. 发明授权
    • Two piece heat sink and device package
    • 两件式散热器和器件封装
    • US06864573B2
    • 2005-03-08
    • US10430555
    • 2003-05-06
    • Michael F RobertsonGary L Brown
    • Michael F RobertsonGary L Brown
    • H01L23/40H05K7/20H01L23/34
    • H05K7/20409H01L23/4093H01L2924/0002H01L2924/00
    • A two piece electronic component heat sink and device package comprising a first piece configured to retain electronic components, and a second piece having a hinge region configured to moveably connect the second piece to the first piece, and a snap lock region opposite the hinge region, the snap lock region configured to secure the second piece to the first piece. A two piece electronic component heat sink and device package for a circuit board comprising: a first piece having an index slot for retaining said circuit board, and a second piece having a hinge region configured to pivotably connect the second piece and the first piece, and a snap lock region configured to secure the second piece to the first piece.
    • 一种两件式电子部件散热器和装置封装,包括构造成保持电子部件的第一部件,以及具有铰链区域的第二部件,所述第二部件被构造成将第二部件可移动地连接到第一部件,以及与铰链区域相对的卡锁区域, 所述卡扣锁定区域被配置为将所述第二部件固定到所述第一部件。 一种用于电路板的两件式电子部件散热器和装置封装,包括:具有用于保持所述电路板的分度槽的第一件和具有铰链区域的第二件,该铰链区域构造成可枢转地连接第二件和第一件,以及 卡扣锁定区域,其构造成将第二部件固定到第一部件。
    • 7. 发明授权
    • System for inserting a supplemental micro-operation flow into a
macroinstruction-generated micro-operation flow
    • 用于将补充微操作流插入到宏指令生成的微操作流中的系统
    • US5867701A
    • 1999-02-02
    • US937097
    • 1997-09-24
    • Gary L. BrownR. Guru Prasadh
    • Gary L. BrownR. Guru Prasadh
    • G06F9/26G06F9/30G06F9/318G06F9/38G06F3/00
    • G06F9/30185G06F9/268G06F9/30145G06F9/3861
    • A system for inserting a supplemental micro-operation sequence into a macroinstruction-generated micro-operation flow provides a versatile, flexible mechanism for early pipeline stages of a microprocessor to pass control signals, data, and other information to later pipeline stages. The mechanism is useful to maintain precise timing of a fault model in pipelined processors. A method includes the step of detecting the occurrence of a predetermined uop-inserting event and, responsive thereto, generating a control signal to a uop insertion unit. Responsive thereto, the uop insertion unit supplies signals to a decoder which, responsive thereto, decodes the signal encoded within the signal to provide the inserted uop sequence, which is inserted in a position within the macroinstruction-generated micro-operation flow predetermined by the uop-inserting event.
    • 用于将补充微操作序列插入到宏指令生成的微操作流中的系统为微处理器的早期流水线阶段提供通用的,灵活的机制,以将控制信号,数据和其他信息传递到后期流水线级。 该机制有助于维持流水线处理器中故障模型的精确定时。 一种方法包括检测预定的uop插入事件的发生的步骤,并且响应于此,向uop插入单元生成控制信号。 响应于此,引导单元向解码器提供信号,解码器响应于此解码在信号内编码的信号,以提供插入的uop序列,其插入在由uop预定的宏指令生成的微操作流程内的位置 - 插入事件。
    • 9. 发明授权
    • Hand exerciser device
    • 手动锻炼装置
    • US5445582A
    • 1995-08-29
    • US177254
    • 1994-01-01
    • Gary L. Brown
    • Gary L. Brown
    • A63B21/002A63B23/00A63B23/16A63B21/02
    • A63B23/16A63B21/4025A63B21/00047A63B21/0023
    • An exerciser device having a band, a wrist securing member connected to the band such that the band extends outwardly of the wrist securing member, and finger engagement member affixed to the band at a position generally opposed to the wrist securing member. The wrist securing member serves for removable attachment around a human wrist. The finger engagement member extends inwardly of the band. A thumb engagement member is affixed to the band at a position generally between the finger engagement member and the wrist securing member. The band has a generally rigid and generally circular configuration extending from the wrist securing member. The finger engagement member includes a slide member extending around an exterior of the band and a plurality of finger receptacles extending from the slide member in a direction generally facing the wrist securing member. The thumb engagement member includes a first thumb receptacle, a second thumb receptacle, and a member connected to and extending between the first and second thumb receptacles.
    • 一种锻炼装置,其具有带,手腕固定构件,其连接到所述带,使得所述带从所述手腕固定构件向外延伸;以及手指接合构件,其在与所述手腕固定构件大致相对的位置处固定到所述带。 手腕固定构件用于可拆卸地附接在人类手腕周围。 手指接合构件向带内延伸。 拇指接合构件通常在手指接合构件和手腕固定构件之间的位置处固定到带上。 带具有从腕部固定构件延伸的大致刚性且大致圆形的构造。 手指接合构件包括围绕带的外部延伸的滑动构件和沿着大致面向手腕固定构件的方向从滑动构件延伸的多个指状容座。 拇指接合构件包括第一拇指容器,第二拇指容器和连接到第一和第二拇指插座之间并在其之间延伸的构件。
    • 10. 发明授权
    • Block mode digital signal conditioning method and apparatus
    • 块模数字信号调理方法及装置
    • US4574362A
    • 1986-03-04
    • US367660
    • 1982-04-12
    • Howard R. SpindelVincent N. Ast, Jr.Gary L. Brown
    • Howard R. SpindelVincent N. Ast, Jr.Gary L. Brown
    • G06F13/38G06F13/42G06F5/00
    • G06F13/385G06F13/4221
    • Block mode is a method of formatting data when sending it to and from the host computer. Some host computer operating systems make it difficult for the user's program to send or receive the full ASCII character set. The block mode protocol lets you send and receive messages which use the full ASCII character set (including lowercase characters and control characters), even though your host computer's operating system makes it difficult to send and receive certain ASCII characters. (Indeed, even full eight-bit binary data bytes may be sent to or from the terminal in block mode.) This is accomplished by means of a packing scheme, in which messages using the full character set are packed into character strings using a subset of that character set.Also, the block mode protocol provides error detection and automatic retransmission of bad data blocks. This lets you transfer data to and from the terminal, without errors, despite occasional noise on the communications line. Block mode is completely independent of whether or not prompt mode is used and of whether the terminal is using full duplex or half duplex communications.When in block mode, data is packed into blocks and transmitted as a unit. Each block contains an "even/odd" counter (block control byte one, bit one) which is used in an "ACK/NAK" protocol. This protocol lets the host and terminal inform each other when a block has been received incorrectly. (The block received incorrectly is then retransmitted.)
    • 块模式是将数据发送到主计算机或从主计算机发送数据时的格式化方法。 一些主机操作系统使得用户的程序难以发送或接收完整的ASCII字符集。 块模式协议允许您发送和接收使用完整ASCII字符集(包括小写字符和控制字符)的消息,即使您的主机操作系统难以发送和接收某些ASCII字符。 (实际上,甚至可以以块模式向终端发送完整的八位二进制数据字节。)这是通过打包方案来实现的,其中使用全部字符集的消息使用子集打包到字符串中 的字符集。 此外,块模式协议提供错误检测和坏数据块的自动重传。 这可以让您无需错误地将数据传输到终端,也可以在通信线路上偶然发生噪声。 块模式完全独立于是否使用提示模式以及终端是使用全双工还是半双工通信。 在块模式下,数据被打包成块并作为一个单元传输。 每个块包含在“ACK / NAK”协议中使用的“偶数/奇数”计数器(块控制字节1,位1)。 该协议允许主机和终端在块被错误地接收时通知对方。 (接收到错误的块然后重发。