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    • 1. 发明申请
    • NEURAL NETWORK CIRCUIT COMPRISING NANOSCALE SYNAPSES AND CMOS NEURONS
    • 包含纳米晶体和神经网络的神经网络电路
    • WO2010106116A1
    • 2010-09-23
    • PCT/EP2010/053484
    • 2010-03-17
    • COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESZHAO, WeishengGAMRAT, ChristianAGNUS, GuillaumeDERYCKE, VincentBOURGOIN, Jean-Philippe
    • ZHAO, WeishengGAMRAT, ChristianAGNUS, GuillaumeDERYCKE, VincentBOURGOIN, Jean-Philippe
    • G06N3/063H01L51/00
    • G06N3/063B82Y10/00G11C11/54H01L27/283H01L51/0048
    • The invention relates to a neural network circuit comprising nanoscale devices (411-415, 421-425) acting as synapses and CMOS circuits (201, 202) acting as neurons. It finds a particular interest for computing circuits and systems involving complex functions or handling of huge amounts of data. Comparing with the existing proposals, this architecture promises small die area, high speed thanks to massively parallel learning and low power. The nanoscale devices (411-415, 421-425) comprise two terminals and are connected to row conductors (221, 222) and to column conductors (231-235) in a matrix-like fashion. A CMOS circuit (201, 202) is connected at one end of each row conductor (221, 222). An electrical characteristic between the two terminals of each nanoscale device (411-415, 421-425) is able to be modified by a signal applied to the second terminal. The neural network further comprises, for each row conductor (221, 222), means (401, 402) for preventing the electrical characteristics of the nanoscale devices (411-415, 421-425) connected to the considered row conductor (221, 222) from being modified by a signal applied to the second terminal of said nanoscale devices.
    • 本发明涉及包含充当突触的纳米级器件(411-415,421-425)和充当神经元的CMOS电路(201,202)的神经网络电路。 它对于涉及复杂功能或处理大量数据的计算电路和系统感兴趣。 与现有建议相比,该架构通过大规模并行学习和低功耗,承受了小模具面积,高速度。 纳米级器件(411-415,421-425)包括两个端子,并且以矩阵状的方式连接到行导体(221,222)和列导体(231-235)。 CMOS电路(201,202)在每个行导体(221,222)的一端连接。 能够通过施加到第二端子的信号来修改每个纳米级器件(411-415,421-425)的两个端子之间的电特性。 所述神经网络还包括:对于每个行导体(221,222),用于防止连接到所考虑的行导体(221,222)的纳米级器件(411-415,421-425)的电特性的装置(401,402) )被施加到所述纳米级器件的第二端子的信号修改。