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    • 1. 发明授权
    • Semiconductor device and method for manufacturing
    • 半导体装置及其制造方法
    • US08552523B2
    • 2013-10-08
    • US13206380
    • 2011-08-09
    • Fumiaki ToyamaFumihiko Inoue
    • Fumiaki ToyamaFumihiko Inoue
    • H01L21/70
    • H01L27/11565H01L21/28282H01L27/11568H01L29/66833H01L29/792
    • A method for manufacturing a semiconductor device is disclosed. The method includes forming a shallow trench isolation (STI) region extending in a first direction on a semiconductor substrate, forming a mask layer extending in a second direction that intersects with the first direction on the semiconductor substrate and forming a trench on the semiconductor substrate by using the STI region and the mask layer as masks. In addition, the method includes forming a charge storage layer so as to cover the trench and forming a conductive layer on side surfaces of the trench and the mask layer. Word lines are formed from the conductive layer on side surfaces of the trench that oppose in the first direction by etching. The word lines are separated from each other and extend in the second direction.
    • 公开了一种制造半导体器件的方法。 该方法包括形成在半导体衬底上沿第一方向延伸的浅沟槽隔离(STI)区域,形成在半导体衬底上沿与第一方向相交的第二方向延伸的掩模层,并在半导体衬底上形成沟槽,并通过 使用STI区域和掩模层作为掩模。 此外,该方法包括形成电荷存储层以覆盖沟槽并在沟槽和掩模层的侧表面上形成导电层。 字线由通过蚀刻在第一方向相对的沟槽的侧表面上的导电层形成。 字线彼此分离并在第二方向上延伸。
    • 2. 发明授权
    • Semiconductor device and method for manufacturing
    • 半导体装置及其制造方法
    • US07994007B2
    • 2011-08-09
    • US12337461
    • 2008-12-17
    • Fumiaki ToyamaFumihiko Inoue
    • Fumiaki ToyamaFumihiko Inoue
    • H01L21/336
    • H01L27/11565H01L21/28282H01L27/11568H01L29/66833H01L29/792
    • A method for manufacturing a semiconductor device is disclosed. The method includes forming a shallow trench isolation (STI) region extending in a first direction on a semiconductor substrate, forming a mask layer extending in a second direction that intersects with the first direction on the semiconductor substrate and forming a trench on the semiconductor substrate by using the STI region and the mask layer as masks. In addition, the method includes forming a charge storage layer so as to cover the trench and forming a conductive layer on side surfaces of the trench and the mask layer. Word lines are formed from the conductive layer on side surfaces of the trench that oppose in the first direction by etching. The word lines are separated from each other and extend in the second direction.
    • 公开了一种制造半导体器件的方法。 该方法包括形成在半导体衬底上沿第一方向延伸的浅沟槽隔离(STI)区域,形成在半导体衬底上沿与第一方向相交的第二方向延伸的掩模层,并在半导体衬底上形成沟槽,并通过 使用STI区域和掩模层作为掩模。 此外,该方法包括形成电荷存储层以覆盖沟槽并在沟槽和掩模层的侧表面上形成导电层。 字线由通过蚀刻在第一方向相对的沟槽的侧表面上的导电层形成。 字线彼此分离并在第二方向上延伸。
    • 3. 发明授权
    • Semiconductor device and method for manufacturing thereof
    • 半导体装置及其制造方法
    • US07981746B2
    • 2011-07-19
    • US12341874
    • 2008-12-22
    • Fumiaki ToyamaFumihiko Inoue
    • Fumiaki ToyamaFumihiko Inoue
    • H01L21/336
    • H01L21/28282H01L21/28273H01L27/11526H01L27/11573
    • The present invention provides a semiconductor device including a semiconductor substrate provided with a trench section; a tunnel insulating film covering an inner surface of the trench section; a trap layer provided in contact with the tunnel insulating film on an inner surface of an upper portion of the trench section; a top insulating film provided in contact with the trap layer; a gate electrode embedded in the trench section, and provided in contact with the tunnel insulating film at a lower portion of the trench section and in contact with the top insulating film at the upper portion of the trench section, in which the trap layer and the top insulating film, in between the lower portion of the trench section and the upper portion of the trench section, extend and protrude from both sides of the trench section so as to be embedded in the gate electrode, and a method for manufacturing thereof.
    • 本发明提供一种半导体器件,其包括设置有沟槽部分的半导体衬底; 覆盖所述沟槽部的内表面的隧道绝缘膜; 在所述沟槽部的上部的内表面上设置与所述隧道绝缘膜接触的陷阱层; 设置成与所述捕获层接触的顶部绝缘膜; 栅电极,其嵌入在沟槽部中,并且与沟道绝缘膜在沟槽部的下部接触并与沟槽部的上部的顶部绝缘膜接触而设置,其中阱层和 在沟槽部分的下部和沟槽部分的上部之间的顶部绝缘膜从沟槽部分的两侧延伸并突出以嵌入在栅电极中,以及其制造方法。
    • 4. 发明授权
    • Self-aligned charge storage region formation for semiconductor device
    • 用于半导体器件的自对准电荷存储区域形成
    • US07932125B2
    • 2011-04-26
    • US12183756
    • 2008-07-31
    • Fumihiko Inoue
    • Fumihiko Inoue
    • H01L21/00
    • H01L29/7923H01L21/28282H01L27/115H01L27/11568H01L29/4234
    • Devices and methods for forming self-aligned charge storage regions are disclosed. In one embodiment, a method for manufacturing a semiconductor device comprises forming a layer of a nitride film stacked between two oxide films on a semiconductor substrate, and forming a gate electrode on the layer of the nitride film stacked between the two oxide films. In addition, the method comprises removing side portions of the nitride film such that a central portion of the nitride film below a center portion of the gate electrode remains, oxidizing the central portion of the nitride film, and forming charge storage layers in the side portions of the nitride film, where the charge storage layers are separated by the central portion of the nitride film.
    • 公开了用于形成自对准电荷存储区域的装置和方法。 在一个实施例中,制造半导体器件的方法包括:在半导体衬底上形成层叠在两个氧化物膜之间的氮化物膜层,并在叠置在两个氧化物膜之间的氮化膜的层上形成栅电极。 此外,该方法包括去除氮化物膜的侧面部分,使得在栅极电极的中心部分之下的氮化物膜的中心部分残留,氧化氮化物膜的中心部分,并且在侧部形成电荷存储层 的氮化物膜,其中电荷存储层被氮化膜的中心部分分开。
    • 6. 发明授权
    • SONOS-NAND device having a storage region separated between cells
    • 具有在单元之间分离的存储区域的SONOS-NAND装置
    • US07838406B2
    • 2010-11-23
    • US12343998
    • 2008-12-24
    • Takayuki MaruyamaFumihiko Inoue
    • Takayuki MaruyamaFumihiko Inoue
    • H01L21/3205
    • H01L27/11565H01L21/28282H01L27/11568H01L29/66833
    • The present invention is a semiconductor device including a semiconductor substrate having a trench, a first insulating film provided on side surfaces of the trench, a second insulating film of a material different from the first insulating film provided to be embedded in the trench, a word line provided extending to intersect with the trench above the semiconductor substrate, a gate insulating film of a material different from the first insulating film separated in an extending direction of the word line by the trench and provided under a central area in a width direction of the word line, and a charge storage layer separated in the extending direction of the word line by the trench and provided under both ends in the width direction of the word line to enclose the gate insulating film, and a method for manufacturing the same.
    • 本发明是一种半导体器件,包括具有沟槽的半导体衬底,设置在沟槽的侧表面上的第一绝缘膜,与设置在沟槽中的第一绝缘膜不同的材料的第二绝缘膜, 线延伸以与半导体衬底上方的沟槽相交;栅极绝缘膜,其不同于第一绝缘膜的材料的栅极绝缘膜,该第一绝缘膜在字线的延伸方向上被沟槽分隔,并且设置在该字线的宽度方向上的中心区域的下方 字线和电荷存储层,并且在字线的宽度方向上的两端设置用于包围栅极绝缘膜的电荷存储层及其制造方法。
    • 7. 发明申请
    • SELF-ALIGNED CHARGE STORAGE REGION FORMATION FOR SEMICONDUCTOR DEVICE
    • 半导体器件的自对准充电存储区域形成
    • US20090032864A1
    • 2009-02-05
    • US12183756
    • 2008-07-31
    • Fumihiko INOUE
    • Fumihiko INOUE
    • H01L29/792H01L21/28
    • H01L29/7923H01L21/28282H01L27/115H01L27/11568H01L29/4234
    • Devices and methods for forming self-aligned charge storage regions are disclosed. In one embodiment, a method for manufacturing a semiconductor device comprises forming a layer of a nitride film stacked between two oxide films on a semiconductor substrate, and forming a gate electrode on the layer of the nitride film stacked between the two oxide films. In addition, the method comprises removing side portions of the nitride film such that a central portion of the nitride film below a center portion of the gate electrode remains, oxidizing the central portion of the nitride film, and forming charge storage layers in the side portions of the nitride film, where the charge storage layers are separated by the central portion of the nitride film.
    • 公开了用于形成自对准电荷存储区域的装置和方法。 在一个实施例中,制造半导体器件的方法包括:在半导体衬底上形成层叠在两个氧化物膜之间的氮化物膜层,并在叠置在两个氧化物膜之间的氮化膜的层上形成栅电极。 此外,该方法包括去除氮化物膜的侧面部分,使得在栅极电极的中心部分之下的氮化物膜的中心部分残留,氧化氮化物膜的中心部分,并且在侧部形成电荷存储层 的氮化物膜,其中电荷存储层被氮化膜的中心部分分开。
    • 8. 发明申请
    • PRECISION TRENCH FORMATION FOR SEMICONDUCTOR DEVICE
    • 半导体器件的精密成型
    • US20080305614A1
    • 2008-12-11
    • US12134087
    • 2008-06-05
    • Fumihiko INOUETakayuki MARUYAMATomohiro WATANABE
    • Fumihiko INOUETakayuki MARUYAMATomohiro WATANABE
    • H01L21/762
    • H01L21/3065H01L21/30604H01L29/785
    • Structures and methods for precision trench formation are disclosed. In one embodiment, a method for manufacturing a semiconductor device comprises forming a first oxygen-containing region in a semiconductor substrate by performing an oxygen ion implantation to a portion of the semiconductor substrate, and oxidizing the first oxygen-containing region using oxygen contained therein by performing a thermal processing to the semiconductor substrate, where the first oxygen-containing region is converted to a first oxide region. The method further comprises forming a groove in the semiconductor substrate by eliminating the first oxide region, where the performing thermal processing comprises subjecting the first oxygen-containing region to a gas low on oxygen.
    • 公开了用于精密沟槽形成的结构和方法。 在一个实施例中,一种制造半导体器件的方法包括通过对半导体衬底的一部分进行氧离子注入,在半导体衬底中形成第一含氧区域,并且通过使用其中包含的氧的第一含氧区域氧化 对所述半导体衬底进行热处理,其中所述第一含氧区域被转换为第一氧化物区域。 该方法还包括通过消除第一氧化物区域在半导体衬底中形成沟槽,其中执行热处理包括使第一含氧区域处于低于氧的气体。