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1. 发明申请

US20100109739A1 ACTIVE GUARDING FOR REDUCTION OF RESISTIVE AND CAPACITIVE SIGNAL LOADING WITH ADJUSTABLE CONTROL OF COMPENSATION LEVEL 有权
标题翻译：用于减少电阻和电容信号的主动保护与补偿水平的可调控制
公开(公告)号：US20100109739A1
公开(公告)日：2010-05-06
申请号：US12594075
申请日：2008-03-31
申请人： Joel Ironstone , David Wang , Frank Zhang , Chung Shing Fan , Morrie Altmejd , Kenneth Carless Smith
发明人： Joel Ironstone , David Wang , Frank Zhang , Chung Shing Fan , Morrie Altmejd , Kenneth Carless Smith
IPC分类号： H03L5/00
CPC分类号： H03F1/56 , H03F1/14
摘要： In various embodiments, applicants' teachings are related to an active guarding circuit and method for reducing parasitic impedance signal loading on a signal-transmission channel that is shunted by a parasitic impedance. The presence of an electrical signal on the signal-transmission channel causes a leakage current to flow through the parasitic impedance. In various embodiments, the circuit comprises an amplifier and an impedance, one terminal of the impedance is coupled to the signal-transmission channel. The input of the amplifier is coupled to the signal-transmission channel and the output is coupled to the other terminal of the impedance so as to cause a compensation current to flow through the impedance. The gain of the amplifier and the value of the impedance are selected so that the compensation current has a magnitude substantially equal to the leakage current magnitude.
摘要翻译：在各种实施例中，申请人的教导涉及用于减少由寄生阻抗分流的信号传输通道上的寄生阻抗信号负载的主动防护电路和方法。在信号传输通道上存在电信号会导致漏电流流过寄生阻抗。在各种实施例中，电路包括放大器和阻抗，阻抗的一个端子耦合到信号传输通道。放大器的输入耦合到信号传输通道，输出耦合到阻抗的另一端，以使补偿电流流过阻抗。选择放大器的增益和阻抗的值，使得补偿电流的幅度基本上等于泄漏电流大小。

2. 发明授权

US07212852B2 Bioimpedance measurement using controller-switched current injection and multiplexer selected electrode connection 有权
标题翻译：使用控制器开关电流注入和多路复用器选择电极连接的生物阻抗测量
公开(公告)号：US07212852B2
公开(公告)日：2007-05-01
申请号：US10722508
申请日：2003-11-28
申请人： Kenneth Carless Smith , Joel Steven Ironstone , Frank Zhang
发明人： Kenneth Carless Smith , Joel Steven Ironstone , Frank Zhang
IPC分类号： A61B5/00
CPC分类号： A61B5/4312 , A61B5/04085 , A61B5/0424 , A61B5/053 , A61B5/0531 , A61B5/6843 , A61B10/0041 , A61B2017/00026 , A61B2018/0016 , A61B2090/065 , A61B2562/0219
摘要： A system and method for measuring a voltage in a body part are described. The system includes a multiplexing unit, and N body leads for electrically connecting the multiplexing unit to the body part. The system also includes a controller switching unit for allowing a current to flow through the body part between two body leads, n1 and n2 of the N body leads, and a resultant voltage to be measured between two body leads, n3 and n4 of the N body leads, where n1≠n2 and n3≠n4, but where n1 n2 n3 and n4 need not otherwise be distinct.
摘要翻译：描述用于测量身体部位中的电压的系统和方法。该系统包括多路复用单元和用于将多路复用单元电连接到主体部分的N体引线。该系统还包括一个控制器切换单元，用于允许电流流过N体引线的两个体引线之间的主体部分，即n个主体引线的n 1和N 2，以及一个在N体引线的两个体引线之间的测量结果电压，n 3和n 4，其中n 1 2 和n <3> n> 4 ，但是其中n <1 2 < SUB> 3 和n <4>不需要另外区分。

3. 发明授权

US09742416B2 IC phase detector with re-timed reference clock controlling switches 有权
公开(公告)号：US09742416B2
公开(公告)日：2017-08-22
申请号：US13397551
申请日：2012-02-15
申请人： Indu Prathapan , Krishnasawamy Nagaraj , Frank Zhang
发明人： Indu Prathapan , Krishnasawamy Nagaraj , Frank Zhang
IPC分类号： G06F19/00 , H03L7/091
CPC分类号： H03L7/091 , H03L2207/50
摘要： A phase detector includes a counter to generate the integer portion of a number of complete cycles of an output clock at each active edge of a reference clock. A time to digital converter in the phase detector generates the fractional portion of the number of complete cycles of the output clock at each active edge of the reference clock. The sum of the fractional portion and the integer portion is subtracted from an accumulated value obtained by accumulating a pre-determined number to generate an error signal as the output of the phase detector. The counter is read at an active edge of one of two re-timed clocks derived from the reference clock. Each of the two re-timed clocks is generated based on a comparison of the fractional portion with a pair of thresholds. Errors due to metastability in reading the counter are thereby avoided.

4. 发明申请

US20130211758A1 REFERENCE CLOCK RE-TIMING SCHEME IN ELECTRONIC CIRCUITS 有权
标题翻译：电子电路中的参考时钟重新排列方案
公开(公告)号：US20130211758A1
公开(公告)日：2013-08-15
申请号：US13397551
申请日：2012-02-15
申请人： Indu Prathapan , Krishnasawamy Nagaraj , Frank Zhang
发明人： Indu Prathapan , Krishnasawamy Nagaraj , Frank Zhang
IPC分类号： G06F19/00
CPC分类号： H03L7/091 , H03L2207/50
摘要： A phase detector includes a counter to generate the integer portion of a number of complete cycles of an output clock at each active edge of a reference clock. A time to digital converter in the phase detector generates the fractional portion of the number of complete cycles of the output clock at each active edge of the reference clock. The sum of the fractional portion and the integer portion is subtracted from an accumulated value obtained by accumulating a pre-determined number to generate an error signal as the output of the phase detector. The counter is read at an active edge of one of two re-timed clocks derived from the reference clock. Each of the two re-timed clocks is generated based on a comparison of the fractional portion with a pair of thresholds. Errors due to metastability in reading the counter are thereby avoided.
摘要翻译：相位检测器包括计数器，用于在参考时钟的每个有效边沿处产生输出时钟的多个完整周期的整数部分。相位检测器中的数字时钟转换器在参考时钟的每个有效边沿产生输出时钟的完整周期数的小数部分。从通过累加预定数量获得的累积值中减去分数部分和整数部分的和，以产生作为相位检测器的输出的误差信号。在从参考时钟导出的两个定时时钟之一的有效边沿读取计数器。基于小数部分与一对阈值的比较来生成两个重新定时时钟中的每一个。从而避免了由于读取计数器而产生亚稳定的错误。

5. 发明授权

US08487686B2 Active guarding for reduction of resistive and capacitive signal loading with adjustable control of compensation level 有权
标题翻译：主动防护用于减少电阻和电容信号负载，并可调整补偿电平
公开(公告)号：US08487686B2
公开(公告)日：2013-07-16
申请号：US12594075
申请日：2008-03-31
申请人： Joel Ironstone , David Wang , Frank Zhang , Chung Shing Fan , Morrie Altmejd , Kenneth Carless Smith
发明人： Joel Ironstone , David Wang , Frank Zhang , Chung Shing Fan , Morrie Altmejd , Kenneth Carless Smith
IPC分类号： H03L5/00
CPC分类号： H03F1/56 , H03F1/14
摘要： In various embodiments, applicants' teachings are related to an active guarding circuit and method for reducing parasitic impedance signal loading on a signal-transmission channel that is shunted by a parasitic impedance. The presence of an electrical signal on the signal-transmission channel causes a leakage current to flow through the parasitic impedance. In various embodiments, the circuit comprises an amplifier and an impedance, one terminal of the impedance is coupled to the signal-transmission channel. The input of the amplifier is coupled to the signal-transmission channel and the output is coupled to the other terminal of the impedance so as to cause a compensation current to flow through the impedance. The gain of the amplifier and the value of the impedance are selected so that the compensation current has a magnitude substantially equal to the leakage current magnitude.
摘要翻译：在各种实施例中，申请人的教导涉及用于减少由寄生阻抗分流的信号传输通道上的寄生阻抗信号负载的主动防护电路和方法。在信号传输通道上存在电信号会导致漏电流流过寄生阻抗。在各种实施例中，电路包括放大器和阻抗，阻抗的一个端子耦合到信号传输通道。放大器的输入耦合到信号传输通道，输出耦合到阻抗的另一端，以使补偿电流流过阻抗。选择放大器的增益和阻抗的值，使得补偿电流的幅度基本上等于泄漏电流大小。

6. 发明申请

US20080180187A1 SYSTEMS AND METHODS FOR REDUCING CIRCUIT AREA 有权
标题翻译：减少电路面积的系统和方法
公开(公告)号：US20080180187A1
公开(公告)日：2008-07-31
申请号：US11943287
申请日：2007-11-20
申请人： Peter R. KINGET , Frank ZHANG
发明人： Peter R. KINGET , Frank ZHANG
IPC分类号： G01D5/20 , H01F5/00
CPC分类号： H01L23/5227 , H01F2017/0046 , H01F2017/008 , H01F2021/125 , H01L27/0207 , H01L27/0727 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Methods and systems are provided for reducing circuit area. Some embodiments provide electronic devices including an inductor formed from a path having two ends that loops substantially in a plane around a center area, wherein the path crosses itself at least two points and wherein the path defines an outer boundary of the inductor; and a circuit that is located within the outer boundary of the inductor and substantially within or adjacent to the plane. Other embodiments provide electronic devices including an inductor formed from a path having two ends that loops substantially in a plane around a center area, wherein the path defines an outer boundary of the inductor; and a circuit that is located within the outer boundary of the inductor and substantially within or adjacent to the plane, and wherein the circuit comprises a signal path that is rake-shaped and crosses the path of the inductor at substantially perpendicular angles.
摘要翻译：提供了减少电路面积的方法和系统。一些实施例提供了电子设备，其包括由具有两个端部的路径形成的电感器，所述两个端部基本围绕围绕中心区域的平面环绕，其中所述路径在至少两个点处与其自身交叉，并且其中所述路径限定所述电感器的外边界; 以及位于电感器的外边界内并且基本上在平面内或与平面相邻的电路。其他实施例提供了电子设备，其包括由具有两个端部的路径形成的电感器，所述两个端部基本围绕围绕中心区域的平面环绕，其中所述路径限定所述电感器的外边界; 以及位于电感器的外边界内并且基本上在该平面内或与该平面相邻的电路，并且其中该电路包括一个信号路径，该信号路径是耙状的并以大致垂直的角度穿过该电感器的路径。

7. 发明授权

US07847667B2 Systems and methods for reducing circuit area 有权
标题翻译：降低电路面积的系统和方法
公开(公告)号：US07847667B2
公开(公告)日：2010-12-07
申请号：US11943287
申请日：2007-11-20
申请人： Peter R. Kinget , Frank Zhang
发明人： Peter R. Kinget , Frank Zhang
IPC分类号： H01F5/00
CPC分类号： H01L23/5227 , H01F2017/0046 , H01F2017/008 , H01F2021/125 , H01L27/0207 , H01L27/0727 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Methods and systems are provided for reducing circuit area. Some embodiments provide electronic devices including an inductor formed from a path having two ends that loops substantially in a plane around a center area, wherein the path crosses itself at least two points and wherein the path defines an outer boundary of the inductor; and a circuit that is located within the outer boundary of the inductor and substantially within or adjacent to the plane. Other embodiments provide electronic devices including an inductor formed from a path having two ends that loops substantially in a plane around a center area, wherein the path defines an outer boundary of the inductor; and a circuit that is located within the outer boundary of the inductor and substantially within or adjacent to the plane, and wherein the circuit comprises a signal path that is rake-shaped and crosses the path of the inductor at substantially perpendicular angles.
摘要翻译：提供了减少电路面积的方法和系统。一些实施例提供了电子设备，其包括由具有两个端部的路径形成的电感器，所述两个端部基本围绕围绕中心区域的平面环绕，其中所述路径在至少两个点处与其自身交叉，并且其中所述路径限定所述电感器的外边界; 以及位于电感器的外边界内并且基本上在平面内或与平面相邻的电路。其他实施例提供了电子设备，其包括由具有两个端部的路径形成的电感器，所述两个端部基本围绕围绕中心区域的平面环绕，其中所述路径限定所述电感器的外边界; 以及位于电感器的外边界内并且基本上在该平面内或与该平面相邻的电路，并且其中该电路包括一个信号路径，该信号路径是耙状的并以大致垂直的角度穿过该电感器的路径。

8. 发明申请

US20130172475A1 ALIPHATIC POLYUREA COATING, THE METHOD FOR PREPARING THE SAME AND THE USE THEREOF 审中-公开
标题翻译：聚氨酯涂料，其制备方法及其使用方法
公开(公告)号：US20130172475A1
公开(公告)日：2013-07-04
申请号：US13807029
申请日：2011-06-27
申请人： Frank Zhang , Jianping Shen
发明人： Frank Zhang , Jianping Shen
IPC分类号： C09D175/02
CPC分类号： C09D175/02 , C08G18/10 , C08G18/44 , C08G18/722 , C08G18/755 , C08G18/7831 , C09D175/08 , C08G18/3234
摘要： The present invention pertains to an aliphatic polyurea coating, comprising a product mixed by the components including NCO-terminated polycarbonate diol modified and/or of ether polyol modified isophorone diisocyanate (IPDI) prepolymer; hexamethylene diisocyanate (HDI) oligomers; and amino resin comprising sterically hindered secondary aliphatic diamines. The aliphatic polyurea coating layer prepared by the aliphatic polyurea coating presented in this invention possesses good elongation and tensile strength, good flexibility in low temperature, good abrasion resistance, good adhesion property, good weatherability and good chemical resistance.
摘要翻译：本发明涉及一种脂肪族聚脲涂料，其包含由包含NCO-封端的聚碳酸酯二醇和/或醚多元醇改性的异佛尔酮二异氰酸酯（IPDI）预聚物的组分混合的产品。六亚甲基二异氰酸酯（HDI）低聚物; 和包含空间位阻的仲脂族二胺的氨基树脂。通过本发明提出的脂族聚脲涂料制备的脂族聚脲涂层具有良好的伸长率和拉伸强度，低温柔韧性，良好的耐磨性，良好的粘合性，良好的耐候性和良好的耐化学性。

9. 发明申请

US20060209850A1 Method, system, and apparatus for a virtual host gateway in a modem device 失效
标题翻译：用于调制解调器设备中的虚拟主机网关的方法，系统和装置
公开(公告)号：US20060209850A1
公开(公告)日：2006-09-21
申请号：US11045933
申请日：2005-01-28
申请人： Frank Zhang , Zhicheng Hou
发明人： Frank Zhang , Zhicheng Hou
IPC分类号： H04Q7/00 , H04L12/56
CPC分类号： H04M11/06 , H04W88/16 , H04W92/02
摘要： A system, method, and apparatus for providing an embedded controller in a modem device for enabling data communication between different networks. Management and control capabilities for a gateway function are embedded into a communication controller of the modem device so as to enable direct connection between wired and wireless devices while eliminating a separate gateway controller. A single controller in the modem device, wired or wireless, manages its own designated communication functions and data exchange between the two different networks.
摘要翻译：一种用于在调制解调器设备中提供嵌入式控制器以实现不同网络之间的数据通信的系统，方法和装置。网关功能的管理和控制功能嵌入到调制解调器设备的通信控制器中，以便在有线和无线设备之间直接连接，同时消除单独的网关控制器。有线或无线调制解调器设备中的单个控制器管理其自己指定的通信功能和两个不同网络之间的数据交换。

10. 发明申请

US20050240682A1 Method and system for remote management of data over a wireless link 失效
标题翻译：通过无线链路远程管理数据的方法和系统
公开(公告)号：US20050240682A1
公开(公告)日：2005-10-27
申请号：US10830750
申请日：2004-04-22
申请人： Frank Zhang
发明人： Frank Zhang
IPC分类号： G06F17/30 , H04L29/08
CPC分类号： H04L67/125 , H04L67/04
摘要： A system and method for enabling remote management of data of devices using wireless communications. The system and method provides direct access to devices such as sensors from wireless devices having an integrated wireless transceiver and controller that are user programmable such a separate remote host controller is not required for managing the sensors. In one embodiment, a broadcast mode is provided wherein the wireless devices transmits a response for its corresponding sensors according to a predetermined sequence during a predetermined time slot according to a predetermined sequence.
摘要翻译：一种用于使用无线通信远程管理设备的数据的系统和方法。该系统和方法提供对诸如来自具有集成无线收发器的无线设备的传感器和用户可编程的控制器的设备的直接访问，这样不需要单独的远程主机控制器来管理传感器。在一个实施例中，提供广播模式，其中无线设备根据预定的顺序在预定时隙期间根据预定的顺序发送对其相应的传感器的响应。

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