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1. 发明授权

US06573539B2 Heterojunction bipolar transistor with silicon-germanium base 有权
标题翻译：异质结双极晶体管与硅锗基
公开(公告)号：US06573539B2
公开(公告)日：2003-06-03
申请号：US09878930
申请日：2001-06-12
申请人： Feng-Yi Huang
发明人： Feng-Yi Huang
IPC分类号： H01L31072
CPC分类号： H01L29/66242
摘要： A silicon-germanium base capable of use in heterojunction bipolar transistor includes a silicon substrate having a mesa surrounded by a trench. The mesa has a top surface and a silicon-germanium layer is disposed only on the top surface of the mesa. In addition, a heterojunction bipolar transistor includes the silicon-germanium base as described.
摘要翻译：能够用于异质结双极晶体管的硅锗基体包括具有由沟槽包围的台面的硅衬底。台面具有顶表面，并且硅 - 锗层仅设置在台面的顶表面上。此外，异质结双极晶体管包括如上所述的硅 - 锗基底。

2. 发明授权

US06417059B2 Process for forming a silicon-germanium base of a heterojunction bipolar transistor 失效
标题翻译：用于形成异质结双极晶体管的硅锗基底的工艺
公开(公告)号：US06417059B2
公开(公告)日：2002-07-09
申请号：US09867373
申请日：2001-05-29
申请人： Feng-Yi Huang
发明人： Feng-Yi Huang
IPC分类号： H01L21331
CPC分类号： H01L29/66242
摘要： A process for forming a silicon-germanium base of a heterojunction bipolar transistor. First, a silicon substrate having a mesa surrounded by a trench is formed. Next, a silicon-germanium layer is deposited on the substrate and the portion of the silicon-germanium layer adjacent the mesa is removed to form the silicon-germanium base. In a second embodiment, the process comprises the steps of forming a silicon substrate having a mesa surrounded by a trench, forming a dielectric layer in the trench adjacent the mesa, and growing a silicon-germanium layer on the mesa top surface using selective epitaxial growth to form the silicon-germanium base.
摘要翻译：用于形成异质结双极晶体管的硅 - 锗基底的工艺。首先，形成具有被沟槽包围的台面的硅基板。接下来，将硅 - 锗层沉积在衬底上，并且去除与台面相邻的硅 - 锗层的部分以形成硅 - 锗基底。在第二实施例中，该方法包括以下步骤：形成具有由沟槽包围的台面的硅衬底，在邻近台面的沟槽中形成电介质层，以及使用选择性外延生长在台面顶表面上生长硅 - 锗层以形成硅 - 锗基底。

3. 发明授权

US06667521B2 Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit 失效
公开(公告)号：US06667521B2
公开(公告)日：2003-12-23
申请号：US10283739
申请日：2002-10-29
申请人： David C. Ahlgren , Gregory G. Freeman , Feng Yi Huang , Adam D. Ticknor
发明人： David C. Ahlgren , Gregory G. Freeman , Feng Yi Huang , Adam D. Ticknor
IPC分类号： H01L2976
CPC分类号： H01L29/66287 , H01L21/8249 , H01L27/0623
摘要： A process for forming a bipolar transistor with a raised extrinsic base, an emitter, and a collector integrated with a CMOS circuit with a gate. An intermediate semiconductor structure is provided having CMOS and bipolar areas. An intrinsic base layer is provided in the bipolar area. A base oxide is formed across, and a sacrificial emitter stack silicon layer is deposited on, both the CMOS and bipolar areas. A photoresist is applied to protect the bipolar area and the structure is etched to remove the sacrificial layer from the CMOS area only such that the top surface of the sacrificial layer on the bipolar area is substantially flush with the top surface of the CMOS area. Finally, a polish stop layer is deposited having a substantially flat top surface across both the CMOS and bipolar areas suitable for subsequent chemical-mechanical polishing (CMP) to form the raised extrinsic base.

4. 发明授权

US06288427B1 Silicon-germanium BiCMOS on SOI 有权
公开(公告)号：US06288427B1
公开(公告)日：2001-09-11
申请号：US09768493
申请日：2001-01-24
申请人： Feng-Yi Huang
发明人： Feng-Yi Huang
IPC分类号： H01L310392
摘要： A BiCMOS integrated circuit is formed with CMOS transistors on an SOI substrate in a silicon layer having a standard thickness of 0.1 &mgr;m to 0.2 &mgr;m and with Bipolar SiGe transistors formed in an epitaxial layer nominally 0.5 &mgr;m thick. The CMOS transistors are formed first with standard processing, then covered with an insulating film. The insulating film is stripped in the bipolar areas and an epitaxial SiGe layer is deposited on the Si substrate. The bipolar transistors are formed using the SiGe epi layer for the base and having an encapsulated structure for device isolation using shallow isolation trenches and the buried oxide.

5. 发明授权

US06743651B2 Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen 有权
标题翻译：通过注入氧气分离形成绝缘体上硅衬底的方法
公开(公告)号：US06743651B2
公开(公告)日：2004-06-01
申请号：US10128794
申请日：2002-04-23
申请人： Jack O. Chu , Feng-Yi Huang , Steven J. Koester , Devendra K. Sadana
发明人： Jack O. Chu , Feng-Yi Huang , Steven J. Koester , Devendra K. Sadana
IPC分类号： H01L2100
CPC分类号： H01L21/76243 , Y10S438/966 , Y10S438/967
摘要： A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate is provided by implanting oxygen into a Si/SiGe multilayer heterostructure which comprises alternating Si and SiGe layers. Specifically, the high quality, relaxed SiGe-on-insulator is formed by implanting oxygen ions into a multilayer heterostructure which includes alternating layers of Si and SiGe. Following, the implanting step, the multilayer heterostructure containing implanted oxygen ions is annealed, i.e., heated, so as to form a buried oxide region predominately within one of the Si layers of the multilayer structure.
摘要翻译：通过将氧注入到包含交替的Si和SiGe层的Si / SiGe多层异质结构中来提供制造高质量，基本上松弛的绝缘体上硅衬底的方法。具体地说，通过将氧离子注入到包括Si和SiGe的交替层的多层异质结构中，形成绝缘体上的高质量，轻松的SiGe。接下来，注入步骤，将含有注入的氧离子的多层异质结构退火，即加热，以便主要形成多层结构的Si层之一内的掩埋氧化物区域。

6. 发明授权

US06492238B1 Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit 有权
标题翻译：具有凸起的外部基极的双极晶体管在集成的BiCMOS电路中制造
公开(公告)号：US06492238B1
公开(公告)日：2002-12-10
申请号：US09887310
申请日：2001-06-22
申请人： David C. Ahlgren , Gregory G. Freeman , Feng-Yi Huang , Adam D. Ticknor
发明人： David C. Ahlgren , Gregory G. Freeman , Feng-Yi Huang , Adam D. Ticknor
IPC分类号： H01L2100
CPC分类号： H01L29/66287 , H01L21/8249 , H01L27/0623
摘要： A process for forming a bipolar transistor with a raised extrinsic base, an emitter, and a collector integrated with a CMOS circuit with a gate. An intermediate semiconductor structure is provided having CMOS and bipolar areas. An intrinsic base layer is provided in the bipolar area. A base oxide is formed across, and a sacrificial emitter stack silicon layer is deposited on, both the CMOS and bipolar areas. A photoresist is applied to protect the bipolar area and the structure is etched to remove the sacrificial layer from the CMOS area only such that the top surface of the sacrificial layer on the bipolar area is substantially flush with the top surface of the CMOS area. Finally, a polish stop layer is deposited having a substantially flat top surface across both the CMOS and bipolar areas suitable for subsequent chemical-mechanical polishing (CMP) to form the raised extrinsic base.
摘要翻译：用于形成具有凸起的外部基极，发射极和与具有栅极的CMOS电路集成的集电极的双极晶体管的工艺。提供具有CMOS和双极区域的中间半导体结构。在双极区域内提供本征基层。基底氧化物跨越形成，牺牲发射极堆叠硅层沉积在CMOS和双极区两者上。施加光致抗蚀剂以保护双极区域，并且蚀刻该结构以从CMOS区域去除牺牲层，使得双极区域上的牺牲层的顶表面基本上与CMOS区域的顶表面齐平。最后，沉积抛光停止层，其具有穿过适于随后的化学机械抛光（CMP）的CMOS和双极区域的基本平坦的顶表面，以形成凸起的外在基体。

7. 发明授权

US06251738B1 Process for forming a silicon-germanium base of heterojunction bipolar transistor 有权
标题翻译：用于形成异质结双极晶体管的硅锗基底的工艺
公开(公告)号：US06251738B1
公开(公告)日：2001-06-26
申请号：US09480033
申请日：2000-01-10
申请人： Feng-Yi Huang
发明人： Feng-Yi Huang
IPC分类号： H01L21331
CPC分类号： H01L29/66242
摘要： A process for forming a silicon-germanium base of a heterojunction bipolar transistor. First, a silicon substrate having a mesa surrounded by a trench is formed. Next, a silicon-germanium layer is deposited on the substrate and the portion of the silicon-geranium layer adjacent the mesa is removed to form the silicon-germanium base. In a second embodiment, the process comprises the steps of forming a silicon substrate having a mesa surrounded by a trench, forming a dielectric layer in the trench adjacent the mesa, and growing a silicon-germanium layer on the mesa top surface using selective epitaxial growth to form the silicon-germanium base.
摘要翻译：用于形成异质结双极晶体管的硅 - 锗基底的工艺。首先，形成具有被沟槽包围的台面的硅基板。接下来，将硅 - 锗层沉积在衬底上，并且去除与台面相邻的硅 - 锗层的部分以形成硅 - 锗基底。在第二实施例中，该方法包括以下步骤：形成具有由沟槽包围的台面的硅衬底，在邻近台面的沟槽中形成电介质层，以及使用选择性外延生长在台面顶表面上生长硅 - 锗层以形成硅 - 锗基底。

8. 发明授权

US06235567B1 Silicon-germanium bicmos on soi 失效
标题翻译：硅锗双胞胎
公开(公告)号：US06235567B1
公开(公告)日：2001-05-22
申请号：US09387326
申请日：1999-08-31
申请人： Feng-Yi Huang
发明人： Feng-Yi Huang
IPC分类号： H01L218238
CPC分类号： H01L27/1203 , H01L21/8249 , H01L21/84
摘要： A BiCMOS integrated circuit is formed with CMOS transistors on an SOI substrate in a silicon layer having a standard thickness of 0.1 &mgr;m to 0.2 &mgr;m and with Bipolar SiGe transistors formed in an epitaxial layer nominally 0.5 &mgr;m thick. The CMOS transistors are formed first with standard processing, then covered with an insulating film. The insulating film is stripped in the bipolar areas and an epitaxial SiGe layer is deposited on the Si substrate. The bipolar transistors are formed using the SiGe epi layer for the base and having an encapsulated structure for device isolation using shallow isolation trenches and the buried oxide.
摘要翻译： BiCMOS集成电路在标准厚度为0.1μm至0.2μm的硅层中的SOI衬底上形成CMOS晶体管，并且以标称厚度为0.5μm厚的外延层形成双极SiGe晶体管。 CMOS晶体管首先用标准处理形成，然后用绝缘膜覆盖。绝缘膜在双极区域被剥离，外延SiGe层沉积在Si衬底上。双极晶体管使用用于基极的SiGe外延层形成，并且具有用于使用浅隔离沟槽和掩埋氧化物进行器件隔离的封装结构。

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