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1. 发明申请

US20150063593A1 Noise and Cross-Talk Attenuation in an Audio System by Offsetting Outputs in Phase 审中-公开
标题翻译：音频系统中的噪声和串扰衰减通过在相位上偏移输出
公开(公告)号：US20150063593A1
公开(公告)日：2015-03-05
申请号：US14490459
申请日：2014-09-18
申请人： Douglas E. Heineman , Mark A. Alexander
发明人： Douglas E. Heineman , Mark A. Alexander
IPC分类号： H03G3/30 , H03G1/04
CPC分类号： H03G3/3026 , H03F1/26 , H03F3/185 , H03F3/189 , H03F3/2173 , H03F3/45 , H03F3/45179 , H03F2200/03 , H03G1/04 , H03K5/003
摘要： An amplifier may include two or more pulse-width modulators (PWMs) controlling respective sets of switches to produce an amplified version of a source signal. The clocking for the amplifier may be controlled to delay signal processing within the PWMs relative to one another in time, thereby providing an effective time offset between the absolute moment in time of the edge transition of the controlling signals to the respective sets of switches. The PWMs may include a decrementor that counts down to zero from the next PWM duty-cycle value when a new data sample is detected, beginning a new count when the next sample is present. The PWM output may correspond to the counter value, outputting a pulse when the counter value is nonzero. A “data-sample-ready” signal may be decoded from a master counter, which may be clocked based on the high speed PWM clock, and the delay mechanism may be based on adjusting the decode value to determine when the PWM should initialize to the next data sample.
摘要翻译：放大器可以包括两个或更多个脉冲宽度调制器（PWM），其控制各组开关以产生源信号的放大版本。可以控制放大器的时钟，以在时间上相对于彼此延迟PWM内的信号处理，从而在控制信号的边沿转换到相应的开关组之间的绝对时刻之间提供有效的时间偏移。当检测到新的数据样本时，PWM可以包括从下一个PWM占空比值向下递减到零的递减器，当存在下一个采样时，开始新的计数。 PWM输出可对应于计数器值，当计数器值不为零时输出脉冲。可以从主计数器解码“数据采样就绪”信号，该主计数器可以基于高速PWM时钟来计时，并且延迟机制可以基于调整解码值来确定PWM何时应该初始化为下一个数据样本。

2. 发明授权

US07825642B1 Control system optimization via independent parameter adjustment 失效
标题翻译：通过独立参数调整进行控制系统优化
公开(公告)号：US07825642B1
公开(公告)日：2010-11-02
申请号：US12118213
申请日：2008-05-09
申请人： Chris M. Young , Douglas E. Heineman , Gregory T. Chandler
发明人： Chris M. Young , Douglas E. Heineman , Gregory T. Chandler
IPC分类号： G05F1/613 , G05F1/00
CPC分类号： H02M3/157 , H02M3/156
摘要： A method for optimizing operation of a feedback system may include generating a control signal according to a control parameter, regulating an output of the feedback system via the control signal, and monitoring the control parameter. In response to the monitoring indicating that the present value of the control parameter is outside a specific range of values, a first parameter that impacts an operating characteristic of the feedback system may be adjusted until the present value of the control parameter is within the specific range of values. The specific range of values of the control parameter may correspond to a target level of the operating characteristic of the feedback system with respect to the first parameter. One or more additional independent parameters also impacting the operating characteristic of the system may be similarly adjusted to obtain a minimum present value of the control parameter at which the output of the feedback system would be regulated, with the minimum value of the control parameter corresponding to the target level of the operating characteristic of the feedback system with respect to, collectively, the first parameter and the one or more additional independent parameters.
摘要翻译：一种用于优化反馈系统的操作的方法可以包括根据控制参数生成控制信号，通过控制信号调节反馈系统的输出，并监视控制参数。响应于监视指示控制参数的当前值在特定值的范围之外，可以调整影响反馈系统的操作特性的第一参数，直到控制参数的当前值在特定范围内的价值观。控制参数的值的特定范围可以对应于反馈系统相对于第一参数的操作特性的目标水平。可以类似地调整影响系统的操作特性的一个或多个另外的独立参数，以获得反馈系统的输出将被调节的控制参数的最小值，其中控制参数的最小值对应于相对于第一参数和一个或多个附加独立参数的反馈系统的操作特性的目标水平。

3. 发明授权

US08981751B1 Control system optimization via adaptive frequency adjustment 有权
标题翻译：通过自适应频率调整进行控制系统优化
公开(公告)号：US08981751B1
公开(公告)日：2015-03-17
申请号：US12118260
申请日：2008-05-09
申请人： Chris M. Young , Douglas E. Heineman , Gregory T. Chandler
发明人： Chris M. Young , Douglas E. Heineman , Gregory T. Chandler
IPC分类号： G05F1/00
CPC分类号： H02M3/157 , H02M3/156
摘要： A feedback control system, e.g. a voltage regulator, may include a control stage controlling an output stage that generates an output. The control stage may generate a control signal, e.g. a pulse-width modulated signal, having a duty-cycle and a switching frequency, and adjust the switching frequency when a present value of the duty-cycle differs from a most recent previous value of the duty-cycle, until the duty-cycle starts increasing, while also adjusting the duty-cycle according to the output. By adjusting the switching frequency, the (power) efficiency of the system may be optimized also regulating the output. The feedback system may also adjust the switching frequency according to an alternate algorithm to improve but not necessarily optimize the power efficiency by scaling a programmed frequency value using a scaling factor that is a function of a maximum duty-cycle value, a present frequency value, the programmed frequency value, and a minimum frequency value.
摘要翻译：反馈控制系统，例如电压调节器可以包括控制级，其控制产生输出的输出级。控制级可以产生控制信号，例如具有占空比和开关频率的脉冲宽度调制信号，并且当占空比的当前值与占空比的最近的先前值不同时调节开关频率，直到占空比开始增加，同时根据产量调整占空比。通过调整开关频率，可以优化系统的（功率）效率，同时也调节输出。反馈系统还可以根据替代算法调整开关频率，以改进但不一定通过使用作为最大占空比值，当前频率值的函数的缩放因子缩放编程频率值来优化功率效率，编程频率值和最小频率值。

4. 发明授权

US08487477B2 Method to properly ramp current sharing 有权
标题翻译：正确缓存电流共享的方法
公开(公告)号：US08487477B2
公开(公告)日：2013-07-16
申请号：US12505495
申请日：2009-07-19
申请人： Douglas E. Heineman
发明人： Douglas E. Heineman
IPC分类号： H02J1/00
CPC分类号： H02J1/102 , Y10T307/406 , Y10T307/555 , Y10T307/707
摘要： A distributed power management system may include a communication bus and a plurality of POL (point-of-load) regulators coupled to the communication bus, and configured in a current sharing arrangement in which each POL regulator of the plurality of POL regulators has a respective output stage coupled to a common load and configured to generate a respective output current. Each POL regulator may have a respective phase in the current sharing configuration, and may transmit and receive information over the bus according to a bus communication protocol corresponding to the bus. The plurality of POL regulators may autonomously synchronize, to each other, a start time of their respective output voltage signal ramps by transmitting monitoring information to each other over the communication bus, while each of the POL regulators is ramping a duty cycle of a gate signal controlling a low-side field effect transistor of the output stage of the POL regulator according to a duty cycle of a gate signal controlling a high-side FET of the output stage of the POL regulator.
摘要翻译：分布式电力管理系统可以包括通信总线和耦合到通信总线的多个POL（负载点）调节器，并且被配置在电流共享装置中，其中多个POL调节器中的每个POL调节器具有相应的输出级耦合到公共负载并且被配置为产生相应的输出电流。每个POL调节器可以在当前共享配置中具有相应的相位，并且可以根据对应于总线的总线通信协议通过总线发送和接收信息。多个POL调节器可以通过在通信总线上彼此发送监视信息来自主地同步其各自的输出电压信号斜坡的开始时间，同时每个POL调节器斜坡上增加一个门信号的占空比根据控制POL调节器的输出级的高侧FET的栅极信号的占空比来控制POL稳压器的输出级的低侧场效应晶体管。

5. 发明申请

US20130089161A1 Low-Power Modulation in an Amplifier 审中-公开
标题翻译：放大器中的低功耗调制
公开(公告)号：US20130089161A1
公开(公告)日：2013-04-11
申请号：US13589363
申请日：2012-08-20
申请人： Douglas E. Heineman
发明人： Douglas E. Heineman
IPC分类号： H04L27/00
CPC分类号： H03G3/3026 , H03F1/26 , H03F3/185 , H03F3/189 , H03F3/2173 , H03F3/45 , H03F3/45179 , H03F2200/03 , H03G1/04 , H03K5/003
摘要： A switching audio amplifier may include a modulation enhancement feature, in which the pulse-width modulated (PWM) signals driving the output stage are reduced or increased by identical step sizes to create an auxiliary PWM scheme representative of an idle (low-power) state of the input signal. The PWM signals, provided to a full-bridge power stage circuit for example, may be thereby reduced to another state to reduce power dissipation in a switch-mode power supply. By incrementally adjusting the PWM duty-cycle identically in all PWM signals to a value less than (or up to) 50%, the amount of current dissipated in the output load may be effectively controlled. The PWM pulses may be adjusted up or down, while checking for saturation corresponding to both minimum and maximum pulse-widths. A dampener circuit may be used to set the time between incremental adjustments, to further reduce audible pops and clicks.
摘要翻译：切换音频放大器可以包括调制增强特征，其中驱动输出级的脉冲宽度调制（PWM）信号通过相同的步长减小或增加，以产生表示空闲（低功率）状态的辅助PWM方案的输入信号。因此，提供给例如全桥功率级电路的PWM信号可以被降低到另一状态，以降低开关模式电源中的功耗。通过将所有PWM信号中的PWM占空比逐步调整为小于（或高达）50％的值，可以有效地控制输出负载中消耗的电流量。可以向上或向下调整PWM脉冲，同时检查对应于最小和最大脉冲宽度的饱和度。减震器电路可用于设置增量调节之间的时间，以进一步减少可听见的声音和喀哒声。

6. 发明申请

US20100013304A1 Adding and Dropping Phases in Current Sharing 有权
标题翻译：在当前共享中添加和删除阶段
公开(公告)号：US20100013304A1
公开(公告)日：2010-01-21
申请号：US12505493
申请日：2009-07-19
申请人： Douglas E. Heineman
发明人： Douglas E. Heineman
IPC分类号： H02J1/00
CPC分类号： H02M3/1584 , G06F1/26 , H02J1/08 , H02M2001/008 , Y10T307/406 , Y10T307/549 , Y10T307/582
摘要： A distributed power management system may include a digital communication bus and a plurality of POL (point-of-load) regulators coupled to the communication bus and configured in a current sharing arrangement in which each POL regulator of the plurality of POL regulators has a respective output stage coupled to a common load and configured to generate a respective output current. Each POL regulator may have a respective phase in the current sharing configuration, and each POL regulator may transmit and receive information over the bus according to a bus communication protocol corresponding to the bus. Each POL regulator may autonomously add and drop its phase as required by the system, by sequentially manipulating a pulse width of a couple of gate signals configured to respectively control a high-side field effect transistor (FET) and low-side FET in the POL regulator's output stage.
摘要翻译：分布式电力管理系统可以包括数字通信总线和耦合到通信总线并且以电流共享布置配置的多个POL（负载点）调节器，其中多个POL调节器中的每个POL调节器具有相应的输出级耦合到公共负载并且被配置为产生相应的输出电流。每个POL调节器可以具有电流共享配置中的相应相位，并且每个POL调节器可以根据对应于总线的总线通信协议通过总线发送和接收信息。每个POL调节器可以根据系统的要求自主地添加和放弃其相位，通过顺序地操纵配置成分别控制POL中的高侧场效应晶体管（FET）和低边FET的栅极信号的脉冲宽度监管机构的产出阶段。

7. 发明授权

US08829990B2 Attenuating non-linear noise in an amplifier with alternating DC-offset correction 有权
标题翻译：在具有交流DC偏移校正的放大器中衰减非线性噪声
公开(公告)号：US08829990B2
公开(公告)日：2014-09-09
申请号：US13595141
申请日：2012-08-27
申请人： Douglas E. Heineman , Mark A. Alexander
发明人： Douglas E. Heineman , Mark A. Alexander
IPC分类号： H03F3/38 , H03F3/217 , H03F3/189 , H03F1/26 , H03K5/003
CPC分类号： H03G3/3026 , H03F1/26 , H03F3/185 , H03F3/189 , H03F3/2173 , H03F3/45 , H03F3/45179 , H03F2200/03 , H03G1/04 , H03K5/003
摘要： An amplifier may include two or more pulse-width modulators controlling respective sets of switches to produce an amplified version of a source signal. A positive DC-offset based on the source signal may be applied to the pulse-width modulator controlling one respective set of switches, and an equal value negative DC-offset may be applied to the pulse-width modulator controlling the other respective set of switches, to provide an effective offset between the respective points in time of the rising/falling edges of the different pulse-width modulated control signals. The addition of alternating positive and negative DC-offset values doesn't affect the output load, and doesn't degrade the signal. The DC-offsets may be added at a frequency selected to be beyond the signal baseband, and the value of the small input signal level may be determined using an RMS level comparator or similar measurement technique.
摘要翻译：放大器可以包括两个或更多个脉冲宽度调制器，其控制各组开关以产生源信号的放大版本。可以将基于源极信号的正DC偏移施加到控制一组相应开关的脉冲宽度调制器，并且可以将相等值的负DC偏移施加到控制另一组开关的脉宽调制器以提供不同脉冲宽度调制控制信号的上升/下降沿的各个时间点之间的有效偏移。交替的正和负DC偏移值的添加不会影响输出负载，也不会降低信号。可以以选择为超出信号基带的频率添加DC偏移，并且可以使用RMS电平比较器或类似的测量技术来确定小输入信号电平的值。

8. 发明授权

US08638081B2 Active droop current sharing 有权
标题翻译：主动下垂电流共享
公开(公告)号：US08638081B2
公开(公告)日：2014-01-28
申请号：US13526791
申请日：2012-06-19
申请人： Douglas E. Heineman , Kenneth W. Fernald
发明人： Douglas E. Heineman , Kenneth W. Fernald
IPC分类号： H02J7/34
CPC分类号： H02M3/1584 , G06F1/26 , H02J1/08 , H02M2001/008 , Y10T307/422
摘要： Point-of-load (POL) regulators may be configured as multiphase POL DC-to-DC (direct current to direct current) converters, operating in a multiphase configuration in order to boost the total current available to a system. Current balancing may be performed by utilizing an active low bandwidth current sharing algorithm that uses matched artificial line resistance (droop resistance) while maintaining multi-loop stability during both steady-state and dynamic transient states. The current sharing algorithm may be facilitated through digital communication between the devices, where the digital bus may be a single wire bus, a parallel bus or a clock-and-data bus.
摘要翻译：负载点（POL）调节器可以配置为多相POL DC-DC（直流到直流电）转换器，以多相配置运行，以提高系统可用的总电流。可以通过利用使用匹配的人造线路电阻（下降电阻）的有源低带宽电流共享算法同时在稳态和动态瞬态状态期间保持多环路稳定性来执行电流平衡。可以通过设备之间的数字通信来促进当前共享算法，其中数字总线可以是单线总线，并行总线或时钟和数据总线。

9. 发明申请

US20130088296A1 Attenuating Noise and Cross-Talk in an Audio System by Offsetting Outputs In Phase 有权
标题翻译：音频系统中的衰减噪声和对讲功率相位偏移输出
公开(公告)号：US20130088296A1
公开(公告)日：2013-04-11
申请号：US13595276
申请日：2012-08-27
申请人： Douglas E. Heineman , Mark A. Alexander
发明人： Douglas E. Heineman , Mark A. Alexander
IPC分类号： H03F1/32 , H03F3/217
CPC分类号： H03G3/3026 , H03F1/26 , H03F3/185 , H03F3/189 , H03F3/2173 , H03F3/45 , H03F3/45179 , H03F2200/03 , H03G1/04 , H03K5/003
摘要： An amplifier may include two or more pulse-width modulators (PWMs) controlling respective sets of switches to produce an amplified version of a source signal. The clocking for the amplifier may be controlled to delay signal processing within the PWMs relative to one another in time, thereby providing an effective time offset between the respective edge transitions of the controlling signals provided to the respective sets of switches. The PWMs may count down to zero from the next PWM duty-cycle value when a new data sample is detected, beginning a new count for each new sample, with the PWM outputting a pulse when the counter value is nonzero. A “data-sample-ready” signal may be decoded from a master counter, which may be clocked based on the high speed PWM clock, and the decode value may be adjusted to determine when the PWM should initialize to the next data sample.
摘要翻译：放大器可以包括两个或更多个脉冲宽度调制器（PWM），其控制各组开关以产生源信号的放大版本。可以控制放大器的时钟以在时间上相对于彼此延迟PWM内的信号处理，从而在提供给各组开关的控制信号的各个边沿跃迁之间提供有效的时间偏移。当检测到新的数据采样时，PWM可以从下一个PWM占空比值倒数为零，开始每个新采样的新计数，当计数器值为非零时，PWM输出脉冲。数据采样就绪信号可以从主计数器解码，主计数器可以基于高速PWM时钟进行计时，并且可以调整解码值以确定PWM应该何时初始化到下一个数据采样。

10. 发明申请

US20120262141A1 Active Droop Current Sharing 有权
标题翻译：主动下垂电流共享
公开(公告)号：US20120262141A1
公开(公告)日：2012-10-18
申请号：US13526791
申请日：2012-06-19
申请人： Douglas E. Heineman , Kenneth W. Fernald
发明人： Douglas E. Heineman , Kenneth W. Fernald
IPC分类号： G05F1/46
CPC分类号： H02M3/1584 , G06F1/26 , H02J1/08 , H02M2001/008 , Y10T307/422
摘要： Point-of-load (POL) regulators may be configured as multiphase POL DC-to-DC (direct current to direct current) converters, operating in a multiphase configuration in order to boost the total current available to a system. Current balancing may be performed by utilizing an active low bandwidth current sharing algorithm that uses matched artificial line resistance (droop resistance) while maintaining multi-loop stability during both steady-state and dynamic transient states. The current sharing algorithm may be facilitated through digital communication between the devices, where the digital bus may be a single wire bus, a parallel bus or a clock-and-data bus.
摘要翻译：负载点（POL）调节器可以配置为多相POL DC-DC（直流到直流电）转换器，以多相配置运行，以提高系统可用的总电流。可以通过利用使用匹配的人造线路电阻（下降电阻）的有源低带宽电流共享算法同时在稳态和动态瞬态状态期间保持多环路稳定性来执行电流平衡。可以通过设备之间的数字通信来促进当前共享算法，其中数字总线可以是单线总线，并行总线或时钟和数据总线。

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