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1. 发明授权

US09658975B2 Data transfer manager 有权
公开(公告)号：US09658975B2
公开(公告)日：2017-05-23
申请号：US13563683
申请日：2012-07-31
申请人： Kenneth W. Fernald
发明人： Kenneth W. Fernald
IPC分类号： G06F3/00 , G06F13/28
CPC分类号： G06F13/28 , Y02D10/14
摘要： Techniques are disclosed relating to a system that implements direct memory access (DMA). In one embodiment, an apparatus is disclosed that includes a dedicated data transfer management (DTM) circuit. The DTM circuit is configured to provide commands to a direct memory access (DMA) controller coupled to a bus to facilitate the DMA controller retrieving portions of a data object to be transmitted to a peripheral circuit via the bus. In some embodiments, the DTM is configured to assemble a data packet having a payload supplied by a processor, where the DTM circuit is configured to assemble the data packet by generating direct memory access (DMA) requests for the DMA controller. In such an embodiment, the DMA requests cause a plurality of peripheral circuits coupled to the bus to transfer portions of the data packet over the bus.

2. 发明授权

US08904076B2 Coder with snoop mode 有权
标题翻译：编码器采用窥探模式
公开(公告)号：US08904076B2
公开(公告)日：2014-12-02
申请号：US13485711
申请日：2012-05-31
申请人： Kenneth W. Fernald
发明人： Kenneth W. Fernald
IPC分类号： G06F13/14 , G06F13/36
CPC分类号： G06F13/4027 , H03M13/09
摘要： Techniques are disclosed relating to coding data in an apparatus. In one embodiment, the apparatus includes a coder circuit coupled to a data bus, where the coder circuit is configured to receive an indication that data is being transmitted over the data bus from a first circuit to a second circuit. The coder circuit is configured to perform a coding operation on the data in response to receiving the indication. In some embodiments, the coder circuit is configured to operate in a mode in which the coder circuit captures data of a data transmission via the data bus without being specified as a participant of the data transmission. When the coder circuit is not operating in the mode, the coder circuit is not configured to capture data of a data transmission without being specified as a participant of the data transmission.
摘要翻译：公开了与装置中的编码数据有关的技术。在一个实施例中，该装置包括耦合到数据总线的编码器电路，其中编码器电路被配置为接收数据正在数据总线上从第一电路传输到第二电路的指示。编码器电路被配置为响应于接收到指示而对数据执行编码操作。在一些实施例中，编码器电路被配置为在编码器电路经由数据总线捕获数据传输的数据而不被指定为数据传输的参与者的模式下操作。当编码器电路不在该模式下操作时，编码器电路不被配置为捕获数据传输的数据而不被指定为数据传输的参与者。

3. 发明授权

US08378724B2 Controlling a frequency locked loop 有权
标题翻译：控制频率锁定环
公开(公告)号：US08378724B2
公开(公告)日：2013-02-19
申请号：US12976298
申请日：2010-12-22
申请人： Thomas S. David , Kenneth W. Fernald , Alan L. Westwick
发明人： Thomas S. David , Kenneth W. Fernald , Alan L. Westwick
IPC分类号： H03L7/06
CPC分类号： H03L7/146 , H03L7/085 , H03L2207/50
摘要： An apparatus includes a frequency locked loop and a controller. The controller stores a state of the frequency locked loop at which an output signal of the frequency locked loop is locked onto a reference signal and subsequently initializes the frequency locked loop with the stored state to cause the frequency locked loop to relock the output signal to the reference signal.
摘要翻译：一种装置包括频率锁定环和控制器。控制器存储频率锁定环路的状态，频率锁定环路的输出信号锁定在参考信号上，随后以存储状态初始化锁频环路，使频率锁定环路将输出信号重新锁定到参考信号。

4. 发明申请

US20120161835A1 CONTROLLING A FREQUENCY LOCKED LOOP 有权
标题翻译：控制频率锁定环
公开(公告)号：US20120161835A1
公开(公告)日：2012-06-28
申请号：US12976298
申请日：2010-12-22
申请人： Thomas S. David , Kenneth W. Fernald , Alan L. Westwick
发明人： Thomas S. David , Kenneth W. Fernald , Alan L. Westwick
IPC分类号： H03L7/08
CPC分类号： H03L7/146 , H03L7/085 , H03L2207/50
摘要： An apparatus includes a frequency locked loop and a controller. The controller stores a state of the frequency locked loop at which an output signal of the frequency locked loop is locked onto a reference signal and subsequently initializes the frequency locked loop with the stored state to cause the frequency locked loop to relock the output signal to the reference signal.
摘要翻译：一种装置包括频率锁定环和控制器。控制器存储频率锁定环路的状态，频率锁定环路的输出信号锁定在参考信号上，随后以存储状态初始化锁频环路，使频率锁定环路将输出信号重新锁定到参考信号。

5. 发明授权

US08055932B2 Precision oscillator for an asynchronous transmission system 有权
标题翻译：用于异步传输系统的精密振荡器
公开(公告)号：US08055932B2
公开(公告)日：2011-11-08
申请号：US12166229
申请日：2008-07-01
申请人： Kartika Prihadi , Kenneth W. Fernald
发明人： Kartika Prihadi , Kenneth W. Fernald
IPC分类号： G06F1/12 , G06F13/42 , G06F1/00 , G06F1/04 , G06F5/06 , H04L5/00 , H04L7/00
CPC分类号： H03L1/022 , G06F1/08 , H03K3/0231
摘要： A precision oscillator for an asynchronous transmission system. An integrated system on a chip with serial asynchronous communication capabilities includes processing circuitry for performing predefined digital processing functions on the chip and having an associated on chip free running clock circuit for generating a temperature compensated clock. An on-chip UART is provided for digitally communicating with an off-chip UART, which off-chip UART has an independent time reference, which communication between the on-chip UART and the off-chip UART is effected without clock recovery. The on-chip UART has a time-base derived from the temperature compensated clock. The temperature compensated clock provides a time reference for both the processing circuitry and the on-chip UART.
摘要翻译：用于异步传输系统的精密振荡器。具有串行异步通信能力的集成在芯片上的系统包括处理电路，用于在芯片上执行预定义的数字处理功能，并具有相关的片上自由运行时钟电路，用于产生温度补偿时钟。提供片上UART，用于与片外UART进行数字通信，该片外UART具有独立的时基参考，片上UART和片外UART之间的通信无需时钟恢复即可实现。片内UART具有源自温度补偿时钟的时基。温度补偿时钟为处理电路和片上UART提供时间参考。

6. 发明授权

US07504900B2 Integrated circuit package including programmable oscillators 有权
标题翻译：集成电路封装，包括可编程振荡器
公开(公告)号：US07504900B2
公开(公告)日：2009-03-17
申请号：US11694624
申请日：2007-03-30
申请人： Donald E. Alfano , Danny J. Allred , Douglas S. Piasecki , Kenneth W. Fernald , Ka Y. Leung , Brian Caloway , Alan Storvik , Paul Highley , Douglas R. Holberg
发明人： Donald E. Alfano , Danny J. Allred , Douglas S. Piasecki , Kenneth W. Fernald , Ka Y. Leung , Brian Caloway , Alan Storvik , Paul Highley , Douglas R. Holberg
IPC分类号： G06F1/04 , H03B5/00 , H03B5/12 , H03B5/24 , H03B5/36
CPC分类号： G06F13/385 , G06F1/08 , G06F15/7814 , H03M1/122 , H03M1/183 , H03M1/462 , Y02D10/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： An integrated circuit package includes a processing core and an internal oscillator. The processing core operates on a set of instructions to carry out predefined processes. The internal oscillator provides a system clock for the integrated circuit package. The internal oscillator has associated therewith an internal control register for controlling the operation of the internal oscillator responsive to control bits of the internal oscillator controlled by the processing core.
摘要翻译：集成电路封装包括处理核心和内部振荡器。处理核心通过一组指令来执行预定义的过程。内部振荡器为集成电路封装提供系统时钟。内部振荡器具有与其相关联的内部控制寄存器，用于响应于由处理核心控制的内部振荡器的控制位来控制内部振荡器的操作。

7. 发明申请

US20080155289A1 MICRO CONTROLLER UNIT (MCU) WITH RTC 有权
标题翻译：微控制器单元（MCU）与RTC
公开(公告)号：US20080155289A1
公开(公告)日：2008-06-26
申请号：US12046321
申请日：2008-03-11
申请人： KENNETH W. FERNALD , DONALD E. ALFANO
发明人： KENNETH W. FERNALD , DONALD E. ALFANO
IPC分类号： G06F1/32 , G06F1/14
CPC分类号： G06F1/3203
摘要： A microcontroller unit (MCU) is disclosed with a stand-alone Real Time Clock (RTC). The MCU includes a processing circuit for receiving digital information and processing said received digital information. A primary clock circuit provides the timing for the processing circuit. A power control circuit controls the power to the processing circuit and the primary clock circuit to control the operation thereof to operate in at least a full power mode drawing a full power level from a supply voltage input and a reduced power mode drawing less than the full power level from the supply voltage input. A stand-alone RTC circuit is also provided, the stand-alone RTC circuit including an RTC clock circuit operating independent of the primary clock circuit. A timer clocked by the RTC clock circuit is operable to increment a stored time value for output therefrom, the RTC clock circuit having a defined time base. An input/output (I/O) device provides access by the processing circuit to the results output by the timer. A power management circuitry manages the power to the stand-alone RTC circuit, such that the RTC clock circuit, the timer, and the I/O device operate regardless of the power mode of operation of the processing circuitry and the primary clock circuit.
摘要翻译：公开了具有独立实时时钟（RTC）的微控制器单元（MCU）。 MCU包括用于接收数字信息并处理所接收的数字信息的处理电路。主时钟电路为处理电路提供定时。电源控制电路控制处理电路和主时钟电路的电源，以控制其工作在至少全功率模式下工作，从供电电压输入和低功耗模式绘制小于全功率模式功率电平从电源电压输入。还提供独立的RTC电路，独立的RTC电路包括独立于主时钟电路工作的RTC时钟电路。由RTC时钟电路计时钟的定时器可操作以增加存储的时间值以便从其输出，RTC时钟电路具有确定的时基。输入/输出（I / O）设备提供处理电路对定时器输出的结果的访问。电源管理电路管理独立RTC电路的电源，使得RTC时钟电路，定时器和I / O设备无论处理电路和主时钟电路的功率工作模式如何都工作。

8. 发明授权

US07362554B2 Electrostatic discharge (ESD) clamp using output driver 失效
标题翻译：使用输出驱动器的静电放电（ESD）钳位
公开(公告)号：US07362554B2
公开(公告)日：2008-04-22
申请号：US10431942
申请日：2003-05-08
申请人： James Dub Austin , Kenneth W. Fernald
发明人： James Dub Austin , Kenneth W. Fernald
IPC分类号： H02H3/22
CPC分类号： H01L27/0285
摘要： Electrostatic discharge (ESD) clamp using output driver. An electrostatic discharge (ESD) protection device for an output driver having a p-channel transistor and n-transistor pair connected between a power supply terminal and ground for driving an input/output pad therefrom. An ESD event detector is provided for detecting an ESD event on the pad. A drive circuit drives the n-channel and p-channel drive transistors in response to receiving a logic control signal to either drive the pad from the supply terminal or to sink the pad to ground. ESD protection logic circuitry is provided to cause both the p-channel and n-channel transistors to turn on when the ESD event detector detects an ESD event, the ESD protection circuitry disposed forward of the drive circuit such that the ESD protection logic circuitry operates independent of the state of the drive circuit.
摘要翻译：使用输出驱动器的静电放电（ESD）钳位。一种用于输出驱动器的静电放电（ESD）保护装置，其具有连接在电源端子和地之间的p沟道晶体管和n型晶体管对，用于驱动输入/输出衬垫。提供ESD事件检测器，用于检测焊盘上的ESD事件。驱动电路响应于接收到逻辑控制信号而驱动n沟道和p沟道驱动晶体管，以从供电端驱动焊盘或将焊盘吸收到地。提供ESD保护逻辑电路以在ESD事件检测器检测到ESD事件时使p沟道晶体管和n沟道晶体管导通，ESD保护电路设置在驱动电路的前方，使得ESD保护逻辑电路独立运行的驱动电路的状态。

9. 发明授权

US07343504B2 Micro controller unit (MCU) with RTC 有权
标题翻译：微控制器（MCU）与RTC
公开(公告)号：US07343504B2
公开(公告)日：2008-03-11
申请号：US10881793
申请日：2004-06-30
申请人： Kenneth W. Fernald , Donald E. Alfano
发明人： Kenneth W. Fernald , Donald E. Alfano
IPC分类号： G06F1/26
CPC分类号： G06F1/3203
摘要： A microcontroller unit (MCU) is disclosed with a stand-alone Real Time Clock (RTC). The MCU includes a processing circuit for receiving digital information and processing said received digital information. A primary clock circuit provides the timing for the processing circuit. A power control circuit controls the power to the processing circuit and the primary clock circuit to control the operation thereof to operate in at least a full power mode drawing a full power level from a supply voltage input and a reduced power mode drawing less than the full power level from the supply voltage input. A stand-alone RTC circuit is also provided, the stand-alone RTC circuit including an RTC clock circuit operating independent of the primary clock circuit. A timer clocked by the RTC clock circuit is operable to increment a stored time value for output therefrom, the RTC clock circuit having a defined time base. An input/output (I/O) device provides access by the processing circuit to the results output by the timer. A power management circuitry manages the power to the stand-alone RTC circuit, such that the RTC clock circuit, the timer, and the I/O device operate regardless of the power mode of operation of the processing circuitry and the primary clock circuit.
摘要翻译：公开了具有独立实时时钟（RTC）的微控制器单元（MCU）。 MCU包括用于接收数字信息并处理所接收的数字信息的处理电路。主时钟电路为处理电路提供定时。电源控制电路控制处理电路和主时钟电路的电源，以控制其工作在至少全功率模式下工作，从供电电压输入和低功耗模式绘制小于全功率模式功率电平从电源电压输入。还提供独立的RTC电路，独立的RTC电路包括独立于主时钟电路工作的RTC时钟电路。由RTC时钟电路计时钟的定时器可操作以增加存储的时间值以便从其输出，RTC时钟电路具有确定的时基。输入/输出（I / O）设备提供处理电路对定时器输出的结果的访问。电源管理电路管理独立RTC电路的电源，使得RTC时钟电路，定时器和I / O设备无论处理电路和主时钟电路的功率工作模式如何都工作。

10. 发明授权

US07250825B2 Method and apparatus for calibration of a low frequency oscillator in a processor based system 有权
标题翻译：用于在基于处理器的系统中校准低频振荡器的方法和装置
公开(公告)号：US07250825B2
公开(公告)日：2007-07-31
申请号：US10865110
申请日：2004-06-10
申请人： Brent Wilson , Paul Highley , Kenneth W. Fernald
发明人： Brent Wilson , Paul Highley , Kenneth W. Fernald
IPC分类号： G01R23/10 , H03I1/00
CPC分类号： H03L7/08 , H03L1/02
摘要： Method and apparatus for calibration of a low frequency oscillator in a processor based system. A method for calibrating an on-chip non-precision oscillator. An on-chip precision oscillator is provided having a known frequency of operation that is within an acceptable operating tolerance. The on-chip precision oscillator is used as a time base and then the period of the on-chip oscillator is measured as a function of the time base. The difference between the measured frequency of the on-chip non-precision oscillator and a desired operating frequency of the on-chip non-precision oscillator is then determined. After the difference is determined, the frequency of the on-chip non-precision oscillator is adjusted to minimize the determined difference.
摘要翻译：用于在基于处理器的系统中校准低频振荡器的方法和装置。一种用于校准片上非精密振荡器的方法。提供具有在可接受的工作公差内的已知操作频率的片上精密振荡器。片上精密振荡器用作时基，然后根据时基测量片上振荡器的周期。然后确定片上非精密振荡器的测量频率与片上非精密振荡器的期望工作频率之间的差异。在确定差异之后，调整片上非精密振荡器的频率以使确定的差最小化。

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