会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明申请
    • Multi-level cell memory device and method thereof
    • 多级单元存储装置及其方法
    • US20110213930A1
    • 2011-09-01
    • US13067099
    • 2011-05-09
    • Sung Chung ParkJun Jin KongYoung Hwan LeeDong Ku Kang
    • Sung Chung ParkJun Jin KongYoung Hwan LeeDong Ku Kang
    • G06F12/08
    • G11C11/5621G11C7/1006G11C29/00
    • A Multi-Level Cell (MLC) memory device and method thereof are provided. The example MLC memory device may be configured to perform data operations, and may include an MLC memory cell, a first coding device performing a first coding function, the first coding function being one of an encoding function and a decoding function, a second coding device performing a second coding function, the second coding function being one of an encoding function and a decoding function and a signal module configured to perform at least one of instructing the MLC memory cell to store data output by the second coding device if the first and second coding functions are encoding functions, and generating a demapped bit stream based on data retrieved from the MLC memory cell if the first and second coding functions are decoding functions.
    • 提供了一种多级单元(MLC)存储器件及其方法。 示例MLC存储器件可以被配置为执行数据操作,并且可以包括MLC存储器单元,执行第一编码功能的第一编码装置,作为编码功能和解码功能之一的第一编码功能,第二编码装置 执行第二编码功能,所述第二编码功能是编码功能和解码功能之一;以及信号模块,被配置为执行指令所述MLC存储器单元存储由所述第二编码装置输出的数据中的至少一个,如果所述第一和第二编码功能 编码功能是编码功能,并且如果第一和第二编码功能是解码功能,则基于从MLC存储器单元检索的数据来生成解映射比特流。
    • 5. 发明授权
    • Non-volatile memory devices and methods of programming the same
    • 非易失性存储器件和编程方法相同
    • US07623374B2
    • 2009-11-24
    • US11808600
    • 2007-06-12
    • Dong-ku Kang
    • Dong-ku Kang
    • G11C16/04
    • G11C8/10G11C11/5621G11C11/5628G11C16/0483G11C16/3418G11C16/3427G11C2211/5646
    • A non-volatile memory device and method thereof are provided. The example non-volatile memory device may include a plurality of main cells, each of the plurality of main cells arranged at first intersection regions between one of a plurality of word lines and one of a plurality of main bit line pairs and a plurality of flag cells, each of the plurality of flag cells arranged at second intersection regions between one of the plurality of word lines and a plurality of flag bit line pairs, each of the plurality of flag cells configured to store page information in a manner such that page information associated with main cells corresponding to one of the main bit line pairs is stored in flag cells corresponding to more than one of the flag bit line pairs.
    • 提供了一种非易失性存储器件及其方法。 示例性非易失性存储器件可以包括多个主单元,多个主单元中的每一个排列在多个字线中的一个与多个主位线对之一和多个标志之间的第一交叉区域 多个标志单元中的每一个排列在多个字线中的一个之间的第二交叉区域和多个标志位线对之间,所述多个标志单元中的每一个被配置为以如下方式存储页面信息:页面信息 与对应于主位线对之一的主单元相关联的存储在对应于多于一个标志位线对的标志单元中。