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    • 3. 发明授权
    • Interface between a host and a slave device having a latency greater than the latency of the host
    • 主机和从设备之间的接口具有大于主机延迟的延迟
    • US07054971B2
    • 2006-05-30
    • US10391913
    • 2003-03-19
    • Denis BeaudoinPatrick Wai-Tong Leung
    • Denis BeaudoinPatrick Wai-Tong Leung
    • G06F12/00
    • G06F13/4027
    • An interface between a host and a slave device having a latency greater than the latency of the host is disclosed. The interface includes a register and a state machine. The state machine provides data to the host from any address in the slave in two host read cycles. The state machine receives a first request from the host for data stored at a first address in the slave at a first time. The state machine stores the data returned from the slave in response to the first request in the register at a second time. The state machine receives a second request from the host for data stored at a second address in the slave at a third time. The state machine provides the data specified in the first request to the host at a fourth time. The state machine is additionally adapted to provide data to the host from a second address in the slave in one read cycle.
    • 公开了主机与从设备之间的接口,其间延迟大于主机的等待时间。 该接口包括寄存器和状态机。 状态机在两个主机读取周期中从主机中的任何地址向主机提供数据。 状态机在第一时间从主机接收存储在从机中的第一地址处的数据的第一请求。 状态机在第二次存储从从机返回的数据以响应于第一请求在寄存器中。 状态机在第三时间从主机接收存储在从属设备的第二地址上的数据的第二请求。 状态机将第一次请求中指定的数据第四次提供给主机。 状态机还适于在一个读取周期中从从站中的第二地址向主机提供数据。
    • 6. 发明授权
    • Current booster for PC card
    • 电流助推器用于PC卡
    • US5847553A
    • 1998-12-08
    • US709583
    • 1996-09-09
    • J. F. Denis BeaudoinGregory John Funk
    • J. F. Denis BeaudoinGregory John Funk
    • H02M3/155G05F1/40
    • H02M3/155
    • An integrated circuit card, such as PC Card, is provided in which a step-down converter in the form of a switching regulator provides a stable operating voltage at increased current beyond what is normally available from a single source. In particular, a quiet and stable power supply is obtained by modifying the standard configuration of a switching regulator such that the catch diode, or free-wheeling diode, instead of being connected to ground at the non-blocking terminal, is connected to a primary voltage source approximating the desired output voltage. If the desired output voltage is 5V, for example, the catch diode may be connected to Vcc supplied by a PC Card slot, which nominally supplies 5V. The block terminal of the catch diode is connected through the switch of the switching regulator to a higher, supplementary, voltage source, e.g. Vpp=12V in the case of a PC Card slot. During operation of the integrated circuit card at lower power levels, the primary voltage source is able to supply substantially all of the required power, such that the switch of the switching regulator may remain predominantly open, minimizing switching noise. During operation of the integrated circuit card at higher power levels, the switching regulator boosts the output voltage just enough to compensate for voltage droop. The integrated circuit card is therefore supplied with a stable, low-noise source of power.
    • 提供了诸如PC卡的集成电路卡,其中开关调节器形式的降压转换器以增加的电流提供超过单个源通常可用的稳定工作电压。 特别地,通过修改开关调节器的标准配置来获得安静和稳定的电源,使得捕获二极管或续流二极管而不是在非阻塞端子处与地连接,连接到初级 电压源近似于所需的输出电压。 例如,如果期望的输出电压为5V,则捕获二极管可以连接到由PC卡插槽提供的Vcc,该插槽标称地提供5V。 捕捉二极管的块端子通过开关调节器的开关连接到较高的补充电压源,例如, 在PC卡插槽的情况下,Vpp = 12V。 在集成电路卡处于较低功率电平的操作期间,主电压源能够提供基本上所有所需的功率,使得开关调节器的开关可以保持主要地打开,从而最小化开关噪声。 在集成电路卡处于较高功率电平的工作期间,开关稳压器可以提高输出电压,足以补偿电压下降。 因此,集成电路卡被提供有稳定的低噪声电源。
    • 9. 发明授权
    • UART emulator card
    • UART仿真器卡
    • US5604870A
    • 1997-02-18
    • US283365
    • 1994-08-01
    • Barry MossDenis Beaudoin
    • Barry MossDenis Beaudoin
    • G06F13/10G06F13/00
    • G06F13/105
    • An interface device (102) and corresponding method for coupling a peripheral controller (117) to a host computer (100), the interface device including an emulated universal asynchronous receiver transmitter (UART) (113) for the host computer. The interface device further includes a plurality of registers (203), preferably a control (215), status (227), and data register, such as a multi-register data buffer (401), corresponding to the registers of a UART, a host computer port (112), preferably compatible with a PCMCIA standard, that includes an address map for the plurality of registers (203), a peripheral controller port (114) providing an address mapped parallel interface to the plurality of registers (203), and control logic (207) for providing status signals, including UART status signals, to the host computer port and to the peripheral controller port. The interface device may further include a pacing circuit (303) for substantially emulating, preferably dependent on a baud rate of the data information, the timing limitations of the UART.
    • 一种用于将外围控制器(117)耦合到主计算机(100)的接口设备(102)和相应的方法,所述接口设备包括用于所述主计算机的仿真通用异步接收机发射机(UART)(113)。 接口设备还包括多个寄存器(203),优选地是控制(215),状态(227)以及数据寄存器,诸如多寄存器数据缓冲器(401),对应于UART的寄存器, 主机计算机端口(112),优选地与PCMCIA标准兼容,其包括用于所述多个寄存器(203)的地址映射,提供与所述多个寄存器(203)的地址映射并行接口的外围控制器端口(114) 以及用于向主计算机端口和外围控制器端口提供包括UART状态信号的状态信号的控制逻辑(207)。 接口设备还可以包括起搏电路(303),用于基本仿真,优选地依赖于数据信息的波特率,UART的定时限制。