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1. 发明授权

US08134356B2 Operating an integrated circuit at a minimum supply voltage 有权
标题翻译：以最小电源电压操作集成电路
公开(公告)号：US08134356B2
公开(公告)日：2012-03-13
申请号：US13046103
申请日：2011-03-11
申请人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
发明人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
IPC分类号： G01R23/02
CPC分类号： G06F1/3203 , G01R31/2879 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： In one embodiment, an integrated circuit comprises at least one measurement unit configured to generate an output indicative of a supply voltage at which the integrated circuit is operable for a given operating frequency and a control unit coupled to receive the output. The control unit is configured to generate a voltage control output indicative of a requested supply voltage for the integrated circuit responsive to the output. The voltage control output may be output from the integrated circuit for use by circuitry external to the integrated circuit in generating the supply voltage for the integrated circuit.
摘要翻译：在一个实施例中，集成电路包括至少一个测量单元，其被配置为产生指示集成电路可用于给定工作频率的电源电压的输出，以及耦合以接收输出的控制单元。控制单元被配置为响应于输出而产生指示集成电路的所请求的电源电压的电压控制输出。电压控制输出可以从集成电路输出供集成电路外部的电路使用，以便为集成电路产生电源电压。

2. 发明申请

US20070257721A1 Resonance limiter circuits for an integrated circuit 有权
标题翻译：用于集成电路的共振限幅电路
公开(公告)号：US20070257721A1
公开(公告)日：2007-11-08
申请号：US11493104
申请日：2006-07-26
申请人： Vincent R. von Kaenel , Daniel W. Dobberpuhl
发明人： Vincent R. von Kaenel , Daniel W. Dobberpuhl
IPC分类号： H03K5/08
CPC分类号： H03K5/08 , H01L27/0266 , H03K19/00361
摘要： In one embodiment, an integrated circuit comprises resonance limiter circuits coupled to a power supply connection of the integrated circuit. The resonance limiter circuits are configured to detect oscillation on the power supply connection at a resonant frequency, and to dampen the resonant frequency oscillation responsive to detecting the oscillation. In some embodiments, the resonance limiter circuits may damp oscillation at or above the resonant frequency or approximately the resonant frequency (e.g. somewhat below the resonance frequency). The resonant frequency depends on a package of the integrated circuit. In an embodiment, a resonance limiter circuit comprises a filter and a transistor coupled in parallel with the filter between a power supply connection and a ground connection. The filter is tuned to approximately a resonant frequency (e.g. the lowest resonant frequency) that depends on a package corresponding to an integrated circuit into which the resonance limiter circuit is fabricated.
摘要翻译：在一个实施例中，集成电路包括耦合到集成电路的电源连接的谐振限制器电路。谐振限制器电路被配置为以谐振频率检测电源连接上的振荡，并且响应于检测到振荡而衰减谐振频率振荡。在一些实施例中，谐振限制器电路可以抑制或高于谐振频率或近似谐振频率（例如稍微低于谐振频率）的振荡。谐振频率取决于集成电路的封装。在一个实施例中，谐振限制器电路包括滤波器和在电源连接和接地连接之间与滤波器并联耦合的晶体管。将滤波器调谐到大致一个谐振频率（例如，最低谐振频率），该谐振频率取决于与制造谐振限制器电路的集成电路相对应的封装。

3. 发明授权

US06535036B1 Conditional clock buffer circuit 有权
公开(公告)号：US06535036B1
公开(公告)日：2003-03-18
申请号：US10136109
申请日：2002-05-01
申请人： Daniel W. Dobberpuhl
发明人： Daniel W. Dobberpuhl
IPC分类号： H03K300
CPC分类号： H03K19/0016 , G06F1/10
摘要： A conditional clock buffer circuit is disclosed. In one embodiment, a conditional clock buffer circuit includes a precharge circuit, a first transistor and a second transistor coupled to the precharge circuit via the first node and the second node, a third transistor coupled to the first transistor and the second transistor. The first transistor may be activated responsive to a condition external to the clock buffer circuit. When the first transistor is activated, an output clock signal driven by the clock buffer circuit may be inhibited.

4. 发明授权

US5172016A Five-volt tolerant differential receiver 失效
标题翻译：五伏容差差分接收机
公开(公告)号：US5172016A
公开(公告)日：1992-12-15
申请号：US724407
申请日：1991-06-28
申请人： Daniel W. Dobberpuhl
发明人： Daniel W. Dobberpuhl
IPC分类号： H03F3/45 , H03K5/24 , H03K19/0185 , H03K19/086
CPC分类号： H03K5/2481 , H03K19/018528
摘要： A differential, CMOS receiver includes a transistor, coupled in parallel with an input transistor, which limits voltage differentials across an input transistor. A corresponding, similarly sized transistor balances current loading in a differential transistor. The transistor in parallel with the input transistor, whose drain is coupled directly to the power supply, quickly pulls the input transistor source and drain up to power supply voltage on an input transient from logical zero to a logical one which exceeds the power supply voltage. Another transistor coupled between the output node and the power supply rail defeats differential amplifier action when the input voltage is high out of its normal range.
摘要翻译：差分CMOS接收器包括与输入晶体管并联耦合的晶体管，其限制跨输入晶体管的电压差。相应尺寸相同的晶体管平衡差分晶体管中的电流负载。与输入晶体管并联的晶体管，其漏极直接耦合到电源，在从逻辑0到超过电源电压的逻辑输入瞬态的输入瞬态时，快速地将输入晶体管源和漏极电压提升到电源电压。当输入电压高于其正常范围时，耦合在输出节点和电源轨之间的另一个晶体管使差动放大器动作失败。

5. 发明申请

US20110156693A1 Operating an Integrated Circuit at a Minimum Supply Voltage 有权
标题翻译：以最小电源电压操作集成电路
公开(公告)号：US20110156693A1
公开(公告)日：2011-06-30
申请号：US13046103
申请日：2011-03-11
申请人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
发明人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
IPC分类号： G01R23/02
CPC分类号： G06F1/3203 , G01R31/2879 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： In one embodiment, an integrated circuit comprises at least one measurement unit configured to generate an output indicative of a supply voltage at which the integrated circuit is operable for a given operating frequency and a control unit coupled to receive the output. The control unit is configured to generate a voltage control output indicative of a requested supply voltage for the integrated circuit responsive to the output. The voltage control output may be output from the integrated circuit for use by circuitry external to the integrated circuit in generating the supply voltage for the integrated circuit.
摘要翻译：在一个实施例中，集成电路包括至少一个测量单元，其被配置为产生指示集成电路可用于给定工作频率的电源电压的输出，以及耦合以接收输出的控制单元。控制单元被配置为响应于输出而产生指示集成电路的所请求的电源电压的电压控制输出。电压控制输出可以从集成电路输出供集成电路外部的电路使用，以便为集成电路产生电源电压。

6. 发明申请

US20100085031A1 Operating an Integrated Circuit at a Minimum Supply Voltage 有权
标题翻译：以最小电源电压操作集成电路
公开(公告)号：US20100085031A1
公开(公告)日：2010-04-08
申请号：US12634373
申请日：2009-12-09
申请人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
发明人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
IPC分类号： H02J4/00 , G01R19/00 , H03L7/06
CPC分类号： G06F1/3203 , G01R31/2879 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： In one embodiment, an integrated circuit comprises at least one measurement unit configured to generate an output indicative of a supply voltage at which the integrated circuit is operable for a given operating frequency and a control unit coupled to receive the output. The control unit is configured to generate a voltage control output indicative of a requested supply voltage for the integrated circuit responsive to the output. The voltage control output may be output from the integrated circuit for use by circuitry external to the integrated circuit in generating the supply voltage for the integrated circuit.
摘要翻译：在一个实施例中，集成电路包括至少一个测量单元，其被配置为产生指示集成电路可用于给定工作频率的电源电压的输出，以及耦合以接收输出的控制单元。控制单元被配置为响应于输出而产生指示集成电路的所请求的电源电压的电压控制输出。电压控制输出可以从集成电路输出供集成电路外部的电路使用，以便为集成电路产生电源电压。

7. 发明授权

US07652494B2 Operating an integrated circuit at a minimum supply voltage 有权
标题翻译：以最小电源电压操作集成电路
公开(公告)号：US07652494B2
公开(公告)日：2010-01-26
申请号：US11753853
申请日：2007-05-25
申请人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
发明人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
IPC分类号： G01R31/02
CPC分类号： G06F1/3203 , G01R31/2879 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： In one embodiment, an integrated circuit comprises at least one measurement unit configured to generate an output indicative of a supply voltage at which the integrated circuit is operable for a given operating frequency and a control unit coupled to receive the output. The control unit is configured to generate a voltage control output indicative of a requested supply voltage for the integrated circuit responsive to the output. The voltage control output may be output from the integrated circuit for use by circuitry external to the integrated circuit in generating the supply voltage for the integrated circuit.
摘要翻译：在一个实施例中，集成电路包括至少一个测量单元，其被配置为产生指示集成电路可用于给定工作频率的电源电压的输出，以及耦合以接收输出的控制单元。控制单元被配置为响应于输出而产生指示集成电路的所请求的电源电压的电压控制输出。电压控制输出可以从集成电路输出供集成电路外部的电路使用，以产生用于集成电路的电源电压。

8. 发明授权

US07320022B2 System on a chip for caching of data packets based on a cache miss/hit and a state of a control signal 有权
标题翻译：基于高速缓存未命中/缓存和控制信号的状态来缓存数据分组的芯片上的系统
公开(公告)号：US07320022B2
公开(公告)日：2008-01-15
申请号：US10202753
申请日：2002-07-25
申请人： Mark D. Hayter , Shailendra S. Desai , Daniel W. Dobberpuhl , Kwong-Tak A. Chui
发明人： Mark D. Hayter , Shailendra S. Desai , Daniel W. Dobberpuhl , Kwong-Tak A. Chui
IPC分类号： G06F13/00
CPC分类号： H04L47/30 , G06F13/128 , H04L45/00 , H04L45/60 , H04L47/29 , H04L49/103 , H04L49/254 , H04L49/3018 , H04L49/3027 , H04L49/351 , H04L49/90 , H04L49/901 , H04L49/9042
摘要： A packet processing system may include a processor, a cache, a memory controller, and at least one packet interface circuit integrated into a single integrated circuit. In one embodiment (which may be used in integrated or non-integrated systems), the packet interface circuit is configured to cause allocation in the cache of a portion of a received packet. In one embodiment (which may be used in integrated or non-integrated systems), the memory controller may be configured to selectively block memory transactions. Particularly, the memory controller may implement at least two block signals, one for the packet interface circuit and one for other devices. The block signals may be used to control the initiation of memory transactions when the memory controller's input queue is approaching fullness.
摘要翻译：分组处理系统可以包括集成到单个集成电路中的处理器，高速缓存，存储器控制器和至少一个分组接口电路。在一个实施例中（其可以在集成或非集成系统中使用），分组接口电路被配置为在接收到的分组的一部分的高速缓存中引起分配。在一个实施例中（其可以在集成或非集成系统中使用），存储器控制器可以被配置为选择性地阻止存储器事务。特别地，存储器控制器可以实现至少两个块信号，一个用于分组接口电路，一个用于其他设备。当存储器控制器的输入队列逼近时，块信号可用于控制存储器事务的启动。

9. 发明授权

US06430099B1 Method and apparatus to conditionally precharge a partitioned read-only memory with shared wordlines for low power operation 有权
标题翻译：方法和装置，用于有条件地对具有用于低功率操作的共享字线预分区的只读存储器
公开(公告)号：US06430099B1
公开(公告)日：2002-08-06
申请号：US09854365
申请日：2001-05-11
申请人： Robert Rogenmoser , Steve T. Nishimoto , Daniel W. Dobberpuhl
发明人： Robert Rogenmoser , Steve T. Nishimoto , Daniel W. Dobberpuhl
IPC分类号： G11C700
CPC分类号： G11C17/18 , G11C7/12 , G11C17/12
摘要： A ROM or other memory may include two or more partitions and a precharge circuit. Each of the partitions may be coupled to separate sets of output conductors, to which the precharge circuit may be coupled. The precharge circuit may precharge the conductors of the partition to be read, while not precharging the other conductors. In one embodiment, the precharge may be to a voltage representing a binary value. In one implementation, the non-precharged conductors may be held to a predetermined voltage different from the voltage to which the precharged conductors are precharged. The predetermined voltage may represent the opposite binary value to the binary value represented by the precharge voltage. The ROM may also include an output circuit which may, in certain embodiments, comprise a logic circuit which logically combines the signals on respective conductors from each partition to provide output signals from the ROM.
摘要翻译： ROM或其他存储器可以包括两个或更多个分区和预充电电路。每个分区可以耦合到单独的输出导体组，预充电电路可以耦合到该组输出导体。预充电电路可以对未读取的分区的导体进行预充电，而不对其它导体进行预充电。在一个实施例中，预充电可以是表示二进制值的电压。在一个实施方式中，非预充电导体可以被保持到与预充电导体预充电的电压不同的预定电压。预定电压可以表示与由预充电电压表示的二进制值相反的二进制值。 ROM还可以包括输出电路，其在某些实施例中可以包括逻辑电路，其逻辑地组合来自每个分区的相应导体上的信号以提供来自ROM的输出信号。

10. 发明授权

US07928747B2 Operating an integrated circuit at a minimum supply voltage 有权
标题翻译：以最小电源电压操作集成电路
公开(公告)号：US07928747B2
公开(公告)日：2011-04-19
申请号：US12634373
申请日：2009-12-09
申请人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
发明人： Daniel W. Dobberpuhl , Vincent R. von Kaenel
IPC分类号： G01R31/3187
CPC分类号： G06F1/3203 , G01R31/2879 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： In one embodiment, an integrated circuit comprises at least one measurement unit configured to generate an output indicative of a supply voltage at which the integrated circuit is operable for a given operating frequency and a control unit coupled to receive the output. The control unit is configured to generate a voltage control output indicative of a requested supply voltage for the integrated circuit responsive to the output. The voltage control output may be output from the integrated circuit for use by circuitry external to the integrated circuit in generating the supply voltage for the integrated circuit.
摘要翻译：在一个实施例中，集成电路包括至少一个测量单元，其被配置为产生指示集成电路可用于给定工作频率的电源电压的输出，以及耦合以接收输出的控制单元。控制单元被配置为响应于输出而产生指示集成电路的所请求的电源电压的电压控制输出。电压控制输出可以从集成电路输出供集成电路外部的电路使用，以便为集成电路产生电源电压。

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