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1. 发明授权

US07808309B2 Current source circuit 有权
标题翻译：电流源电路
公开(公告)号：US07808309B2
公开(公告)日：2010-10-05
申请号：US12022979
申请日：2008-01-30
申请人： Ming-Dou Ker , Jung-Sheng Chen , Chun-Yuan Hsu
发明人： Ming-Dou Ker , Jung-Sheng Chen , Chun-Yuan Hsu
IPC分类号： G05F1/10 , G05F3/02
CPC分类号： G05F3/242
摘要： A current source circuit is provided. The circuit includes a first transistor and at least one second transistor. A first source/drain terminal of the first transistor is coupled to a bias voltage. A second source/drain terminal of the first transistor is used to receive a current signal, and the second source/drain terminal of the first transistor is coupled to a gate terminal of the first transistor. A first source/drain terminal of the second transistor is grounded. A second source/drain terminal of the second transistor is coupled to a voltage source and outputs a bias current. A gate terminal of the second transistor is coupled to the gate terminal of the first transistor.
摘要翻译：提供电流源电路。该电路包括第一晶体管和至少一个第二晶体管。第一晶体管的第一源极/漏极端子耦合到偏置电压。第一晶体管的第二源极/漏极端子用于接收电流信号，并且第一晶体管的第二源极/漏极端子耦合到第一晶体管的栅极端子。第二晶体管的第一源极/漏极端子接地。第二晶体管的第二源极/漏极端子耦合到电压源并输出偏置电流。第二晶体管的栅极端子耦合到第一晶体管的栅极端子。

2. 发明申请

US20080297238A1 CURRENT SOURCE CIRCUIT 有权
标题翻译：电流源电路
公开(公告)号：US20080297238A1
公开(公告)日：2008-12-04
申请号：US12022979
申请日：2008-01-30
申请人： Ming-Dou Ker , Jung-Sheng Chen , Chun-Yuan Hsu
发明人： Ming-Dou Ker , Jung-Sheng Chen , Chun-Yuan Hsu
IPC分类号： G05F1/10
CPC分类号： G05F3/242
摘要： A current source circuit is provided. The circuit includes a first transistor and at least one second transistor. A first source/drain terminal of the first transistor is coupled to a bias voltage. A second source/drain terminal of the first transistor is used to receive a current signal, and the second source/drain terminal of the first transistor is coupled to a gate terminal of the first transistor. A first source/drain terminal of the second transistor is grounded. A second source/drain terminal of the second transistor is coupled to a voltage source and outputs a bias current. A gate terminal of the second transistor is coupled to the gate terminal of the first transistor.
摘要翻译：提供电流源电路。该电路包括第一晶体管和至少一个第二晶体管。第一晶体管的第一源极/漏极端子耦合到偏置电压。第一晶体管的第二源极/漏极端子用于接收电流信号，并且第一晶体管的第二源极/漏极端子耦合到第一晶体管的栅极端子。第二晶体管的第一源极/漏极端子接地。第二晶体管的第二源极/漏极端子耦合到电压源并输出偏置电流。第二晶体管的栅极端子耦合到第一晶体管的栅极端子。

3. 发明授权

US07447292B2 Shift register and driving circuit and display device using the same 有权
标题翻译：移位寄存器和驱动电路以及使用其的显示装置
公开(公告)号：US07447292B2
公开(公告)日：2008-11-04
申请号：US11772833
申请日：2007-07-03
申请人： Chun-Yuan Hsu , Jan-Ruei Lin , Hsiang-Yun Wei , Che-Cheng Kuo , Chun-Yao Huang
发明人： Chun-Yuan Hsu , Jan-Ruei Lin , Hsiang-Yun Wei , Che-Cheng Kuo , Chun-Yao Huang
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A shift register, a driving circuit and a display device using the same are disclosed. The shift register includes a 1st and a 2nd rectifying elements and 1st˜4th transistors. 1st source/drains of the 1st˜3rd transistors receive a common voltage respectively. The gates of the 1st and 3rd transistors and a 2nd source/drain of the 2nd transistor are coupled to a 2nd terminal of the 2nd rectifying element. The gates of the 2nd and 4th transistors and a 2nd source/drain of the 1st transistor are coupled to a 2nd terminal of the 1st rectifying element. A 1st source/drain of the 4th transistor is coupled to a 2nd source/drain of the 3rd transistor. The 1st terminals of the 1st and 2nd rectifying elements respectively receive input signals and a 1st clock signal. A 2nd source/drain of the 4th transistor receives a 2nd clock signal.
摘要翻译：公开了一种移位寄存器，驱动电路和使用该移位寄存器的显示装置。移位寄存器包括一个第一和第二个整流元件和一个第一至第四个第三晶体管。 1 〜3 晶体管的1 / SUP源极/漏极分别接收公共电压。第一晶体管和第三晶体管的栅极和第二晶体管的第二和/或第二源极/漏极耦合到第2和/或（SUP）整流元件的第2端子。第二晶体管的第二和第四和第四晶体管的栅极和第一晶体管的第二和/或第二源极/漏极耦合到第1级校正元件的2端子端子。第四晶体管的源极/漏极的第一个源极/漏极耦合到第三晶体管的第二源极/漏极， SUP>晶体管。第一和第二和/或第二整流元件的第一端子分别接收输入信号和第一时钟信号。第4 晶体管的源极/漏极的第2个源极/漏极接收第2个时钟信号。

4. 发明授权

US08698217B2 Metal shield structures in backside illumination image sensor chips 有权
标题翻译：背面照明图像传感器芯片中的金属屏蔽结构
公开(公告)号：US08698217B2
公开(公告)日：2014-04-15
申请号：US13428904
申请日：2012-03-23
申请人： Chun-Yuan Hsu , Kun-Ei Chen , Huai-Tei Yang , Chien-Chung Chen
发明人： Chun-Yuan Hsu , Kun-Ei Chen , Huai-Tei Yang , Chien-Chung Chen
IPC分类号： H01L31/062
CPC分类号： H01L27/14683 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14636 , H01L27/1464
摘要： A device includes a semiconductor substrate having a front side and a backside. An active image sensor pixel array is disposed on the front side of the semiconductor substrate. A metal shield is disposed on the backside of, and overlying, the semiconductor substrate. The metal shield has an edge facing the active image sensor pixel array. The metal shield has a middle width, and a top width greater than the middle width.
摘要翻译：一种器件包括具有正面和背面的半导体衬底。有源图像传感器像素阵列设置在半导体衬底的正面上。金属屏蔽设置在半导体衬底的背面并覆盖其上。金属屏蔽具有面向主动图像传感器像素阵列的边缘。金属屏蔽具有中间宽度，并且顶部宽度大于中间宽度。

5. 发明授权

US08269712B2 High-reliability gate driving circuit 有权
标题翻译：高可靠性门驱动电路
公开(公告)号：US08269712B2
公开(公告)日：2012-09-18
申请号：US12465630
申请日：2009-05-13
申请人： Chih-Jen Shih , Chun-Kuo Yu , Chun-Yuan Hsu
发明人： Chih-Jen Shih , Chun-Kuo Yu , Chun-Yuan Hsu
IPC分类号： G09G3/36 , H03K19/096
CPC分类号： G11C19/28 , G09G3/3677
摘要： A high-reliability gate driving circuit is disclosed for providing a plurality of gate signals to plural gate lines respectively. The gate driving circuit includes a plurality of shift register stages. Each shift register stage includes a pull-up unit, an energy-store unit, a buffer unit, a discharging unit, a first pull-down unit, a second pull-down unit and a control unit. The pull-up unit pulls up a gate signal according to a driving control voltage and a first clock. The buffer unit receives an input signal. The energy-store unit provides the driving control voltage through performing a charging process based on the input signal. The first pull-down unit pulls down the gate signal according to a control signal. The second pull-down unit pulls down the gate signal according to a second clock having a phase opposite to the first clock. The control unit generates the control signal based on the gate signal.
摘要翻译：公开了一种高可靠性栅极驱动电路，用于分别向多个栅极线提供多个栅极信号。栅极驱动电路包括多个移位寄存器级。每个移位寄存器级包括上拉单元，能量存储单元，缓冲单元，放电单元，第一下拉单元，第二下拉单元和控制单元。上拉单元根据驱动控制电压和第一个时钟上拉一个门信号。缓冲单元接收输入信号。能量存储单元通过基于输入信号进行充电处理来提供驱动控制电压。第一个下拉单元根据控制信号拉下门信号。第二下拉单元根据具有与第一时钟相反的相位的第二时钟来拉低门信号。控制单元根据门信号产生控制信号。

6. 发明申请

US20100177068A1 HIGH-RELIABILITY GATE DRIVING CIRCUIT 有权
标题翻译：高可靠性门驱动电路
公开(公告)号：US20100177068A1
公开(公告)日：2010-07-15
申请号：US12465630
申请日：2009-05-13
申请人： Chih-Jen Shih , Chun-Kuo Yu , Chun-Yuan Hsu
发明人： Chih-Jen Shih , Chun-Kuo Yu , Chun-Yuan Hsu
IPC分类号： G06F3/038 , G09G3/36
CPC分类号： G11C19/28 , G09G3/3677
摘要： A high-reliability gate driving circuit is disclosed for providing a plurality of gate signals to plural gate lines respectively. The gate driving circuit includes a plurality of shift register stages. Each shift register stage includes a pull-up unit, an energy-store unit, a buffer unit, a discharging unit, a first pull-down unit, a second pull-down unit and a control unit. The pull-up unit pulls up a gate signal according to a driving control voltage and a first clock. The buffer unit receives an input signal. The energy-store unit provides the driving control voltage through performing a charging process based on the input signal. The first pull-down unit pulls down the gate signal according to a control signal. The second pull-down unit pulls down the gate signal according to a second clock having a phase opposite to the first clock. The control unit generates the control signal based on the gate signal.
摘要翻译：公开了一种高可靠性栅极驱动电路，用于分别向多个栅极线提供多个栅极信号。栅极驱动电路包括多个移位寄存器级。每个移位寄存器级包括上拉单元，能量存储单元，缓冲单元，放电单元，第一下拉单元，第二下拉单元和控制单元。上拉单元根据驱动控制电压和第一个时钟上拉一个门信号。缓冲单元接收输入信号。能量存储单元通过基于输入信号进行充电处理来提供驱动控制电压。第一个下拉单元根据控制信号拉下门信号。第二下拉单元根据具有与第一时钟相反的相位的第二时钟来拉低门信号。控制单元根据门信号产生控制信号。

7. 发明申请

US20080130822A1 SHIFT REGISTER AND DRIVING CIRCUIT AND DISPLAY DEVICE USING THE SAME 有权
标题翻译：移位寄存器和驱动电路以及使用它的显示器件
公开(公告)号：US20080130822A1
公开(公告)日：2008-06-05
申请号：US11772833
申请日：2007-07-03
申请人： Chun-Yuan Hsu , Jan-Ruei Lin , Hsiang-Yun Wei , Che-Cheng Kuo , Chun-Yao Huang
发明人： Chun-Yuan Hsu , Jan-Ruei Lin , Hsiang-Yun Wei , Che-Cheng Kuo , Chun-Yao Huang
IPC分类号： G11C19/28
CPC分类号： G11C19/28
摘要： A shift register, a driving circuit and a display device using the same are disclosed. The shift register includes a 1st and a 2nd rectifying elements and 1st˜4th transistors. 1st source/drains of the 1st˜3rd transistors receive a common voltage respectively. The gates of the 1st and 3rd transistors and a 2nd source/drain of the 2nd transistor are coupled to a 2nd terminal of the 2nd rectifying element. The gates of the 2nd and 4th transistors and a 2nd source/drain of the 1st transistor are coupled to a 2nd terminal of the 1st rectifying element. A 1st source/drain of the 4th transistor is coupled to a 2nd source/drain of the 3rd transistor. The 1st terminals of the 1st and 2nd rectifying elements respectively receive input signals and a 1st clock signal. A 2nd source/drain of the 4th transistor receives a 2nd clock signal.
摘要翻译：公开了一种移位寄存器，驱动电路和使用该移位寄存器的显示装置。移位寄存器包括一个第一和第二个整流元件和一个第一至第四个第三晶体管。 1 〜3 晶体管的1 / SUP源极/漏极分别接收公共电压。第一晶体管和第三晶体管的栅极和第二晶体管的第二和/或第二源极/漏极耦合到第2和/或（SUP）整流元件的第2端子。第二晶体管的第二和第四和第四晶体管的栅极和第一晶体管的第二和/或第二源极/漏极耦合到第1级校正元件的2端子端子。第四晶体管的源极/漏极的第一个源极/漏极耦合到第三晶体管的第二源极/漏极， SUP>晶体管。第一和第二和/或第二整流元件的第一端子分别接收输入信号和第一时钟信号。第4个晶体管的源极/漏极的第2个/第2个源极/漏极接收第二个时钟信号。

8. 发明申请

US20130249039A1 Metal Shield Structures in Backside Illumination Image Sensor Chips and Methods for Forming the Same 有权
标题翻译：金属屏蔽结构在背面照明图像传感器芯片及其形成方法
公开(公告)号：US20130249039A1
公开(公告)日：2013-09-26
申请号：US13428904
申请日：2012-03-23
申请人： Chun-Yuan Hsu , Kun-Ei Chen , Huai-Tei Yang , Chien-Chung Chen
发明人： Chun-Yuan Hsu , Kun-Ei Chen , Huai-Tei Yang , Chien-Chung Chen
IPC分类号： H01L27/146 , H01L31/18
CPC分类号： H01L27/14683 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14636 , H01L27/1464
摘要： A device includes a semiconductor substrate having a front side and a backside. An active image sensor pixel array is disposed on the front side of the semiconductor substrate. A metal shield is disposed on the backside of, and overlying, the semiconductor substrate. The metal shield has an edge facing the active image sensor pixel array. The metal shield has a middle width, and a top width greater than the middle width.
摘要翻译：一种器件包括具有正面和背面的半导体衬底。有源图像传感器像素阵列设置在半导体衬底的正面上。金属屏蔽设置在半导体衬底的背面并覆盖其上。金属屏蔽具有面向主动图像传感器像素阵列的边缘。金属屏蔽具有中间宽度，并且顶部宽度大于中间宽度。

9. 发明授权

US08233583B2 Shift register and display driver thereof 有权
标题翻译：移位寄存器及其显示驱动器
公开(公告)号：US08233583B2
公开(公告)日：2012-07-31
申请号：US12264244
申请日：2008-11-03
申请人： Cheng-Hung Tsai , Yi-Feng Liao , Chun-Yuan Hsu
发明人： Cheng-Hung Tsai , Yi-Feng Liao , Chun-Yuan Hsu
IPC分类号： G11C19/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G11C19/28
摘要： A shift register and a display driver thereof are provided. The display driver submitted by the present invention can be directly disposed on a glass substrate of a liquid crystal display (LCD) panel to replace a scan driver commonly used in prior art, so that the cost of the liquid crystal display can be reduced. In addition, the stress taken by the output stage transistor of each shift register stage within the display driver submitted by the present invention can be reduced. Thus, each shift register stage has the highest reliability, and may consequently avoid the erroneous actions when each shift register stage is operated for a long time.
摘要翻译：提供了移位寄存器及其显示驱动器。通过本发明提供的显示驱动器可以直接设置在液晶显示器（LCD）面板的玻璃基板上，以代替现有技术中常用的扫描驱动器，从而可以降低液晶显示器的成本。此外，可以减少由本发明提交的显示驱动器内的每个移位寄存器级的输出级晶体管所采取的应力。因此，每个移位寄存器级具有最高的可靠性，并且因此可以避免每个移位寄存器级被长时间操作时的错误动作。

10. 发明授权

US07764761B2 Shift register apparatus and method thereof 有权
标题翻译：移位寄存器及其方法
公开(公告)号：US07764761B2
公开(公告)日：2010-07-27
申请号：US12187384
申请日：2008-08-07
申请人： Chih-Jen Shih , Chun-Yuan Hsu , Che-Cheng Kuo , Chun-Kuo Yu
发明人： Chih-Jen Shih , Chun-Yuan Hsu , Che-Cheng Kuo , Chun-Kuo Yu
IPC分类号： G11C19/00
CPC分类号： H03K19/00315 , G09G3/3677 , G09G2310/0286 , G11C19/28
摘要： A shift register apparatus and a method thereof are provided. The technique manner submitted by the present invention utilizes two NMOS transistors for pulling down the voltage level of the scan signals output by the shift registers within the shift register apparatus to the low level gate voltage, wherein one of the NMOS transistors is controlled by a control unit, and the other NMOS transistor is controlled by a clock signal or the inverted clock signal provided to the shift registers. Therefore, shifting amount of the threshold voltage of those NMOS transistors can trend to be flat, and the reliability of those NMOS transistors can be promoted. In addition, since only one control unit is needed to dispose in each shift register so that the layout area of whole shift register apparatus can be reduced, and the panel with narrow frame size also can be achieved by the present invention.
摘要翻译：提供一种移位寄存装置及其方法。本发明提供的技术方法利用两个NMOS晶体管来将由移位寄存器装置内的移位寄存器输出的扫描信号的电压电平降低到低电平门电压，其中一个NMOS晶体管由一个控制单元，另一个NMOS晶体管由提供给移位寄存器的时钟信号或反相时钟信号控制。因此，那些NMOS晶体管的阈值电压的移动量趋向于平坦，并且可以促进那些NMOS晶体管的可靠性。此外，由于只需要一个控制单元来配置在每个移位寄存器中，从而可以减少整个移位寄存器装置的布局区域，并且通过本发明也可以实现具有窄帧大小的面板。

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