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1. 发明授权

US08269712B2 High-reliability gate driving circuit 有权
标题翻译：高可靠性门驱动电路
公开(公告)号：US08269712B2
公开(公告)日：2012-09-18
申请号：US12465630
申请日：2009-05-13
申请人： Chih-Jen Shih , Chun-Kuo Yu , Chun-Yuan Hsu
发明人： Chih-Jen Shih , Chun-Kuo Yu , Chun-Yuan Hsu
IPC分类号： G09G3/36 , H03K19/096
CPC分类号： G11C19/28 , G09G3/3677
摘要： A high-reliability gate driving circuit is disclosed for providing a plurality of gate signals to plural gate lines respectively. The gate driving circuit includes a plurality of shift register stages. Each shift register stage includes a pull-up unit, an energy-store unit, a buffer unit, a discharging unit, a first pull-down unit, a second pull-down unit and a control unit. The pull-up unit pulls up a gate signal according to a driving control voltage and a first clock. The buffer unit receives an input signal. The energy-store unit provides the driving control voltage through performing a charging process based on the input signal. The first pull-down unit pulls down the gate signal according to a control signal. The second pull-down unit pulls down the gate signal according to a second clock having a phase opposite to the first clock. The control unit generates the control signal based on the gate signal.
摘要翻译：公开了一种高可靠性栅极驱动电路，用于分别向多个栅极线提供多个栅极信号。栅极驱动电路包括多个移位寄存器级。每个移位寄存器级包括上拉单元，能量存储单元，缓冲单元，放电单元，第一下拉单元，第二下拉单元和控制单元。上拉单元根据驱动控制电压和第一个时钟上拉一个门信号。缓冲单元接收输入信号。能量存储单元通过基于输入信号进行充电处理来提供驱动控制电压。第一个下拉单元根据控制信号拉下门信号。第二下拉单元根据具有与第一时钟相反的相位的第二时钟来拉低门信号。控制单元根据门信号产生控制信号。

2. 发明申请

US20100177068A1 HIGH-RELIABILITY GATE DRIVING CIRCUIT 有权
标题翻译：高可靠性门驱动电路
公开(公告)号：US20100177068A1
公开(公告)日：2010-07-15
申请号：US12465630
申请日：2009-05-13
申请人： Chih-Jen Shih , Chun-Kuo Yu , Chun-Yuan Hsu
发明人： Chih-Jen Shih , Chun-Kuo Yu , Chun-Yuan Hsu
IPC分类号： G06F3/038 , G09G3/36
CPC分类号： G11C19/28 , G09G3/3677
摘要： A high-reliability gate driving circuit is disclosed for providing a plurality of gate signals to plural gate lines respectively. The gate driving circuit includes a plurality of shift register stages. Each shift register stage includes a pull-up unit, an energy-store unit, a buffer unit, a discharging unit, a first pull-down unit, a second pull-down unit and a control unit. The pull-up unit pulls up a gate signal according to a driving control voltage and a first clock. The buffer unit receives an input signal. The energy-store unit provides the driving control voltage through performing a charging process based on the input signal. The first pull-down unit pulls down the gate signal according to a control signal. The second pull-down unit pulls down the gate signal according to a second clock having a phase opposite to the first clock. The control unit generates the control signal based on the gate signal.
摘要翻译：公开了一种高可靠性栅极驱动电路，用于分别向多个栅极线提供多个栅极信号。栅极驱动电路包括多个移位寄存器级。每个移位寄存器级包括上拉单元，能量存储单元，缓冲单元，放电单元，第一下拉单元，第二下拉单元和控制单元。上拉单元根据驱动控制电压和第一个时钟上拉一个门信号。缓冲单元接收输入信号。能量存储单元通过基于输入信号进行充电处理来提供驱动控制电压。第一个下拉单元根据控制信号拉下门信号。第二下拉单元根据具有与第一时钟相反的相位的第二时钟来拉低门信号。控制单元根据门信号产生控制信号。

3. 发明授权

US08072414B2 Display method on active matrix display 有权
标题翻译：有源矩阵显示的显示方式
公开(公告)号：US08072414B2
公开(公告)日：2011-12-06
申请号：US12505536
申请日：2009-07-20
申请人： Chun-Kuo Yu , Chien-Ping Ku , Chih-Fan Su
发明人： Chun-Kuo Yu , Chien-Ping Ku , Chih-Fan Su
IPC分类号： G09G3/36
CPC分类号： G09G3/20 , G09G2310/0221 , G09G2310/0251 , G09G2310/062 , G09G2320/0261 , G09G2360/18
摘要： The present invention provides a display method of an active matrix display. First, image data is provided, and the image data is divided into a first image section and a second image section. Next, a first black frame section and a second black frame section are respectively inserted into the first image section and the second image section to form a first frame and a second frame. Then, the first frame and the second frame are displayed in turn so as to display the image data.
摘要翻译：本发明提供一种有源矩阵显示器的显示方法。首先，提供图像数据，将图像数据分割为第一图像部分和第二图像部分。接下来，将第一黑框部分和第二黑框部分分别插入到第一图像部分和第二图像部分中以形成第一帧和第二帧。然后依次显示第一帧和第二帧，以显示图像数据。

4. 发明申请

US20100231496A1 DISPLAY METHOD ON ACTIVE MATRIX DISPLAY 有权
标题翻译：主动矩阵显示的显示方法
公开(公告)号：US20100231496A1
公开(公告)日：2010-09-16
申请号：US12505536
申请日：2009-07-20
申请人： Chun-Kuo Yu , Chien-Ping Ku , Chih-Fan Su
发明人： Chun-Kuo Yu , Chien-Ping Ku , Chih-Fan Su
IPC分类号： G09G3/36
CPC分类号： G09G3/20 , G09G2310/0221 , G09G2310/0251 , G09G2310/062 , G09G2320/0261 , G09G2360/18
摘要： The present invention provides a display method of an active matrix display. First, image data is provided, and the image data is divided into a first image section and a second image section. Next, a first black frame section and a second black frame section are respectively inserted into the first image section and the second image section to form a first frame and a second frame. Then, the first frame and the second frame are displayed in turn so as to display the image data.
摘要翻译：本发明提供一种有源矩阵显示器的显示方法。首先，提供图像数据，将图像数据分割为第一图像部分和第二图像部分。接下来，将第一黑框部分和第二黑框部分分别插入到第一图像部分和第二图像部分中以形成第一帧和第二帧。然后依次显示第一帧和第二帧，以显示图像数据。

5. 发明授权

US07764761B2 Shift register apparatus and method thereof 有权
标题翻译：移位寄存器及其方法
公开(公告)号：US07764761B2
公开(公告)日：2010-07-27
申请号：US12187384
申请日：2008-08-07
申请人： Chih-Jen Shih , Chun-Yuan Hsu , Che-Cheng Kuo , Chun-Kuo Yu
发明人： Chih-Jen Shih , Chun-Yuan Hsu , Che-Cheng Kuo , Chun-Kuo Yu
IPC分类号： G11C19/00
CPC分类号： H03K19/00315 , G09G3/3677 , G09G2310/0286 , G11C19/28
摘要： A shift register apparatus and a method thereof are provided. The technique manner submitted by the present invention utilizes two NMOS transistors for pulling down the voltage level of the scan signals output by the shift registers within the shift register apparatus to the low level gate voltage, wherein one of the NMOS transistors is controlled by a control unit, and the other NMOS transistor is controlled by a clock signal or the inverted clock signal provided to the shift registers. Therefore, shifting amount of the threshold voltage of those NMOS transistors can trend to be flat, and the reliability of those NMOS transistors can be promoted. In addition, since only one control unit is needed to dispose in each shift register so that the layout area of whole shift register apparatus can be reduced, and the panel with narrow frame size also can be achieved by the present invention.
摘要翻译：提供一种移位寄存装置及其方法。本发明提供的技术方法利用两个NMOS晶体管来将由移位寄存器装置内的移位寄存器输出的扫描信号的电压电平降低到低电平门电压，其中一个NMOS晶体管由一个控制单元，另一个NMOS晶体管由提供给移位寄存器的时钟信号或反相时钟信号控制。因此，那些NMOS晶体管的阈值电压的移动量趋向于平坦，并且可以促进那些NMOS晶体管的可靠性。此外，由于只需要一个控制单元来配置在每个移位寄存器中，从而可以减少整个移位寄存器装置的布局区域，并且通过本发明也可以实现具有窄帧大小的面板。

6. 发明申请

US20100002827A1 SHIFT REGISTER APPARATUS AND METHOD THEREOF 有权
标题翻译：移位寄存器及其方法
公开(公告)号：US20100002827A1
公开(公告)日：2010-01-07
申请号：US12187384
申请日：2008-08-07
申请人： Chih-Jen Shih , Chun-Yuan Hsu , Che-Cheng Kuo , Chun-Kuo Yu
发明人： Chih-Jen Shih , Chun-Yuan Hsu , Che-Cheng Kuo , Chun-Kuo Yu
IPC分类号： H03K23/46
CPC分类号： H03K19/00315 , G09G3/3677 , G09G2310/0286 , G11C19/28
摘要： A shift register apparatus and a method thereof are provided. The technique manner submitted by the present invention utilizes two NMOS transistors for pulling down the voltage level of the scan signals output by the shift registers within the shift register apparatus to the low level gate voltage, wherein one of the NMOS transistors is controlled by a control unit, and the other NMOS transistor is controlled by a clock signal or the inverted clock signal provided to the shift registers. Therefore, shifting amount of the threshold voltage of those NMOS transistors can trend to be flat, and the reliability of those NMOS transistors can be promoted. In addition, since only one control unit is needed to dispose in each shift register so that the layout area of whole shift register apparatus can be reduced, and the panel with narrow frame size also can be achieved by the present invention.
摘要翻译：提供一种移位寄存装置及其方法。本发明提供的技术方法利用两个NMOS晶体管来将由移位寄存器装置内的移位寄存器输出的扫描信号的电压电平降低到低电平门电压，其中一个NMOS晶体管由一个控制单元，另一个NMOS晶体管由提供给移位寄存器的时钟信号或反相时钟信号控制。因此，那些NMOS晶体管的阈值电压的移动量趋向于平坦，并且可以促进那些NMOS晶体管的可靠性。此外，由于只需要一个控制单元来配置在每个移位寄存器中，从而可以减少整个移位寄存器装置的布局区域，并且通过本发明也可以实现具有窄帧大小的面板。

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