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1. 发明公开

US20240300754A1 CONE DISPENSING APPARATUS AND METHOD THEREOF 审中-公开
公开(公告)号：US20240300754A1
公开(公告)日：2024-09-12
申请号：US18551546
申请日：2022-03-21
申请人： Chris MARTIN , INTERBAKE FOODS LLC
发明人： Chris Martin
IPC分类号： B65G59/10 , A23G7/00 , A23G9/14 , A23G9/28
CPC分类号： B65G59/107 , A23G7/0025 , A23G9/14 , A23G9/288
摘要： A cone dispensing apparatus a control system for monitoring and controlling the various components of the apparatus. The dispensing apparatus can include a first cam and a second cam, wherein the first cam and second cam are positioned parallel to each other in a housing. A first motor can be coupled to the first cam and a second motor can be coupled to the second cam, wherein the first and second motors are configured to rotate the cams around an axis. A first holdback plate and a second holdback plate can be coupled to a respective first linear motor and second linear motor. The hold back plates and cams can be synchronized to dispense a cone from the cone stack to the cams positioned below.

2. 发明申请

US20110256655A1 LOW VOLTAGE LOW LIGHT IMAGER AND PHOTODETECTOR 有权
标题翻译：低电压低照度成像器和光电转换器
公开(公告)号：US20110256655A1
公开(公告)日：2011-10-20
申请号：US13026119
申请日：2011-02-11
申请人： Shouleh Nikzad , Chris Martin , Michael E. Hoenk
发明人： Shouleh Nikzad , Chris Martin , Michael E. Hoenk
IPC分类号： H01L31/18 , H01L27/146
CPC分类号： H01L31/03529 , H01L27/14643 , H01L27/14694 , H01L27/14806 , H01L31/0304 , H01L31/107 , H01L31/1844 , H02N2/18 , Y02E10/544
摘要： Highly efficient, low energy, low light level imagers and photodetectors are provided. In particular, a novel class of Della-Doped Electron Bombarded Array (DDEBA) photodetectors that will reduce the size, mass, power, complexity, and cost of conventional imaging systems while improving performance by using a thinned imager that is capable of detecting low-energy electrons, has high gain, and is of low noise.
摘要翻译：提供了高效，低能量，低光照成像器和光电探测器。特别地，一种新型的Della-Doped Electron Bombard Array（DDEBA）光电探测器，其将通过使用能够检测低通滤波器的薄型成像器来改善性能，从而降低传统成像系统的尺寸，质量，功率，复杂性和成本，能量电子具有高增益，噪声低。

3. 发明申请

US20080272173A1 SURGICAL STAPLER 有权
标题翻译：外科手术
公开(公告)号：US20080272173A1
公开(公告)日：2008-11-06
申请号：US12113851
申请日：2008-05-01
申请人： James Coleman , Christy Cummins , Chris Martin , Thomas Raymond Anthony , Sean Morris
发明人： James Coleman , Christy Cummins , Chris Martin , Thomas Raymond Anthony , Sean Morris
IPC分类号： A61B17/064 , A61B17/068
CPC分类号： A61B17/0684 , A61B17/0057 , A61B17/0644 , A61B17/068 , A61B17/0682 , A61B17/1285 , A61B2017/00668 , A61B2017/00672 , A61B2090/062
摘要： A surgical stapler comprises a hollow shaft 10 and a tube 92 slidable axially within the shaft between a forward position wherein one end 96 of the tube projects beyond a free end of the shaft to enter a puncture site in a blood vessel and a rearward position wherein the end of the locator tube is retracted within the shaft. A surgical staple 40 straddles the tube 92 and is slidable thereon forwardly towards an anvil 24 against which the staple may be deformed to staple together the opposite edges of the puncture site. A cam mechanism drives the staple forwardly along the tube 92 into deforming engagement with the anvil and at the same time retracts the tube into the shaft in time to allow the legs of the staple to close onto the puncture site.
摘要翻译：手术吻合器包括中空轴10和在轴内在轴内可轴向滑动的管92，该前后位置，其中管的一端96突出于轴的自由端以进入血管中的穿刺部位和向后位置，其中定位管的端部缩回到轴内。外科手术钉40跨过管92并且可以向前滑动到砧座24，钉子可以在其上变形以将穿刺部位的相对边缘钉在一起。凸轮机构沿着管92向前驱动订书钉以与砧座变形接合，并且同时将管子及时缩回到轴中，以允许订书钉的腿部靠近穿刺部位。

4. 发明申请

US20080191925A1 MILLIMETER WAVE IMAGING SYSTEM 失效
公开(公告)号：US20080191925A1
公开(公告)日：2008-08-14
申请号：US11300827
申请日：2005-12-14
申请人： Chris Martin , John Lovberg
发明人： Chris Martin , John Lovberg
IPC分类号： G01S13/04 , G01S13/89
CPC分类号： G01V8/005 , H01Q3/22 , H01Q3/2682 , H01Q25/005
摘要： A millimeter wave imaging system. The system includes at least one millimeter wave frequency scanning antenna for collecting frequency dependent beams of millimeter wave radiation from a narrow one-dimensional field of view; a millimeter wave amplifier for amplifying at the collected frequencies said millimeter wave radiation. A beam-former separates the amplified radiation to produce frequency dependent signals corresponding to the frequency dependent beam. The beam-former includes delay lines, a millimeter wave lens, and an array of millimeter wave power detectors for detecting the power in each frequency dependent beam. A sampling circuit reads out the frequency dependent signals to produce a one-dimensional image of the antenna field of view. A two dimensional image of a target may be obtained by moving the target across the field of view of the scanning antenna or by moving the antenna in order to scan its line of focus over the target. In preferred embodiments a 2×2 Dicke switch is provided to permit sampling a reference thermal source for gain control while continuing to collect image information. This 2×2 Dicke switch provides a square root of 2 improvement in temperature sensitivity over a single receiver version. Preferred embodiments also include features for focusing the antenna within a range of about 5 feet to infinity.
摘要翻译：毫米波成像系统。该系统包括至少一个毫米波频率扫描天线，用于从窄的一维视场收集毫米波辐射的频率相关波束; 毫米波放大器，用于在收集的频率上放大所述毫米波辐射。波束形成器分离放大的辐射以产生对应于频率相关波束的频率相关信号。波束成形器包括延迟线，毫米波透镜和用于检测每个频率相关光束中的功率的毫米波功率检测器阵列。采样电路读取频率相关信号以产生天线视场的一维图像。可以通过在扫描天线的视野上移动目标或通过移动天线以便在目标上扫描其焦点线来获得目标的二维图像。在优选实施例中，提供2x2Dicke开关以允许对参考热源进行采样以获得增益控制，同时继续收集图像信息。这个2x2 Dicke开关在单个接收器版本上提供了2个温度灵敏度提高的平方根。优选实施例还包括用于将天线聚焦在约5英尺至无限远的范围内的特征。

5. 发明授权

US07412634B2 On-chip sampling circuit and method 失效
公开(公告)号：US07412634B2
公开(公告)日：2008-08-12
申请号：US11712041
申请日：2007-02-28
申请人： Chris Martin , James Brian Johnson , Troy Manning , Brent Keeth
发明人： Chris Martin , James Brian Johnson , Troy Manning , Brent Keeth
IPC分类号： G01R31/28
CPC分类号： G11C29/48 , G11C29/1201
摘要： Through addressing circuitry, a sampling circuit can choose a unique internal node/signal on an encapsulated/packaged chip to be output to one or more drivers. The chosen signals available at the target node are directed either through a select circuit to an output pin, or directly to an output pin. In a preferred mode, decode circuits used to select a unique node are serially connected, allowing for a large number of signals to be made available for analyzing without a large impact on circuit layout. Because of the rules related to abstracts, this abstract should not be used in the construction of the claims.

6. 发明授权

US07251762B2 On-chip sampling circuit and method 有权
标题翻译：片上采样电路及方法
公开(公告)号：US07251762B2
公开(公告)日：2007-07-31
申请号：US11109535
申请日：2005-04-19
申请人： Chris Martin , James Brian Johnson , Troy Manning , Brent Keeth
发明人： Chris Martin , James Brian Johnson , Troy Manning , Brent Keeth
IPC分类号： G01R31/28
CPC分类号： G11C29/48 , G11C29/1201
摘要： Through addressing circuitry, a sampling circuit can choose a unique internal node/signal on an encapsulated/packaged chip to be output to one or more drivers. The chosen signals available at the target node are directed either through a select circuit to an output pin, or directly to an output pin. In a preferred mode, decode circuits used to select a unique node are serially connected, allowing for a large number of signals to be made available for analyzing without a large impact on circuit layout.
摘要翻译：通过寻址电路，采样电路可以在封装/封装的芯片上选择唯一的内部节点/信号，以输出到一个或多个驱动器。在目标节点处可用的选定信号通过选择电路指向输出引脚，或直接指向输出引脚。在优选模式中，用于选择唯一节点的解码电路串联连接，允许大量的信号可用于分析，而不会对电路布局造成很大影响。

7. 发明申请

US20070168795A1 On-chip sampling circuit and method 失效
标题翻译：片上采样电路及方法
公开(公告)号：US20070168795A1
公开(公告)日：2007-07-19
申请号：US11712040
申请日：2007-02-28
申请人： Chris Martin , James Johnson , Troy Manning , Brent Keeth
发明人： Chris Martin , James Johnson , Troy Manning , Brent Keeth
IPC分类号： G01R31/28
CPC分类号： G11C29/48 , G11C29/1201
摘要： Through addressing circuitry, a sampling circuit can choose a unique internal node/signal on an encapsulated/packaged chip to be output to one or more drivers. The chosen signals available at the target node are directed either through a select circuit to an output pin, or directly to an output pin. In a preferred mode, decode circuits used to select a unique node are serially connected, allowing for a large number of signals to be made available for analyzing without a large impact on circuit layout. Because of the rules related to abstracts, this abstract should not be used in the construction of the claims.
摘要翻译：通过寻址电路，采样电路可以在封装/封装的芯片上选择唯一的内部节点/信号，以输出到一个或多个驱动器。在目标节点处可用的选定信号通过选择电路指向输出引脚，或直接指向输出引脚。在优选模式中，用于选择唯一节点的解码电路串联连接，允许大量的信号可用于分析，而不会对电路布局造成很大影响。由于与摘要相关的规则，本摘要不应用于索赔的构建。

8. 发明申请

US20070115712A1 Apparatus and method for mounting microelectronic devices on a mirrored board assembly 审中-公开
标题翻译：将微电子器件安装在镜像板组件上的装置和方法
公开(公告)号：US20070115712A1
公开(公告)日：2007-05-24
申请号：US11654435
申请日：2007-01-16
申请人： Chris Martin , Brent Keeth , Brian Johnson , Walter Moden
发明人： Chris Martin , Brent Keeth , Brian Johnson , Walter Moden
IPC分类号： G11C5/06
CPC分类号： H05K1/181 , G11C5/04 , G11C5/06 , H05K1/112 , H05K2201/09409 , H05K2201/10159 , H05K2201/10545 , H05K2201/10689 , Y02P70/611
摘要： The present invention is directed to a system, a module, and an apparatus and method for forming a microelectronic memory device. In one embodiment, a system includes a processor and a controller coupled to the processor with at least one memory module coupled to the controller, the module including a pair of memory devices oppositely positioned on respective surfaces of a substrate and interconnected by members extending through the substrate that couple terminals of the devices, the terminals being selected to include a group of terminals that are configured to communicate functionally compatible signals.
摘要翻译：本发明涉及一种用于形成微电子存储器件的系统，模块以及装置和方法。在一个实施例中，系统包括处理器和耦合到处理器的控制器，其中至少一个存储器模块耦合到控制器，该模块包括一对存储器件，其相对地定位在衬底的相应表面上并且通过延伸穿过耦合器件的端子的基板，所述端子被选择为包括被配置为传送功能兼容的信号的一组端子。

9. 发明申请

US20060118924A1 Lead frame assemblies and decoupling capacitors 审中-公开
标题翻译：引线框架组件和去耦电容器
公开(公告)号：US20060118924A1
公开(公告)日：2006-06-08
申请号：US11326078
申请日：2006-01-05
申请人： David Corisis , Chris Martin
发明人： David Corisis , Chris Martin
IPC分类号： H01L23/495
CPC分类号： H01L23/49589 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/32145 , H01L2224/48091 , H01L2224/48095 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171 , H01L2924/00014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01076 , H01L2924/01079 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A lead frame assembly includes at least two layers, each including an electrically conductive bus and a group of leads that extend substantially from a first edge of the assembly. The leads of each layer may include portions that extend in substantially the same direction. The electrically conductive buses are at least partially superimposed with respect to one another. Leads of one of the layers may be arranged in groups which flank the remainder of the lead of another layer. A dielectric element is disposed at least partially between the layers; for example, between at least portions of the superimposed regions of the buses. One of the buses may be connectable to a power supply source (Vcc), while the other may be connectable to a power supply ground (Vss). In such an arrangement, the mutually superimposed regions of the buses may form a decoupling capacitor.
摘要翻译：引线框架组件包括至少两个层，每个层包括导电总线和基本上从组件的第一边缘延伸的一组引线。每个层的引线可以包括在基本相同的方向上延伸的部分。导电总线相对于彼此至少部分地叠加。层之一的引线可以以与另一层的引线的其余部分相邻的组排列。电介质元件至少部分地设置在所述层之间; 例如在总线的叠加区域的至少一部分之间。其中一条总线可以连接到电源（Vcc cc），而另一条总线可以连接到电源地（V SUB）。在这种布置中，总线的相互叠加的区域可以形成去耦电容器。

10. 发明申请

US20060109722A1 Active termination circuit and method for controlling the impedance of external integrated circuit terminals 有权
公开(公告)号：US20060109722A1
公开(公告)日：2006-05-25
申请号：US11329482
申请日：2006-01-10
申请人： Chris Martin
发明人： Chris Martin
IPC分类号： G11C7/00
CPC分类号： G11C7/1084 , G11C7/1051 , G11C7/1057 , G11C7/1072 , G11C7/1078 , G11C11/4093 , G11C2207/105 , G11C2207/2254
摘要： An active termination circuit is used to set the input impedance of a plurality of input terminals. Each of the input terminals is coupled to a supply voltage through at least one PMOS transistor and to ground through at least one NMOS transistor. The impedances of the transistors are controlled by a control circuit that generates a first control signal to set the impedance of another PMOS transistor to be equal to a first predetermined resistance, and generates a second control signal to set the impedance of another NMOS transistor to be equal to a second predetermined resistance. The first control signal is used to control all of the PMOS transistors and the second control signal is used to control all of the NMOS transistors. As a result, the PMOS and NMOS transistors coupled to each input terminal have impedances corresponding to the first and second resistances, respectively.

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