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1. 发明授权

US07790505B2 Semiconductor chip package manufacturing method and structure thereof 有权
标题翻译：半导体芯片封装制造方法及其结构
公开(公告)号：US07790505B2
公开(公告)日：2010-09-07
申请号：US11871319
申请日：2007-10-12
申请人： Chian-Chi Lin , Chih-Huang Chang , Yueh-Lung Lin
发明人： Chian-Chi Lin , Chih-Huang Chang , Yueh-Lung Lin
IPC分类号： H01L21/00
CPC分类号： H01L27/14618 , H01L27/14632 , H01L27/14687 , H01L2224/02371 , H01L2924/15311
摘要： A semiconductor chip package manufacturing method and a structure thereof are provided. The manufacturing method includes: providing a base having an image sensor chip and an encapsulant, in which the image sensor chip has pads and an active area; placing a transparent insulator on the active area; forming an insulation layer on an upper surface of the base; opening a plurality of openings to expose the pads; forming a plurality of through holes penetrating the insulation layer and the encapsulant outside of the image sensor chips; forming a metal layer on surfaces of the insulation layer, the openings, the pads and the through holes, and on a lower surface of the base, so as to extend the pads to the lower surface of the base; patterning the metal layer to expose a top area of the transparent insulator and remove a partial area of the metal layer on the lower surface of the base to form contacts; and sawing the base to form a package structure containing a single image sensor chip.
摘要翻译：提供半导体芯片封装的制造方法及其结构。该制造方法包括：提供具有图像传感器芯片和密封剂的基座，其中图像传感器芯片具有焊盘和有源区域; 在有源区域放置透明绝缘体; 在所述基座的上表面上形成绝缘层; 打开多个开口以露出所述垫; 在所述图像传感器芯片外部形成穿过所述绝缘层和所述密封剂的多个通孔; 在绝缘层，开口，焊盘和通孔的表面上以及在基底的下表面上形成金属层，以将焊盘延伸到基座的下表面; 图案化金属层以暴露透明绝缘体的顶部区域并去除基底的下表面上的金属层的部分区域以形成接触; 并锯切基底以形成包含单个图像传感器芯片的封装结构。

2. 发明授权

US07602053B2 Leadframe of a leadless flip-chip package and method for manufacturing the same 有权
标题翻译：无引脚倒装芯片封装的引线框及其制造方法
公开(公告)号：US07602053B2
公开(公告)日：2009-10-13
申请号：US11943655
申请日：2007-11-21
申请人： Yao-Ting Huang , Chih-Huang Chang
发明人： Yao-Ting Huang , Chih-Huang Chang
IPC分类号： H01L23/495
CPC分类号： H01L23/49861 , H01L23/3121 , H01L25/0657 , H01L2224/16225 , H01L2224/32145 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06527 , H01L2225/06582 , H01L2924/00
摘要： A leadframe of a leadless flip-chip package includes a plurality of inner leads, a nonconductive ink layer and a solder mask layer. The inner leads have a plurality of bump-connecting terminals, a plurality of outer terminals and a plurality of redistribution lead portions. A half-etched recession is formed on lower surfaces of the redistribution lead portions, and is filled with the non-conductive ink layer. The non-conductive ink layer fixes the redistribution lead portions onto the bump-connecting terminals. The solder mask layer is easily formed on the non-conductive ink layer and covers the inner leads.
摘要翻译：无引脚倒装芯片封装的引线框架包括多个内引线，非导电油墨层和焊接掩模层。内引线具有多个凸起连接端子，多个外部端子和多个再分配引线部分。在再分配引线部分的下表面上形成半蚀刻凹陷，并且填充有非导电油墨层。非导电油墨层将再分配引线部分固定到凸块连接端子上。焊接掩模层容易地形成在非导电油墨层上并覆盖内部引线。

3. 发明申请

US20080093717A1 LEADFRAME OF A LEADLESS FLIP-CHIP PACKAGE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：无铅卷芯纸包装的制造方法及其制造方法
公开(公告)号：US20080093717A1
公开(公告)日：2008-04-24
申请号：US11943655
申请日：2007-11-21
申请人： Yao-Ting Huang , Chih-Huang Chang
发明人： Yao-Ting Huang , Chih-Huang Chang
IPC分类号： H01L23/06
CPC分类号： H01L23/49861 , H01L23/3121 , H01L25/0657 , H01L2224/16225 , H01L2224/32145 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06527 , H01L2225/06582 , H01L2924/00
摘要： A leadframe of a leadless flip-chip package includes a plurality of inner leads, a nonconductive ink layer and a solder mask layer. The inner leads have a plurality of bump-connecting terminals, a plurality of outer terminals and a plurality of redistribution lead portions. A half-etched recession is formed on lower surfaces of the redistribution lead portions, and is filled with the non-conductive ink layer. The non-conductive ink layer fixes the redistribution lead portions onto the bump-connecting terminals. The solder mask layer is easily formed on the non-conductive ink layer and covers the inner leads.
摘要翻译：无引脚倒装芯片封装的引线框架包括多个内引线，非导电油墨层和焊接掩模层。内引线具有多个凸起连接端子，多个外部端子和多个再分配引线部分。在再分配引线部分的下表面上形成半蚀刻凹陷，并且填充有非导电油墨层。非导电油墨层将再分配引线部分固定到凸块连接端子上。焊接掩模层容易地形成在非导电油墨层上并覆盖内部引线。

4. 发明授权

US07222124B2 Internet automatic electric data system 有权
标题翻译：互联网自动电力数据系统
公开(公告)号：US07222124B2
公开(公告)日：2007-05-22
申请号：US10646696
申请日：2003-08-25
申请人： I-Linag Lin , Chang-Chi Lee , Chih-Huang Chang
发明人： I-Linag Lin , Chang-Chi Lee , Chih-Huang Chang
IPC分类号： G06F7/00 , G06F17/50
CPC分类号： H01L22/20 , G06F17/50 , G06F2217/04 , Y10S707/99942 , Y10S707/99945
摘要： The present invention discloses an Internet automatic electrical data system that comprises a process controller used to process the analyzing order for IC (integrated circuit) packages entrusted by clients. A database is used to store the input parameters of IC packages and parameters database is used to provide the condition parameters relative to the model of IC package entrusted by clients. An electrical simulation and analyzing software is introduced to analyze the parameters input by clients and the condition parameters provided by the condition parameter database. A report form generator is used to generate the report form of analyzing result and a replying means is used to send the report forms to the clients.
摘要翻译：本发明公开了一种互联网自动电气数据系统，其包括用于处理由客户委托的IC（集成电路）包的分析顺序的过程控制器。数据库用于存储IC包的输入参数，参数数据库用于提供客户委托的IC封装模型的条件参数。引入电气仿真和分析软件来分析客户输入的参数和条件参数数据库提供的条件参数。报表生成器用于生成分析结果的报表，回报方式用于向客户发送报表。

5. 发明申请

US20050200014A1 Bump and fabricating process thereof 审中-公开
公开(公告)号：US20050200014A1
公开(公告)日：2005-09-15
申请号：US10905675
申请日：2005-01-17
申请人： William Chen , Ho-Ming Tong , Chun-Chi Lee , Su Tao , Chih-Huang Chang , Jeng-Da Wu , Wen-Pin Huang , Po-Jen Cheng
发明人： William Chen , Ho-Ming Tong , Chun-Chi Lee , Su Tao , Chih-Huang Chang , Jeng-Da Wu , Wen-Pin Huang , Po-Jen Cheng
IPC分类号： H01L21/60 , H01L23/485 , H01L23/48
CPC分类号： H01L24/05 , H01L24/03 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05624 , H01L2224/05666 , H01L2224/1134 , H01L2224/13099 , H01L2224/13109 , H01L2224/13111 , H01L2224/13164 , H01L2224/78301 , H01L2924/01005 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01043 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/12044 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： A bump structure on a contact pad and a fabricating process thereof. The bump comprises an under-ball-metallurgy layer, a bonding mass and a welding lump. The under-ball-metallurgy layer is formed over the contact pad and the bonding mass is formed over the under-ball-metallurgy layer by conducting a pressure bonding process. The bonding mass having a thickness between 4 to 10 μm is made from a material such as copper. The welding lump is formed over the bonding mass such that a sidewall of the bonding mass is also enclosed.

6. 发明申请

US20050062142A1 Chip on glass package 有权
标题翻译：芯片上的玻璃包装
公开(公告)号：US20050062142A1
公开(公告)日：2005-03-24
申请号：US10947176
申请日：2004-09-23
申请人： Ying-Tsai Yeh , Chih-Huang Chang , Yung Lu
发明人： Ying-Tsai Yeh , Chih-Huang Chang , Yung Lu
IPC分类号： G06K9/00 , H01L21/44 , H01L23/14 , H01L27/146
CPC分类号： G06K9/00053 , H01L27/14618 , H01L2224/16145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/15311 , H01L2924/00014
摘要： A chip on glass package. A glass substrate has a top surface and a corresponding bottom surface. A plurality of chips are flip-chip mounted on the top surface of the glass substrate. The bottom surface of the glass substrate is secured to and electrically connected with a carrier. An encapsulation material is formed around the glass substrate to seal the chips. The encapsulation material has a cavity to expose the contact area of the top surface of the glass substrate. Therefore the chip on glass package is to possess a better protection and electrical connection of the glass substrate.
摘要翻译：玻璃包装芯片。玻璃基板具有顶表面和相应的底表面。多个芯片被倒装安装在玻璃基板的顶表面上。玻璃基板的底面被固定并与载体电连接。在玻璃基板周围形成密封材料以密封芯片。封装材料具有用于暴露玻璃基板的顶表面的接触面积的空腔。因此，玻璃封装上的芯片具有更好的玻璃基板的保护和电连接。

7. 发明申请

US20050023667A1 Multi-chips module package and manufacturing method thereof 有权
标题翻译：多芯片模块封装及其制造方法
公开(公告)号：US20050023667A1
公开(公告)日：2005-02-03
申请号：US10900089
申请日：2004-07-28
申请人： Chian-Chi Lin , Chih-Huang Chang
发明人： Chian-Chi Lin , Chih-Huang Chang
IPC分类号： H01L23/31 , H01L23/495
CPC分类号： H01L24/16 , H01L23/3107 , H01L23/49575 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/05554 , H01L2224/05568 , H01L2224/05573 , H01L2224/13099 , H01L2224/13144 , H01L2224/16 , H01L2224/16245 , H01L2224/32145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48247 , H01L2224/4911 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01013 , H01L2924/01027 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10162 , H01L2924/14 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A multi-chips module package comprises a lead frame, a first chip, a second chip, a plurality of electrically conductive wires and an encapsulation. The lead frame has a plurality of first leads, second leads and chip pads connecting to the first leads. The first chip is placed on the lead frame and electrically connected to the lead frame through the bumps connecting the bump-bonding pads and the chip pads and the first leads; the second chip is placed over the first chip and electrically connected to the lead frame through the wires connecting the wire-bonding pads to the second leads; and the encapsulation covers the first chip, the second chip, the lead frame, and the wires. In such a manner, it not only reduces the distance of transmitting the electrical signals from chips to the outside but also it can save cost due to the lead frame manufactured by a simple manufacturing processes. In addition, a manufacturing method of the multi-chips module package is provided.
摘要翻译：多芯片模块封装包括引线框，第一芯片，第二芯片，多根导电线和封装。引线框架具有连接到第一引线的多个第一引线，第二引线和芯片焊盘。第一芯片放置在引线框架上，并通过连接凸块焊盘和芯片焊盘和第一引线的凸块电连接到引线框架; 第二芯片放置在第一芯片上并且通过将引线接合焊盘连接到第二引线的电线电连接到引线框架; 并且封装覆盖第一芯片，第二芯片，引线框架和电线。以这种方式，不仅减少了将电信号从芯片传输到外部的距离，而且还可以通过简单制造工艺制造的引线框架节省成本。此外，提供了多芯片模块封装的制造方法。

8. 发明授权

US06819002B2 Under-ball-metallurgy layer 有权
标题翻译：球下冶金层
公开(公告)号：US06819002B2
公开(公告)日：2004-11-16
申请号：US10604795
申请日：2003-08-18
申请人： William Tze-You Chen , Ho-Ming Tong , Chun-Chi Lee , Su Tao , Jeng-Da Wu , Chih-Huang Chang , Po-Jen Cheng
发明人： William Tze-You Chen , Ho-Ming Tong , Chun-Chi Lee , Su Tao , Jeng-Da Wu , Chih-Huang Chang , Po-Jen Cheng
IPC分类号： H01L2348
CPC分类号： H01L24/11 , H01L24/02 , H01L24/13 , H01L2224/0401 , H01L2224/13099 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13147 , H01L2924/0001 , H01L2924/00013 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01043 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/05042 , H01L2224/29099 , H01L2924/00014 , H01L2924/01083
摘要： An under-ball-metallurgy layer between a bonding pad on a chip and a solder bump made with tin-based material is provided. The under-ball-metallurgy layer at least includes an adhesion layer over the bonding pad, a nickel-vanadium layer over the adhesion layer, a wettable layer over the nickel-vanadium layer and a barrier layer over the wettable layer. The barrier layer prevents the penetration of nickel atoms from the nickel-vanadium layer and reacts with tin within the solder bump to form inter-metallic compound. This invention also provides an alternative under-ball-metallurgy layer that at least includes an adhesion layer over the bonding pad, a wettable layer over the adhesion layer and a nickel-vanadium layer over the wettable layer. The nickel within the nickel-vanadium layer may react with tin within the solder bump to form an inter-metallic compound.
摘要翻译：提供了一种在芯片上的焊盘与由锡基材料制成的焊料凸块之间的球下冶金层。所述球下冶金层至少包括粘合层上的粘合层，粘附层上的镍钒层，镍 - 钒层上的可润湿层和可湿性层上的阻挡层。阻挡层防止镍原子从镍钒层渗透，并与焊锡凸块内的锡反应形成金属间化合物。本发明还提供了替代的球内冶金层，其至少包括粘合层上方的粘合层，粘合层上方的可润湿层和可润湿层上的镍钒层。镍钒层内的镍可能与焊锡凸块内的锡反应形成金属间化合物。

9. 发明申请

US20090068010A1 Electric fan structure 审中-公开
标题翻译：电风扇结构
公开(公告)号：US20090068010A1
公开(公告)日：2009-03-12
申请号：US11898196
申请日：2007-09-10
申请人： Chih-Huang Chang , Shen-Yuan Chen
发明人： Chih-Huang Chang , Shen-Yuan Chen
IPC分类号： F01D25/24
CPC分类号： F04D25/08 , F04D25/10
摘要： The present invention provides an improved electric fan structure, in which an electric fan is structured from an air converging vent; a main body and a base. The air converging vent comprises a plurality of guide strips, which are used to concentrate the air at an upper portion of the main body, and the bevel angled guide strips guide the air draft into the main body. The air is made to form a powerful vortex by means of a pass through type wind wheel formed as an integrated body in conjunction with a drive device causing the wind wheel to rotate, after which an induced draft plate covering a periphery of the wind wheel sends the air to an air outlet, where the air is blow out, thereby achieving functionality to realize optimum air volume output, and, at the same time, reduce noise when the electric fan is rotating.
摘要翻译：本发明提供了一种改进的电风扇结构，其中电风扇由空气会聚排气口构成; 一个主体和一个基地。空气会聚通风口包括多个导向条，其用于将空气集中在主体的上部，并且斜面成角度的引导条引导空气进入主体。空气通过与驱动装置结合形成为整体的通过式风轮形成强大的涡流，使得风轮旋转，之后，覆盖风轮周边的感应通风板发送空气到空气出口，空气吹出，从而实现最佳风量输出的功能，同时在电风扇转动时减少噪音。

10. 发明授权

US07221041B2 Multi-chips module package and manufacturing method thereof 有权
标题翻译：多芯片模块封装及其制造方法
公开(公告)号：US07221041B2
公开(公告)日：2007-05-22
申请号：US10900089
申请日：2004-07-28
申请人： Chian-Chi Lin , Chih-Huang Chang
发明人： Chian-Chi Lin , Chih-Huang Chang
IPC分类号： H01L23/495
CPC分类号： H01L24/16 , H01L23/3107 , H01L23/49575 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/05554 , H01L2224/05568 , H01L2224/05573 , H01L2224/13099 , H01L2224/13144 , H01L2224/16 , H01L2224/16245 , H01L2224/32145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48247 , H01L2224/4911 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01013 , H01L2924/01027 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10162 , H01L2924/14 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A multi-chips module package comprises a lead frame, a first chip, a second chip, a plurality of electrically conductive wires and an encapsulation. The lead frame has a plurality of first leads, second leads and chip pads connecting to the first leads. The first chip is placed on the lead frame and electrically connected to the lead frame through the bumps connecting the bump-bonding pads and the chip pads and the first leads; the second chip is placed over the first chip and electrically connected to the lead frame through the wires connecting the wire-bonding pads to the second leads; and the encapsulation covers the first chip, the second chip, the lead frame, and the wires. In such a manner, it not only reduces the distance of transmitting the electrical signals from chips to the outside but also it can save cost due to the lead frame manufactured by a simple manufacturing processes. In addition, a manufacturing method of the multi-chips module package is provided.
摘要翻译：多芯片模块封装包括引线框，第一芯片，第二芯片，多根导电线和封装。引线框架具有连接到第一引线的多个第一引线，第二引线和芯片焊盘。第一芯片放置在引线框架上，并通过连接凸块焊盘和芯片焊盘和第一引线的凸块电连接到引线框架; 第二芯片放置在第一芯片上并且通过将引线接合焊盘连接到第二引线的电线电连接到引线框架; 并且封装覆盖第一芯片，第二芯片，引线框架和电线。以这种方式，不仅减少了将电信号从芯片传输到外部的距离，而且还可以通过简单制造工艺制造的引线框架节省成本。此外，提供了多芯片模块封装的制造方法。

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