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    • 1. 发明申请
    • DIGITAL TEMPERATURE DETECTING SYSTEM AND METHOD
    • 数字温度检测系统及方法
    • US20080136453A1
    • 2008-06-12
    • US11682761
    • 2007-03-06
    • Hung-Yi KuoChia-Hung Su
    • Hung-Yi KuoChia-Hung Su
    • H03K19/00G01K7/00
    • G01K7/34G01K7/346
    • A digital temperature detecting system for detecting a working temperature of a chip. The digital temperature detecting system includes a clock generator, for generating a first clock signal having a constant frequency; an oscillating circuit having a plurality of Not gates coupled in series, for generating a second clock signal, wherein a total number of the Not gates is an odd number; a command issuing unit connected to the clock generator, for generating a reference command signal according to the first clock signal, wherein a counting duration and a recovery duration are generated periodically in the reference command signal; and a command processing unit connected to the command issuing unit and the oscillating circuit, for generating a counting number through counting the clocks generated in the second clock signal in the counting duration and determining a working temperature according to the counting number.
    • 一种用于检测芯片的工作温度的数字温度检测系统。 数字温度检测系统包括用于产生具有恒定频率的第一时钟信号的时钟发生器; 具有串联耦合的多个Not门的振荡电路,用于产生第二时钟信号,其中Not门的总数是奇数; 命令发布单元,连接到时钟发生器,用于根据第一时钟信号产生参考命令信号,其中在参考命令信号中周期性地产生计数持续时间和恢复持续时间; 以及命令处理单元,连接到命令发布单元和振荡电路,用于通过对在计数持续时间中产生的第二时钟信号中产生的时钟进行计数并根据计数号确定工作温度来产生计数数。
    • 3. 发明申请
    • Debugging Apparatus for Computer System and Method Thereof
    • 计算机系统调试装置及方法
    • US20120159254A1
    • 2012-06-21
    • US13023745
    • 2011-02-09
    • Chia-Hung SuYu-Jen Chang
    • Chia-Hung SuYu-Jen Chang
    • G06F11/22
    • G06F11/2284
    • The present invention relates to a debugging apparatus for a computer system and a method thereof. A detecting unit detects if a debugging unit connects to the computer system. When a debugging unit connects to the computer system, the detecting unit produces a detecting signal, which contains information of a bus in the computer system electrically connected with the debugging unit. Then a selection unit selects the bus electrically connected with the debugging unit according to the detecting signal. Besides, a testing unit tests the computer system and produces a power-on self-test (POST) code, so that the selected bus can be used for outputting the POST code to the debugging unit. Thereby, the present invention can choose to use the bus reserved in the computer system for outputting the POST code to the debugging unit, and hence facilitating inspection personnel to debug the computer system.
    • 本发明涉及一种计算机系统的调试装置及其方法。 检测单元检测调试单元是否连接到计算机系统。 当调试单元连接到计算机系统时,检测单元产生检测信号,该检测信号包含与调试单元电连接的计算机系统中的总线的信息。 然后,选择单元根据检测信号选择与调试单元电连接的总线。 此外,测试单元测试计算机系统并产生开机自检(POST)代码,以便所选择的总线可用于将POST代码输出到调试单元。 因此,本发明可以选择使用计算机系统中预留的总线将POST代码输出到调试单元,从而便于检查人员调试计算机系统。
    • 5. 发明授权
    • Chipsets and clock generation methods thereof
    • 芯片组及其时钟生成方法
    • US07671645B2
    • 2010-03-02
    • US12102119
    • 2008-04-14
    • Chia-Hung SuHung-Yi Kuo
    • Chia-Hung SuHung-Yi Kuo
    • H03L7/06
    • H03L7/14H03L7/18
    • Chipsets capable of preventing malfunction caused by feedback clock distortion are provided, in which a phase frequency detector generates a control voltage according to a first reference clock and a first feedback clock, a voltage-controlled oscillator generates an output clock according to the control voltage, a frequency divider performs a frequency-division on a second feedback clock to obtain the first feedback clock, and a frequency filter estimates swings and frequency of a third feedback clock from an external unit and selectively outputs one of the third feedback clock or the output clock to serve as the second clock.
    • 提供能够防止由反馈时钟失真引起的故障的芯片组,其中相位频率检测器根据第一参考时钟和第一反馈时钟产生控制电压,压控振荡器根据控制电压产生输出时钟, 分频器对第二反馈时钟进行分频以获得第一反馈时钟,频率滤波器从外部单元估计第三反馈时钟的摆动和频率,并选择性地输出第三反馈时钟或输出时钟之一 作为第二个时钟。
    • 9. 发明授权
    • Debugging apparatus for computer system and method thereof
    • 计算机系统调试装置及其方法
    • US08707103B2
    • 2014-04-22
    • US13023745
    • 2011-02-09
    • Chia-Hung SuYu-Jen Chang
    • Chia-Hung SuYu-Jen Chang
    • G06F11/00
    • G06F11/2284
    • The present invention relates to a debugging apparatus for a computer system and a method thereof. A detecting unit detects if a debugging unit connects to the computer system. When a debugging unit connects to the computer system, the detecting unit produces a detecting signal, which contains information of a bus in the computer system electrically connected with the debugging unit. Then a selection unit selects the bus electrically connected with the debugging unit according to the detecting signal. Besides, a testing unit tests the computer system and produces a power-on self-test (POST) code, so that the selected bus can be used for outputting the POST code to the debugging unit. Thereby, the present invention can choose to use the bus reserved in the computer system for outputting the POST code to the debugging unit, and hence facilitating inspection personnel to debug the computer system.
    • 本发明涉及一种计算机系统的调试装置及其方法。 检测单元检测调试单元是否连接到计算机系统。 当调试单元连接到计算机系统时,检测单元产生检测信号,该检测信号包含与调试单元电连接的计算机系统中的总线的信息。 然后,选择单元根据检测信号选择与调试单元电连接的总线。 此外,测试单元测试计算机系统并产生开机自检(POST)代码,以便所选择的总线可用于将POST代码输出到调试单元。 因此,本发明可以选择使用计算机系统中预留的总线将POST代码输出到调试单元,从而便于检查人员调试计算机系统。