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    • 2. 发明申请
    • EXPONENTIAL VOLTAGE CONVERSION SWITCHED CAPACITOR CHARGE PUMP
    • 指定电压转换开关电容充电泵
    • US20110285455A1
    • 2011-11-24
    • US12969192
    • 2010-12-15
    • Chi Wah KokOi Ying WongWing Shan Tam
    • Chi Wah KokOi Ying WongWing Shan Tam
    • G05F1/10H05K13/00
    • H02M3/073H02M2003/077Y10T29/49002
    • Described herein are switched capacitor charge pump designs for a 2n× voltage converter. The 2n× voltage converter is constructed by cascading n units of substantially identical unit cells, which are respectively composed of cross-coupled single cell doubler circuits. Dynamic inverters are used to completely activate and deactivate the power switches in the respective unit cells to increase area efficiency. The charge pump designs described herein are implemented with standard high-voltage CMOS processes without requiring MOSFET transistors with different threshold voltages, giving the charge pump a regular structure that simplifies design and layout and reduces production costs. In addition, techniques for constructing a charge pump according to the designs provided herein are described.
    • 这里描述了用于2n×电压转换器的开关电容器电荷泵设计。 2n×电压转换器通过级联n个基本相同的单元电池构成,它们分别由交叉耦合的单电池倍增电路组成。 动态逆变器用于完全激活和停用各个单元电池中的电源开关,以提高面积效率。 本文所述的电荷泵设计采用标准高压CMOS工艺实现,而不需要具有不同阈值电压的MOSFET晶体管,从而使电荷泵具有规则的结构,从而简化了设计和布局,降低了生产成本。 此外,描述了根据本文提供的设计构建电荷泵的技术。
    • 5. 发明授权
    • Exponential voltage conversion switched capacitor charge pump
    • 指数电压转换开关电容器电荷泵
    • US08362824B2
    • 2013-01-29
    • US12969192
    • 2010-12-15
    • Oi Ying WongWing Shan TamChi Wah Kok
    • Oi Ying WongWing Shan TamChi Wah Kok
    • G05F1/10
    • H02M3/073H02M2003/077Y10T29/49002
    • Described herein are switched capacitor charge pump designs for a 2n× voltage converter. The 2n× voltage converter is constructed by cascading n units of substantially identical unit cells, which are respectively composed of cross-coupled single cell doubler circuits. Dynamic inverters are used to completely activate and deactivate the power switches in the respective unit cells to increase area efficiency. The charge pump designs described herein are implemented with standard high-voltage CMOS processes without requiring MOSFET transistors with different threshold voltages, giving the charge pump a regular structure that simplifies design and layout and reduces production costs. In addition, techniques for constructing a charge pump according to the designs provided herein are described.
    • 这里描述了用于2n×电压转换器的开关电容器电荷泵设计。 2n×电压转换器通过级联n个基本相同的单元电池构成,它们分别由交叉耦合的单电池倍增电路组成。 动态逆变器用于完全激活和停用各个单元电池中的电源开关,以提高面积效率。 本文所述的电荷泵设计采用标准高压CMOS工艺实现,而不需要具有不同阈值电压的MOSFET晶体管,从而使电荷泵具有规则的结构,从而简化了设计和布局,降低了生产成本。 此外,描述了根据本文提供的设计构建电荷泵的技术。
    • 7. 发明授权
    • High current drive switched capacitor charge pump
    • 大电流驱动开关电容器电荷泵
    • US08547168B2
    • 2013-10-01
    • US13273675
    • 2011-10-14
    • Chi Wah KokOi Ying WongWing Shan Tam
    • Chi Wah KokOi Ying WongWing Shan Tam
    • G05F1/10
    • H02M3/07H02M2003/076
    • Systems, methods, and devices that employ a dynamic gate boost component (DGBC) to generate a desired boosted gate voltage to facilitate controlling an enhanced charge pump are presented. An enhanced charge pump can comprise a desired number of charge transfer switches (CTSs) and a desired number of DGBCs, wherein a DGBC can apply a desired boosted gate voltage to the gate of an associated CTS to control switching of the CTS. An auxiliary gate boost component (AGBC) of one circuit path can apply a desired boosted gate voltage to a CTS of another circuit path to control switching of that CTS. The AGBC and DGBC can operate to facilitate maintaining the overdrive voltages of all of the CTSs in the enhanced charge pump so that the overdrive voltages are essentially unchanged under various loading current conditions. Multiple enhanced charge pumps can be cascaded to produce a higher output voltage.
    • 提出了采用动态栅极升压组件(DGBC)产生所需升压栅极电压以便于控制增强型电荷泵的系统,方法和器件。 增强的电荷泵可以包括所需数量的电荷转移开关(CTS)和期望数量的DGBC,其中DGBC可以将所需的升压栅极电压施加到相关CTS的栅极以控制CTS的切换。 一个电路路径的辅助栅极升压组件(AGBC)可以将期望的升压栅极电压施加到另一个电路路径的CTS,以控制该CTS的切换。 AGBC和DGBC可以操作以便于维持增强型电荷泵中所有CTS的过驱动电压,使得过载驱动电压在各种负载电流条件下基本上不变。 多个增强型电荷泵可以级联以产生更高的输出电压。
    • 8. 发明授权
    • Gate voltage boosting element for charge pump
    • 门电压增压元件
    • US08339184B2
    • 2012-12-25
    • US12915767
    • 2010-10-29
    • Chi Wah KokOi Ying WongWing Shan Tam
    • Chi Wah KokOi Ying WongWing Shan Tam
    • G05F3/24H02M3/18
    • H03K17/687H02M3/073H02M2003/076H03K2217/0054
    • Systems, methods, and devices that generate a desired boosted gate voltage to facilitate controlling a charge pump are presented. A multi-phase charge pump (e.g., two-phase CMOS charge pump) can comprise a desired number of switch cells (SCs), wherein each SC can include a gate boost switch control component, which employs two transistors (without the need for external circuitry), and generates a desired gate voltage, based at least in part on a desired clock signal, wherein the desired gate voltage is applied to a charge transfer switch, Mc, of the SC to facilitate transferring a voltage across the Mc to a node on the other side of the Mc, in each stage of the charge pump, wherein the SCs are associated with a desired number of flying capacitors to facilitate increasing the input voltage to a desired output voltage.
    • 提出了产生期望的升压栅极电压以便于控制电荷泵的系统,方法和装置。 多相电荷泵(例如,两相CMOS电荷泵)可以包括所需数量的开关单元(SC),其中每个SC可以包括栅极升压开关控制元件,其采用两个晶体管(不需要外部 电路),并且至少部分地基于期望的时钟信号产生期望的栅极电压,其中期望的栅极电压被施加到SC的电荷转移开关Mc,以便于将跨越Mc的电压传送到节点 在Mc的另一侧,在电荷泵的每个阶段中,其中SC与期望数量的飞行电容器相关联,以便于将输入电压增加到期望的输出电压。
    • 9. 发明授权
    • Matching free dynamic digital pixel sensor
    • 匹配免费的动态数字像素传感器
    • US07969493B2
    • 2011-06-28
    • US11385313
    • 2006-03-20
    • Chi Wah Kok
    • Chi Wah Kok
    • H04N3/14
    • H04N5/37457H04N5/37455
    • An active pixel sensor includes a photosensitive device and a dynamic comparator that when coupled with a voltage ramp will form a digital pixel sensor with pulse width modulated digital output. A number of switches are included in the digital pixel sensor to configure the input of the dynamic comparator to couple with the photosensitive device or the voltage ramp such that the dynamic comparator is free from input transistor mismatch problem, as both input use the same input transistor. A cascade of dynamic comparator is disclosed in this invention, such as to improve the sensitivity and conversion speed of the digital pixel sensor. There are a number of switches that connect and isolate the digital pixel sensor from the bit line, which is shared by a plurality of digital pixel sensors in the sensor array. Photosensitive devices in close proximity can share the dynamic comparator by a number of selection switches, such that each photosensitive device can be read out in a time shared manner. Such configuration reduce the average number of transistors in each digital pixel sensor and thus the total silicon area of the sensor array, and hence the cost of production of the image sensor.
    • 有源像素传感器包括光敏器件和动态比较器,当与电压斜坡耦合时将形成具有脉宽调制数字输出的数字像素传感器。 数字像素传感器中包含许多开关,以配置动态比较器的输入以与感光器件或电压斜坡耦合,使得动态比较器不受输入晶体管失配问题的影响,因为两个输入使用相同的输入晶体管 。 在本发明中公开了一种级联的动态比较器,例如提高数字像素传感器的灵敏度和转换速度。 有许多开关将数字像素传感器与传感器阵列中的多个数字像素传感器共享的位线连接和隔离。 接近的感光装置可以通过多个选择开关共享动态比较器,使得可以以时间共享的方式读出每个感光装置。 这种配置减少了每个数字像素传感器中的晶体管的平均数量,并因此降低了传感器阵列的总硅面积,并因此降低了图像传感器的生产成本。
    • 10. 发明授权
    • D flip-flop
    • D触发器
    • US07405606B2
    • 2008-07-29
    • US11397880
    • 2006-04-03
    • Chi Wah KokYee Ching Tam
    • Chi Wah KokYee Ching Tam
    • H03K3/289
    • H03K3/012H03K3/356043H03K3/356156
    • A D flip-flop with a reduced power product or reduced clock line capacitance is disclosed. The flip-flop includes a half-static slave stage or a master stage with clock gating by the input and output. The half-static slave stage an output inverter and a feedback element consisting of a single switching transistor having a gate connected to the output of the flip-flop and the input of the inverter as its load. The clock gating circuit, which may comprise an XNOR gate, reduces the frequency of switching events by permitting clock pulses to pass into the master or slave stage only when the input and output of the flip-flop are at the same logical state.
    • 公开了具有降低的功率乘积或降低的时钟线电容的D触发器。 触发器包括半静态从站或主站,通过输入和输出具有时钟门控。 半静态从动级输出反相器和由单个开关晶体管组成的反馈元件,该开关晶体管具有连接到触发器的输出端的栅极和作为其负载的反相器的输入端。 可以包括XNOR门的时钟门控电路通过仅当触发器的输入和输出处于相同逻辑状态时才允许时钟脉冲进入主器件级或从器级,从而降低开关事件的频率。