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    • 1. 发明授权
    • Communications system with symmetrical interfaces and associated methods
    • 具有对称接口和相关方法的通信系统
    • US06775302B1
    • 2004-08-10
    • US09459439
    • 1999-12-13
    • Michael S. ShafferHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • Michael S. ShafferHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • H04J306
    • H04Q11/0478H04L2012/5674
    • A communications system includes a physical layer device (PLD) and a logical link device (LLD), each having respective send and receive interfaces being substantially identical to define symmetrical interfaces for the system. Accordingly, design and manufacturing is simplified compared to conventional systems. In addition, advantages are also provided in terms of loopback capability and packaging options. The PLD comprises a PLD send interface including PLD parallel information outputs, and a PLD receive interface including PLD parallel information inputs. Similarly, the LLD comprises an LLD receive interface including LLD parallel information inputs, and an LLD send interface including LLD parallel information outputs. Parallel communications channels connect the PLD information outputs to respective LLD information inputs, and connect the LLD information outputs to respective PLD information inputs. The PLD send interface and the LLD send interface are substantially identical, and the PLD receive interface and the LLD receive interface are substantially identical to thereby define the symmetrical interfaces for the system. In view of the symmetrical interfaces, the PLD and the LLD may operate in a push-push configuration. Deskewing features are also provided.
    • 通信系统包括物理层设备(PLD)和逻辑链路设备(LLD),每个物理层设备(LLD)各自具有相同的发送和接收接口,以定义用于系统的对称接口。 因此,与常规系统相比,设计和制造被简化。 此外,还提供了环回能力和封装选项方面的优势。 PLD包括包括PLD并行信息输出的PLD发送接口和包括PLD并行信息输入的PLD接收接口。 类似地,LLD包括包括LLD并行信息输入的LLD接收接口和包括LLD并行信息输出的LLD发送接口。 并行通信通道将PLD信息输出连接到相应的LLD信息输入,并将LLD信息输出连接到相应的PLD信息输入。 PLD发送接口和LLD发送接口基本相同,PLD接收接口和LLD接收接口基本相同,从而定义了系统的对称接口。 鉴于对称接口,PLD和LLD可以以推 - 推配置运行。 还提供脱色功能。
    • 4. 发明申请
    • Communications System with Symmetrical Interfaces and Associated Methods
    • 具有对称接口和相关方法的通信系统
    • US20090196605A1
    • 2009-08-06
    • US12346296
    • 2008-12-30
    • Michael S. ShafferHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • Michael S. ShafferHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • H04J14/00H04J3/06H04J3/04H04L12/56
    • H04Q11/0478H04L2012/5674
    • A communications system includes a physical layer device (PLD) and a logical link device (LLD), each having respective send and receive interfaces being substantially identical to define symmetrical interfaces for the system. Accordingly, design and manufacturing is simplified compared to conventional systems. In addition, advantages are also provided in terms of loopback capability and packaging options. The PLD comprises a PLD send interface including PLD parallel information outputs, and a PLD receive interface including PLD parallel information inputs. Similarly, the LLD comprises an LLD receive interface including LLD parallel information inputs, and an LLD send interface including LLD parallel information outputs. Parallel communications channels connect the PLD information outputs to respective LLD information inputs, and connect the LLD information outputs to respective PLD information inputs. The PLD send interface and the LLD send interface are substantially identical, and the PLD receive interface and the LLD receive interface are substantially identical to thereby define the symmetrical interfaces for the system. In view of the symmetrical interfaces, the PLD and the LLD may operate in a push-push configuration. Deskewing features are also provided.
    • 通信系统包括物理层设备(PLD)和逻辑链路设备(LLD),每个物理层设备(LLD)各自具有相同的发送和接收接口,以定义用于系统的对称接口。 因此,与常规系统相比,设计和制造被简化。 此外,还提供了环回能力和封装选项方面的优势。 PLD包括包括PLD并行信息输出的PLD发送接口和包括PLD并行信息输入的PLD接收接口。 类似地,LLD包括包括LLD并行信息输入的LLD接收接口和包括LLD并行信息输出的LLD发送接口。 并行通信通道将PLD信息输出连接到相应的LLD信息输入,并将LLD信息输出连接到相应的PLD信息输入。 PLD发送接口和LLD发送接口基本相同,PLD接收接口和LLD接收接口基本相同,从而定义了系统的对称接口。 鉴于对称接口,PLD和LLD可以以推 - 推配置运行。 还提供脱色功能。
    • 5. 发明授权
    • Timing recovery system
    • 定时恢复系统
    • US6134276A
    • 2000-10-17
    • US52454
    • 1998-03-31
    • Ahmad K. AmanCecil William FarrowHong JiangAgesino Primatic, Jr.Charles Albert Webb, III
    • Ahmad K. AmanCecil William FarrowHong JiangAgesino Primatic, Jr.Charles Albert Webb, III
    • H03J7/04H03L7/091H04L7/033H04L7/04H04L27/00H04L27/06H04L27/14
    • H04L7/046H03J7/04H03L7/091H04L27/066H04L7/0334H04L7/042H04L2027/0067H04L2027/0073H04L2027/0081
    • A digital timing recovery system advantageously employs both demodulated I-phase and Q-phase components to more accurately locate the synchronization signal of an incoming VSB signal. The Q-phase component is advantageously employed to detect the phase error. The use of the Q-phase component provides a more accurate measure of the phase error and results in a larger (wider) acquisition range for timing frequency offset. More specifically, the timing recovery system of this invention performs symbol clock recovery based on the VSB signal segment synchronization (sync) signal and generates a pulse density modulated (PDM) phase difference signal that controls a voltage controlled crystal oscillator (VCXO) in the phase-locked loop. This is realized, in one embodiment of the invention, by correlating received sync segment data with the known sync signal pattern and searching for "peaks" in the correlation values that are periodic at the known sync segment data rate. Once the sync pattern is found, the correlation values for adjacent samples are advantageously employed to generate the necessary feedback control signal value for the VCXO. Technical advantages of applicants' unique invention are that the need for an analog synchronous detector is eliminated, a more accurate measure than that obtained by prior known systems is obtained and a wider acquisition range is obtained for timing frequency offset.
    • 数字定时恢复系统有利地采用解调的I相和Q相分量来更准确地定位输入的VSB信号的同步信号。 Q相分量有利地用于检测相位误差。 使用Q相分量可以更准确地测量相位误差,并导致定时频率偏移的较大(较宽)采集范围。 更具体地,本发明的定时恢复系统基于VSB信号段同步(sync)信号执行符号时钟恢复,并生成在相位上控制压控晶体振荡器(VCXO)的脉冲密度调制(PDM)相位差信号 锁定环。 在本发明的一个实施例中,通过将接收到的同步段数据与已知的同步信号模式相关并在以已知的同步段数据速率周期性的相关值中搜索“峰值”来实现。 一旦找到同步模式,有利地采用相邻采样的相关值来为VCXO生成必要的反馈控制信号值。 申请人独特发明的技术优点是消除了对模拟同步检测器的需要,获得了比现有已知系统获得的更准确的测量值,并且获得了定时频率偏移的更宽的采集范围。
    • 8. 发明授权
    • Communications system and associated deskewing and word framing methods
    • 通信系统和相关的歪斜和字框架方法
    • US06819683B2
    • 2004-11-16
    • US09766079
    • 2001-01-19
    • Nevin R. JonesHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • Nevin R. JonesHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • G01R3108
    • H04L25/14H04L7/0083H04L7/04H04L7/10
    • A communications system includes N parallel communications channels connecting first and second devices. The N channels may include N−1 channels for carrying information symbols, and an Nth channel for facilitating deskewing and word framing. The first device may include an alignment symbol generator for generating alignment symbols on the Nth channel, and a word framing code generator for generating word framing codes on the Nth channel. The second device may include a deskewer for aligning received information symbols based upon the alignment symbols, and a word framer for determining word framing based upon the word framing codes. The word frame code generator in the first device or transmitter, and the word framer in the second device or receiver provide the desired feature of knowledge of where each word starts or begins. The start of each word may be determined in terms of a time and a corresponding one of the N−1 channels where the word starts. The word framing code generator may generate word framing codes comprising at least one predetermined word framing code. Alternately, the word framing code generator may generate word framing codes including at least one changeable word framing code based upon information symbols.
    • 通信系统包括连接第一和第二设备的N个并行通信信道。 N个信道可以包括用于携带信息符号的N-1个信道,以及用于促进偏斜校正和字框架的第N个信道。 第一设备可以包括用于在第N个信道上产生对齐符号的对准符号发生器,以及用于在第N个信道上产生字成帧代码的字成帧代码发生器。 第二装置可以包括用于基于对准符号对准接收到的信息符号的偏移器,以及用于基于字成帧代码确定字成帧的字成像器。 第一设备或发送器中的字代码生成器以及第二设备或接收器中的成帧器提供了每个字开始或开始的位置的所需知识特征。 可以根据时间和单词开始的N-1个频道中的相应一个来确定每个单词的开始。 单词成帧代码生成器可以生成包括至少一个预定字成帧代码的字成帧代码。 或者,字成帧代码生成器可以基于信息符号生成包括至少一个可变字成帧代码的字成帧码。
    • 9. 发明授权
    • Communications system and associated deskewing methods
    • 通讯系统及相关的歪斜方式
    • US06678842B1
    • 2004-01-13
    • US09459848
    • 1999-12-13
    • Michael S. ShafferHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • Michael S. ShafferHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • G11B500
    • H04L25/14H04L1/0061
    • A communications system includes first and second devices connected by parallel communications channels. The first device preferably comprises a string-based framing coder for determining and appending a string-based framing code to each information symbol string of information symbol strings to be transmitted in parallel over respective parallel communications channels. Each string-based framing code is preferably based upon at least some of the information symbols in the respective information symbol string. In addition, the second device preferably includes a deskewer for aligning received parallel information symbol strings based upon the string-based framing codes. In other words, the string-based framing codes and their use to align received information symbol strings permit the information symbol to be transmitted at high rates and over relatively long distances and thereby be subject skew. The information symbols may be binary bits. The string-based coder may comprise a cyclic redundancy checking (CRC) coder for determining and appending CRC codes to respective information bit strings. Thus, the deskewer may comprise a CRC framer for framing the information bit strings based upon the CRC codes.
    • 通信系统包括通过并行通信信道连接的第一和第二设备。 第一设备优选地包括基于串的成帧编码器,用于确定并将基于串的成帧代码附加到要在各个并行通信信道上并行发送的信息符号串的每个信息符号串。 每个基于字符串的成帧代码优选地基于相应信息符号串中的至少一些信息符号。 此外,第二装置优选地包括用于基于基于字符串的成帧代码对准所接收的并行信息符号串的偏移台。 换句话说,基于串的成帧代码及其用于对准接收到的信息符号串的使用允许以高速率和相对长的距离传输信息符号,从而受到偏差。 信息符号可以是二进制位。 基于串的编码器可以包括循环冗余校验(CRC)编码器,用于确定和附加到相应信息比特串的CRC码。 因此,台式电脑可以包括用于基于CRC码对信息位串进行成帧的CRC成帧器。
    • 10. 发明授权
    • Communications system with symmetrical interfaces and associated methods
    • 具有对称接口和相关方法的通信系统
    • US07486703B2
    • 2009-02-03
    • US10899078
    • 2004-07-27
    • Michael S. ShafferHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • Michael S. ShafferHimanshu Mahendra ThakerCharles Albert Webb, IIILesley Jen-Yuan Wu
    • H04J3/00
    • H04Q11/0478H04L2012/5674
    • A communications system includes a physical layer device (PLD) and a logical link device (LLD), each having respective send and receive interfaces being substantially identical to define symmetrical interfaces for the system. Accordingly, design and manufacturing is simplified compared to conventional systems. In addition, advantages are also provided in terms of loopback capability and packaging options. The PLD comprises a PLD send interface including PLD parallel information outputs, and a PLD receive interface including PLD parallel information inputs. Similarly, the LLD comprises an LLD receive interface including LLD parallel information inputs, and an LLD send interface including LLD parallel information outputs. Parallel communications channels connect the PLD information outputs to respective LLD information inputs, and connect the LLD information outputs to respective PLD information inputs. The PLD send interface and the LLD send interface are substantially identical, and the PLD receive interface and the LLD receive interface are substantially identical to thereby define the symmetrical interfaces for the system. In view of the symmetrical interfaces, the PLD and the LLD may operate in a push-push configuration. Deskewing features are also provided.
    • 通信系统包括物理层设备(PLD)和逻辑链路设备(LLD),每个物理层设备(LLD)各自具有相同的发送和接收接口,以定义用于系统的对称接口。 因此,与常规系统相比,设计和制造被简化。 此外,还提供了环回能力和封装选项方面的优势。 PLD包括包括PLD并行信息输出的PLD发送接口和包括PLD并行信息输入的PLD接收接口。 类似地,LLD包括包括LLD并行信息输入的LLD接收接口和包括LLD并行信息输出的LLD发送接口。 并行通信通道将PLD信息输出连接到相应的LLD信息输入,并将LLD信息输出连接到相应的PLD信息输入。 PLD发送接口和LLD发送接口基本相同,PLD接收接口和LLD接收接口基本相同,从而定义了系统的对称接口。 鉴于对称接口,PLD和LLD可以以推 - 推配置运行。 还提供脱色功能。