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    • 4. 发明申请
    • VIDEO SIZE CONVERSION AND TRANSCODING FROM MPEG-2 TO MPEG-4
    • 从MPEG-2到MPEG-4的视频尺寸转换和转码
    • WO0195633A3
    • 2002-08-22
    • PCT/US0140811
    • 2001-05-25
    • GEN INSTRUMENT CORPPANUSOPONE KRITCHEN XUEMIN
    • PANUSOPONE KRITCHEN XUEMIN
    • G06T9/00H04N19/40H04N21/2343H04N21/236H04N7/26
    • H04N21/23439H04N19/105H04N19/112H04N19/132H04N19/137H04N19/196H04N19/198H04N19/20H04N19/40H04N19/59H04N19/70H04N21/234309H04N21/23608
    • A transcoder architecture that provides the lowest possible complexity with a small error, e.g., for converting an MPEG-2 bitstream into an MPEG-4 bitstream. The transcoder reads header information (304) from an input bitstream and provides a corresponding header in the new format for the output bitstream. In one embodiment (Fig. 3), a low complexity front-to-back transcoder (with B frames disabled) avoids the need for motion compensation processing. In another embodiment (Fig. 4), a transcoder architecture that minimizes drift error (with B frames enabled) is provided. In another embodiment (Fig. 5), a size transcoder (with B frames enabled) is provided, e.g., to convert a bitstream of ITU-R 601 interlaced video coding with MPEG-2 MP@ ML into a simple profile MPEG-4 bitstream which contains SIF progressive video suitable for a streaming video application. For spatial downscaling of field-mode DCT blocks, vertical and horizontal downscalling tehniques are combined to use sparse matrixes to reduce computations.
    • 一种代码转换器架构,其以较小的误差提供最低可能的复杂度,例如用于将MPEG-2比特流转换为MPEG-4比特流。 代码转换器从输入比特流读取标题信息(304),并以输出比特流的新格式提供对应的报头。 在一个实施例(图3)中,低复杂度的前后转码器(禁止B帧)避免了对运动补偿处理的需要。 在另一个实施例(图4)中,提供了使漂移误差最小化(B帧启用)的代码转换器架构。 在另一个实施例(图5)中,提供了一个尺寸代码转换器(具有B帧使能),例如,将ITU-R 601隔行视频编码的比特流与MPEG-2 MP @ ML转换成简单的简档MPEG-4比特流 其中包含适用于流式视频应用的SIF渐进式视频。 对于场模式DCT块的空间缩小,垂直和水平缩小的特征被组合以使用稀疏矩阵来减少计算。
    • 7. 发明申请
    • GLOBAL MOTION ESTIMATION FOR SPRITE GENERATION
    • 全球运动估计用于生成SPRITE
    • WO0195632A3
    • 2002-06-06
    • PCT/US0117053
    • 2001-05-24
    • GEN INSTRUMENT CORPPANUSOPONE KRITCHEN XUEMIN
    • PANUSOPONE KRITCHEN XUEMIN
    • H04N7/26
    • H04N19/53H04N19/105H04N19/112H04N19/137H04N19/21H04N19/23H04N19/527H04N19/56
    • An automatic sprite generation system uses first-order prediction for initial estimation, delayed elimination for outlier rejection, and field-based sprite generation for an interlaced source. Higher-order prediction for the initial estimation may be used to handle more complicated motion. The invention addresses outlier and fast motion problems that are not handled by the existing MPEG-4 scheme. Automatic sprite generation is provided by performing shot detection (e.g., panning or zooming) on the input images to provide a group of successive images that share a common scene for use in forming a sprite. The initial estimation of motion parameter data for forming the sprite uses the motion parameter data of at least two previous input images. Delayed outlier rejection is performed in two steps by eliminating pixels whose error increases in successive sprite iterations. For interlaced input images, a sprite and set of motion parameters are encoded and transmitted for each field separately.
    • 自动子画面生成系统使用一阶预测用于初始估计,用于异常值抑制的延迟消除以及用于隔行扫描源的基于场的子画面生成。 用于初始估计的高阶预测可以用于处理更复杂的运动。 本发明解决了现有MPEG-4方案未处理的异常和快速运动问题。 通过在输入图像上执行拍摄检测(例如平移或缩放)来提供自动子画面生成,以提供共享用于形成子画面的公共场景的一组连续图像。 用于形成子画面的运动参数数据的初始估计使用至少两个先前输入图像的运动参数数据。 通过消除在连续子画面迭代中误差增加的像素,在两个步骤中执行延迟异常值抑制。 对于隔行输入图像,分别对每个场编码和发送精灵和运动参数集合。
    • 8. 发明申请
    • TRANSCODER-MULTIPLEXER (TRANSMUX) SOFTWARE ARCHITECTURE
    • TRANSCODER-MULTIPLEXER(TRANSMUX)软件体系结构
    • WO0235853A3
    • 2002-10-31
    • PCT/US0132105
    • 2001-10-15
    • GEN INSTRUMENT CORPEIFRIG ROBERT OLING FANCHEN XUEMIN
    • EIFRIG ROBERT OLING FANCHEN XUEMIN
    • H04N7/26H04N7/24H04N7/50
    • H04N19/40
    • A digital video transcoder-multiplexer (transmux) architecture that is fully software-implemented. The transmux (200) includes transcoder processing elements (TPEs) (240) that may use a very long instruction word (VLIW) media processor (105) for performing transcoding, and de-assembly and re-assembly at a transport stream level, and a co-processor (131) for providing de-assembly and re-assembly at an elementary stream level. The processors operate in parallel, at least in part, to optimize throughput and provide processing load balancing. A transmux architecture that is fully software implemented is provided to allow upgrading to handle new functions, fix hardware or software problems, test new processes, adapt to changing customer requirements, and so forth.
    • 一种完全由软件实现的数字视频转码器 - 多路复用器(反转)架构。 转换器(200)包括可以使用非常长的指令字(VLIW)媒体处理器(105)来执行转码以及在传输流级别解组装和重新组装的转码器处理元件(TPE)(240),以及 协处理器(131),用于在基本流级提供拆组和重组。 处理器至少部分并行运行,以优化吞吐量并提供处理负载平衡。 提供完全由软件实现的transmux体系结构,允许升级以处理新功能,修复硬件或软件问题,测试新流程,适应不断变化的客户需求等等。