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1. 发明申请

US20150380376A1 SURFACE FINISH FOR WIREBONDING 审中-公开
标题翻译：表面表面处理
公开(公告)号：US20150380376A1
公开(公告)日：2015-12-31
申请号：US14314260
申请日：2014-06-25
申请人： VARUGHESE MATHEW , Burton J. Carpenter , Leo M. Higgins, III , Chu-Chung Lee , Tu-Anh N. Tran
发明人： VARUGHESE MATHEW , Burton J. Carpenter , Leo M. Higgins, III , Chu-Chung Lee , Tu-Anh N. Tran
IPC分类号： H01L23/00 , H01L23/495 , H01L23/498
CPC分类号： H01L24/49 , H01L23/49582 , H01L23/49811 , H01L23/49816 , H01L23/49866 , H01L23/53238 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/85 , H01L24/92 , H01L2224/02166 , H01L2224/04042 , H01L2224/05082 , H01L2224/05147 , H01L2224/05657 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/4554 , H01L2224/45565 , H01L2224/45624 , H01L2224/45639 , H01L2224/45644 , H01L2224/45655 , H01L2224/45657 , H01L2224/45664 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/48257 , H01L2224/48463 , H01L2224/48465 , H01L2224/48471 , H01L2224/48479 , H01L2224/48482 , H01L2224/73265 , H01L2224/83101 , H01L2224/85051 , H01L2224/85207 , H01L2224/85801 , H01L2224/92247 , H01L2924/15311 , H01L2924/15747 , H01L2924/181 , H01L2924/00012 , H01L2924/00014 , H01L2924/01005 , H01L2924/01074 , H01L2924/01015 , H01L2924/01075 , H01L2924/013 , H01L2924/00013 , H01L2924/0665 , H01L2924/00
摘要： The present disclosure provides embodiments of package devices and methods for making package devices for a semiconductor die. One embodiment includes a die mounting structure having a finished bond pad that includes a copper bond pad and a cobalt-containing layer over a top surface of the copper bond pad, and a wire bond structure that is bonded to a top surface of the cobalt-containing layer of the finished bond pad, where cobalt-containing material of the cobalt-containing layer is located between a bottom surface of the wire bond structure and the top surface of the copper bond pad such that the cobalt-containing material is present under a center portion of the wire bond structure.
摘要翻译：本公开提供了用于制造用于半导体管芯的封装器件的封装器件和方法的实施例。一个实施例包括具有完成的接合焊盘的管芯安装结构，该焊接垫在铜焊盘的顶表面上包括铜接合焊盘和含钴层，以及引线键合结构，其结合到钴 - 其中含钴层的含钴材料位于引线键合结构的底表面和铜键合焊盘的顶表面之间，使得含钴材料存在于引线接合结构的中心部分。

2. 发明申请

US20150311173A1 STRUCTURES AND METHODS FOR REDUCING CORROSION IN WIRE BONDS 有权
标题翻译：用于减少电线中的腐蚀的结构和方法
公开(公告)号：US20150311173A1
公开(公告)日：2015-10-29
申请号：US14262381
申请日：2014-04-25
申请人： BURTON J. CARPENTER , CHU-CHUNG LEE , TU-ANH N. TRAN
发明人： BURTON J. CARPENTER , CHU-CHUNG LEE , TU-ANH N. TRAN
IPC分类号： H01L23/00
CPC分类号： H01L24/49 , H01L24/05 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/85 , H01L2224/05554 , H01L2224/05624 , H01L2224/431 , H01L2224/432 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45644 , H01L2224/45664 , H01L2224/45687 , H01L2224/4569 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/4845 , H01L2224/48451 , H01L2224/48456 , H01L2224/48463 , H01L2224/4847 , H01L2224/49171 , H01L2224/78301 , H01L2224/85045 , H01L2224/85439 , H01L2224/85444 , H01L2224/85931 , H01L2224/85939 , H01L2224/85947 , H01L2924/00014 , H01L2924/10161 , H01L2924/15311 , H01L2924/181 , H01L2924/013 , H01L2924/01047 , H01L2924/01024 , H01L2924/01029 , H01L2924/01079 , H01L2924/01013 , H01L2924/01014 , H01L2924/00013 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor structure includes a bond pad and a wire bond coupled to the bond pad. The wire bond includes a bond in contact with the bond pad. The wire bond includes a coating on a surface of the wire bond, and a first exposed portion of the wire bond in a selected location. The wire bond is devoid of the coating over the selected location of the wire bond, and an area of the first exposed portion is at least one square micron.
摘要翻译：半导体结构包括接合焊盘和耦合到接合焊盘的引线键合。引线键合包括与接合焊盘接触的键。引线接合包括在引线键合的表面上的涂层，以及在选定位置的引线键合的第一暴露部分。引线接合在引线键合的选定位置上没有涂层，并且第一暴露部分的面积为至少一平方微米。

3. 发明申请

US20150118791A1 METHOD FOR TREATING A BOND PAD OF A PACKAGE SUBSTRATE 有权
标题翻译：用于处理包装衬底的焊盘的方法
公开(公告)号：US20150118791A1
公开(公告)日：2015-04-30
申请号：US14069103
申请日：2013-10-31
申请人： Varughese Mathew , Burton J. Carpenter , Leo M. Higgins, III
发明人： Varughese Mathew , Burton J. Carpenter , Leo M. Higgins, III
IPC分类号： H01L23/00
CPC分类号： H01L24/05 , H01L21/4864 , H01L23/3121 , H01L23/49827 , H01L23/49866 , H01L23/49894 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/85 , H01L24/92 , H01L2224/04042 , H01L2224/05599 , H01L2224/26175 , H01L2224/2919 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48228 , H01L2224/48235 , H01L2224/48465 , H01L2224/73265 , H01L2224/85011 , H01L2224/85399 , H01L2224/85447 , H01L2224/8548 , H01L2224/85484 , H01L2224/92247 , H01L2924/00014 , H01L2924/1531 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/181 , H01L2224/48227 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A method of making a package substrate having a copper bond pad and a location for receiving a semiconductor die having a remnant of one of a group consisting of HEDP and an HEDP derivative on a top surface of the copper bond pad. The semiconductor die is attached to the substrate. A wirebond connection is attached between the remnant and the semiconductor die.
摘要翻译：一种制造具有铜键合焊盘的封装衬底的方法和用于接收在铜键合焊盘的顶表面上具有由HEDP和HEDP衍生物组成的组中的一种的残留物的半导体管芯的位置。半导体管芯附着在基板上。引线接合连接在残余物和半导体管芯之间。

4. 发明申请

US20140213018A1 METHOD FOR FORMNG A SEMICONDUCTOR DEVICE ASSEMBLY HAVING A HEAT SPREADER 有权
标题翻译：用于形成具有热扩散器的半导体器件组件的方法
公开(公告)号：US20140213018A1
公开(公告)日：2014-07-31
申请号：US13755904
申请日：2013-01-31
申请人： Leo M. Higgins III , Burton J. Carpenter
发明人： Leo M. Higgins III , Burton J. Carpenter
IPC分类号： H01L21/56
CPC分类号： H01L23/3121 , H01L21/565 , H01L23/36 , H01L23/42 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014
摘要： A method includes providing an integrated circuit (IC) die assembly that includes a substrate and an IC die mounted on a portion of a major surface of the substrate, dispensing an interface material on the IC die, positioning a portion of a heat spreader in contact with the interface material, and dispensing an adhesive between one side of the heat spreader facing the IC die assembly and exposed portions of a major surface of an encapsulant on the substrate.
摘要翻译：一种方法包括提供集成电路（IC）模具组件，其包括衬底和安装在衬底的主表面的一部分上的IC模具，在IC模具上分配界面材料，将散热器的一部分定位成接触并且在散热器的面对IC模具组件的一侧和衬底上的密封剂的主表面的暴露部分之间分配粘合剂。

5. 发明申请

US20140001632A1 SEMICONDUCTOR PACKAGE STRUCTURE HAVING AN AIR GAP AND METHOD FOR FORMING 有权
标题翻译：具有空气隙的半导体封装结构和形成方法
公开(公告)号：US20140001632A1
公开(公告)日：2014-01-02
申请号：US13537388
申请日：2012-06-29
申请人： Trent S. Uehling , Burton J. Carpenter , Brett P. Wilkerson
发明人： Trent S. Uehling , Burton J. Carpenter , Brett P. Wilkerson
IPC分类号： H01L23/498 , H01L21/56
CPC分类号： H01L24/83 , H01L23/3128 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/49171 , H01L2224/73265 , H01L2224/83002 , H01L2224/85002 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/1811 , H01L2924/18165 , H01L2924/182 , H01L2924/183 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
摘要： A package structure includes a package substrate having a top surface and a bottom surface. A semiconductor die having a top surface and a bottom surface. The semiconductor die is mounted to the package substrate. The bottom surface of the semiconductor die is adjacent to the top surface of the package substrate. An air gap is between the bottom surface of the package substrate and the bottom surface of semiconductor die.
摘要翻译：封装结构包括具有顶表面和底表面的封装衬底。一种具有顶表面和底表面的半导体管芯。将半导体管芯安装到封装衬底。半导体管芯的底表面与封装衬底的顶表面相邻。在封装衬底的底表面和半导体管芯的底表面之间存在气隙。

6. 发明授权

US07808117B2 Integrated circuit having pads and input/output (I/O) cells 有权
标题翻译：集成电路具有焊盘和输入/输出（I / O）单元
公开(公告)号：US07808117B2
公开(公告)日：2010-10-05
申请号：US11383653
申请日：2006-05-16
申请人： Nhat D. Vo , Tu-Anh N. Tran , Burton J. Carpenter , Dae Y. Hong , James W. Miller , Kendall D. Phillips
发明人： Nhat D. Vo , Tu-Anh N. Tran , Burton J. Carpenter , Dae Y. Hong , James W. Miller , Kendall D. Phillips
IPC分类号： H01L23/48
CPC分类号： H01L24/06 , H01L2224/02166 , H01L2224/05093 , H01L2224/05552 , H01L2224/05553 , H01L2224/05554 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/4943 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01079 , H01L2924/13091 , H01L2924/14 , H01L2924/00014
摘要： A pad (20) is electrically connected to a first I/O cell (14) while also physically overlying active circuitry of a second I/O cell (16). Note that although the pad (20) overlies the second I/O cell (16), the pad (20) is not electrically connected to the I/O cell (16). Such a pattern may be replicated in any desired manner so that the I/O cells (e.g. 300-310) may have a finer pitch than the corresponding pads (320-324 and 330-335). In addition, the size of the pads may be increased (e.g. pad 131 may be bigger than pad 130) while the width “c” of the I/O cells (132-135) does not have to be increased. Such a pattern (e.g. 500) may be arranged so that the area required in one or more dimensions may be minimized.
摘要翻译：垫（20）电连接到第一I / O单元（14），同时物理地覆盖第二I / O单元（16）的有源电路。注意，虽然焊盘（20）覆盖第二I / O单元（16），但是焊盘（20）不与I / O单元（16）电连接。这样的图案可以以任何期望的方式复制，使得I / O单元（例如300-310）可以具有比相应的垫（320-324和330-335）更细的间距。此外，可以增加焊盘的尺寸（例如焊盘131可能大于焊盘130），而不必增加I / O单元（132-135）的宽度“c”。这种图案（例如500）可以被布置成使得在一个或多个维度中所需的区域可以被最小化。

7. 发明授权

US10325876B2 Surface finish for wirebonding 有权
公开(公告)号：US10325876B2
公开(公告)日：2019-06-18
申请号：US14314260
申请日：2014-06-25
申请人： Varughese Mathew , Burton J. Carpenter , Leo M. Higgins, III , Chu-Chung Lee , Tu-Anh N. Tran
发明人： Varughese Mathew , Burton J. Carpenter , Leo M. Higgins, III , Chu-Chung Lee , Tu-Anh N. Tran
IPC分类号： H01L23/00 , H01L23/495 , H01L23/498 , H01L23/532
摘要： The present disclosure provides embodiments of package devices and methods for making package devices for a semiconductor die. One embodiment includes a die mounting structure having a finished bond pad that includes a copper bond pad and a cobalt-containing layer over a top surface of the copper bond pad, and a wire bond structure that is bonded to a top surface of the cobalt-containing layer of the finished bond pad, where cobalt-containing material of the cobalt-containing layer is located between a bottom surface of the wire bond structure and the top surface of the copper bond pad such that the cobalt-containing material is present under a center portion of the wire bond structure.

8. 发明申请

US20140374891A1 SEMICONDUCTOR DEVICE WITH HEAT SPREADER AND THERMAL SHEET 审中-公开
标题翻译：带散热片和热片的半导体器件
公开(公告)号：US20140374891A1
公开(公告)日：2014-12-25
申请号：US13924627
申请日：2013-06-24
申请人： Boon Yew Low , Burton J. Carpenter , Navas Khan Oratti Kalandar
发明人： Boon Yew Low , Burton J. Carpenter , Navas Khan Oratti Kalandar
IPC分类号： H01L23/495 , H01L21/56
CPC分类号： H01L23/4334 , H01L23/3128 , H01L23/49541 , H01L23/49816 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/73 , H01L2224/2929 , H01L2224/32225 , H01L2224/32245 , H01L2224/33181 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73215 , H01L2224/73265 , H01L2924/00014 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device includes a die pad and a semiconductor die having a mounting surface attached to the die pad and an opposite, active surface with die external terminals. The device has package external connectors, each having a bond region selectively electrically coupled to the die external terminals with a bond wire. A heat spreader has a first region that encloses an inner recessed region. A thermally conductive sheet is sandwiched between the inner recessed region of the heat spreader and the active surface of the die. At least the die, die external terminals, and the bond region are covered with an encapsulant.
摘要翻译：半导体器件包括管芯焊盘和半导体管芯，半导体管芯具有安装在管芯焊盘上的安装表面和具有管芯外部端子的相反的有效表面。该器件具有封装外部连接器，每个连接器具有用接合线选择性地电耦合到管芯外部端子的接合区域。散热器具有封闭内凹区域的第一区域。导热片被夹在散热器的内凹区域和模具的有效表面之间。至少模具，模具外部端子和键合区域被密封剂覆盖。

9. 发明授权

US08802508B2 Semiconductor device package 有权
标题翻译：半导体器件封装
公开(公告)号：US08802508B2
公开(公告)日：2014-08-12
申请号：US13689034
申请日：2012-11-29
申请人： Burton J. Carpenter , Boon Yew Low , Shufeng Zhao
发明人： Burton J. Carpenter , Boon Yew Low , Shufeng Zhao
IPC分类号： H01L21/82 , H01L21/56
CPC分类号： H01L21/565 , H01L23/4334 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014
摘要： Forming a packaged semiconductor device includes placing a semiconductor die attached to a carrier into a mold cavity having an injection port, wherein the semiconductor die has an encapsulant exclusion region on a top surface of the semiconductor die within an outer perimeter of the top surface; and flowing an encapsulant over the semiconductor die and carrier from the injection port, wherein the encapsulant flows around the encapsulant exclusion region to surround the encapsulant exclusion region without covering the encapsulant exclusion region. The encapsulant exclusion region has a first length corresponding to a single longest distance across the encapsulant exclusion region, wherein the first length is aligned, within 30 degrees, to a line defined by a shortest distance between an entry point of the injection port into the mold cavity and an outer perimeter of the encapsulant exclusion region.
摘要翻译：形成封装的半导体器件包括将附接到载体的半导体管芯放置到具有注入端口的模腔中，其中半导体管芯在顶表面的外周边内在半导体管芯的顶表面上具有封装排除区域; 并且将密封剂从所述注入端口流过所述半导体管芯和载体，其中所述密封剂围绕所述密封剂排除区域流动以围绕所述密封剂排除区域而不覆盖所述密封剂排除区域。密封剂排除区域具有对应于穿过密封剂排除区域的单个最长距离的第一长度，其中第一长度在30度内对准由注射端口进入模具的入口点之间的最短距离所限定的线空腔和密封剂排除区域的外周边。

10. 发明授权

US08674509B2 Integrated circuit die assembly with heat spreader 有权
标题翻译：带散热器的集成电路模具组件
公开(公告)号：US08674509B2
公开(公告)日：2014-03-18
申请号：US13485912
申请日：2012-05-31
申请人： Burton J. Carpenter , Leo M. Higgins, III
发明人： Burton J. Carpenter , Leo M. Higgins, III
IPC分类号： H01L23/48
CPC分类号： H01L23/3128 , H01L23/3135 , H01L23/367 , H01L23/42 , H01L2023/4056 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/15311 , H01L2924/1815 , H01L2924/3511 , H01L2224/45099
摘要： A packaged semiconductor device comprises a package substrate comprising a first package substrate contact and a second package substrate contact, and a semiconductor die over the package substrate. The semiconductor device further includes electrical connections between signal contact pads of the die and the package substrate, and a heat spreader that comprises a first heat spreader portion which is electrically connected to a first signal contact pad and the first package substrate contact and provides an electrical conduction path and a thermal conduction path. A second heat spreader portion provides an electrical conduction path between a second signal contact pad and the second package substrate contact and a thermal conduction path between the die and package substrate. An insulating layer is positioned between the first and second heat spreader portions.
摘要翻译：封装的半导体器件包括包括第一封装衬底触点和第二封装衬底触点的封装衬底以及封装衬底上的半导体管芯。所述半导体器件还包括在所述管芯和所述封装衬底的信号接触焊盘之间的电连接以及散热器，所述散热器包括电连接到第一信号接触焊盘的第一散热器部分和所述第一封装衬底接触并提供电传导路径和导热路径。第二散热器部分提供第二信号接触焊盘和第二封装衬底接触之间的导电路径以及管芯和封装衬底之间的热传导路径。绝缘层位于第一和第二散热器部分之间。

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