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1. 发明授权

US07201554B2 High-speed stacker 有权
标题翻译：高速堆垛机
公开(公告)号：US07201554B2
公开(公告)日：2007-04-10
申请号：US11340323
申请日：2006-01-25
申请人： Gary Wayne Hogue , Brian Cornelius Hogue , Steven M. Colligan
发明人： Gary Wayne Hogue , Brian Cornelius Hogue , Steven M. Colligan
IPC分类号： B65G57/18
CPC分类号： B65G57/035 , B65G57/06 , B65G57/10 , B65G57/18 , B65G2201/0217 , B65G2201/0282
摘要： A high-speed stacker preferably includes dual stacking arms configured to operate complementary to one another. Most preferably, an electronic control system is provided to enable precise control over the speed and positioning of the stacker arms in both horizontal and vertical orientations. Linear motion devices (such as hydraulic cylinders, screw drive linear actuators, or other devices) can be used to position the arms horizontally and vertically in response to instructions from the electronic control system. In operation, the electronic control system preferably controls the speed and ramping of the stacker arms to repeatedly move courses of material from a feed system to a stacking area at a rapid rate with little maintenance. The high-speed stacker can also be configured to operate fewer than all of the stacker arms to facilitate faster stacking of smaller courses of material.
摘要翻译：优选地，高速堆垛机包括配置成相互补充操作的双重堆叠臂。最优选地，提供电子控制系统以能够精确地控制堆垛臂在水平和垂直方向上的速度和定位。可以使用直线运动装置（例如液压缸，螺杆驱动线性致动器或其他装置）来响应于来自电子控制系统的指令水平和垂直地定位臂。在操作中，电子控制系统优选地控制堆垛臂的速度和斜坡，以便以很小的维护以快速的速度将进料系统的料料重复地移动到堆垛区域。高速堆垛机也可以配置成比所有的堆垛臂操作更少，以便更快地堆叠较小的材料。

2. 发明授权

US08292670B2 Cable interface device 有权
标题翻译：电缆接口设备
公开(公告)号：US08292670B2
公开(公告)日：2012-10-23
申请号：US13037029
申请日：2011-02-28
申请人： Thom Kreider , Mitch Fletcher , Brian Cornelius , Larry Jackson
发明人： Thom Kreider , Mitch Fletcher , Brian Cornelius , Larry Jackson
IPC分类号： H01R12/00
CPC分类号： H01R31/065 , H01R13/622 , H01R13/6658 , H01R31/005
摘要： A cable interface device is provided for physically and electronically connecting two devices. The cable interface device comprises a first pin pickup assembly electrically connectable to a first multi-pin connector of a first electronic device having a first pin geometry. The device also includes a hardware specific signal routing adapter connected electronically and physically in series with the pin pickup assembly and a second pin pickup assembly electrically connectable to a second pin connector of a second electronic device having a second pin geometry, the second pin geometry being electronically and mechanically different from the first pin geometry.
摘要翻译：提供了一种用于物理和电子连接两个设备的电缆接口设备。电缆接口装置包括可电连接到具有第一销几何形状的第一电子装置的第一多针连接器的第一销拾取组件。该设备还包括硬件专用信号路由适配器，其以电子方式和物理地与引脚拾取组件串联连接;以及第二引脚拾取组件，其电连接到具有第二引脚几何形状的第二电子器件的第二引脚连接器，第二引脚几何形状为电子和机械不同于第一针几何形状。

3. 发明授权

US08151024B2 Reconfigurable virtual backplane systems and methods 有权
标题翻译：可重构虚拟背板系统和方法
公开(公告)号：US08151024B2
公开(公告)日：2012-04-03
申请号：US12473830
申请日：2009-05-28
申请人： Bedros Nigoghosian , Mitch Fletcher , John Thompson , James Alexander Ross , Brian Cornelius
发明人： Bedros Nigoghosian , Mitch Fletcher , John Thompson , James Alexander Ross , Brian Cornelius
IPC分类号： G06F13/00 , G06F11/00
CPC分类号： H04L12/4625
摘要： Reconfigurable virtual backplane systems and methods are provided. One virtual backplane system includes a bus, and first and second line cards coupled to the bus. Each line card includes a processor including a memory storing an array of configuration tables. Each configuration table stores a listing of processes to be transmitted to or received from the communication bus, wherein a first configuration table is selected from the first line card upon the occurrence of a first event and a second configuration table is selected from the second line card upon the occurrence of a second event. One method includes connecting first and second buses in first and second systems, respectively, to form a bus for a new system. The method further includes detecting the connection of the first and second buses, and reconfiguring the first and second systems to operate as the new system in response to detecting the connection.
摘要翻译：提供了可重新配置的虚拟背板系统和方法。一个虚拟背板系统包括总线，以及耦合到总线的第一和第二线卡。每个线卡包括处理器，其包括存储配置表阵列的存储器。每个配置表存储要发送到通信总线或从通信总线接收的处理的列表，其中在第一事件发生时从第一线路卡选择第一配置表，并且从第二线路卡选择第二配置表发生第二个事件。一种方法包括分别在第一和第二系统中连接第一和第二总线，以形成用于新系统的总线。该方法还包括检测第一和第二总线的连接，并且重新配置第一和第二系统以响应于检测到连接而作为新系统来操作。

4. 发明授权

US07651314B2 High-speed stacker 有权
标题翻译：高速堆垛机
公开(公告)号：US07651314B2
公开(公告)日：2010-01-26
申请号：US11687109
申请日：2007-03-16
申请人： Gary Wayne Hogue , Brian Cornelius Hogue , Steven M Colligan
发明人： Gary Wayne Hogue , Brian Cornelius Hogue , Steven M Colligan
IPC分类号： B65G57/18
CPC分类号： B65G57/035 , B65G57/06 , B65G57/10 , B65G57/18 , B65G2201/0217 , B65G2201/0282
摘要： A high-speed stacker preferably includes dual stacking arms configured to operate complementary to one another. Most preferably, an electronic control system is provided to enable precise control over the speed and positioning of the stacker arms in both horizontal and vertical orientations. Linear motion devices (such as hydraulic cylinders, screw drive linear actuators, or other devices) can be used to position the arms horizontally and vertically in response to instructions from the electronic control system. In operation, the electronic control system preferably controls the speed and ramping of the stacker arms to repeatedly move courses of material from a feed system to a stacking area at a rapid rate with little maintenance. The high-speed stacker can also be configured to operate fewer than all of the stacker arms to facilitate faster stacking of smaller courses of material.
摘要翻译：优选地，高速堆垛机包括配置成相互补充操作的双重堆叠臂。最优选地，提供电子控制系统以能够精确地控制堆垛臂在水平和垂直方向上的速度和定位。可以使用直线运动装置（例如液压缸，螺杆驱动线性致动器或其他装置）来响应于来自电子控制系统的指令水平和垂直地定位臂。在操作中，电子控制系统优选地控制堆垛臂的速度和斜坡，以便以很小的维护以快速的速度将进料系统的料料重复地移动到堆垛区域。高速堆垛机也可以配置成比所有的堆垛臂操作更少，以便更快地堆叠较小的材料。

5. 发明授权

US07547182B2 High speed sticker placer having horizontal and vertical positioning 失效
标题翻译：高速贴纸放置器具有水平和垂直定位
公开(公告)号：US07547182B2
公开(公告)日：2009-06-16
申请号：US11169601
申请日：2005-06-28
申请人： Gary Wayne Hogue , Brian Cornelius Hogue
发明人： Gary Wayne Hogue , Brian Cornelius Hogue
IPC分类号： B65G57/00 , B65G57/22
CPC分类号： B65G57/005 , B65G57/18 , B65G2201/0282 , Y10S414/106 , Y10S414/13
摘要： A slat positioning and placing machine is preferably configured to place slats on top of or between accumulated material layers. A set of actuating arms preferably includes complementary operating slat holding holders, such as pans or other holding devices. As a first slat holder is inserting a slat into a material package being formulated, a second slat holder is preferably positioned to receive a slat. As the second slat holder is being positioned to insert the slat into the package, the first slat holder is preferably being cycled back to receive a slat. A controls methodology preferably electronically profiles the forward and rearward movement of the actuating arms. The raising and lowering functions can also be electronically profiled. The profiles can also preferably be adjusted to increase the cycle rates for various lengths being processed, and various cycling and positioning methods are contemplated. Sticker rake-off fingers can also be provided that move from a non-obstructing position to a rake-off position to help position stickers in the material package being formed.
摘要翻译：板条定位和放置机优选地构造成将板条放置在堆积的材料层之上或之间。一组致动臂优选地包括互补的操作板条保持架，例如平底锅或其它保持装置。当第一条板保持器将板条插入被配制的材料包装中时，优选地将第二板条保持器定位成接收板条。当第二条板支架被定位成将板条插入包装中时，第一板条保持器优选地循环回以接收板条。控制方法优选地电子地分析致动臂的向前和向后运动。升降功能也可以电子分析。还可以优选地调整轮廓以增加正在处理的各种长度的循环速率，并且考虑各种循环和定位方法。还可以提供贴纸耙指，其从非阻挡位置移动到耙离位置，以帮助在正在形成的材料包装中定位贴纸。

6. 发明授权

US06991423B2 High-speed stacker 失效
标题翻译：高速堆垛机
公开(公告)号：US06991423B2
公开(公告)日：2006-01-31
申请号：US10801524
申请日：2004-03-12
申请人： Gary Wayne Hogue , Brian Cornelius Hogue , Steven M. Colligan
发明人： Gary Wayne Hogue , Brian Cornelius Hogue , Steven M. Colligan
IPC分类号： B65G57/18
CPC分类号： B65G57/035 , B65G57/06 , B65G57/10 , B65G57/18 , B65G2201/0217 , B65G2201/0282
摘要： A high-speed stacker preferably includes dual stacking arms configured to operate complementary to one another. Most preferably, an electronic control system is provided to enable precise control over the speed and positioning of the stacker arms in both horizontal and vertical orientations. Linear motion devices (such as hydraulic cylinders, screw drive linear actuators, or other devices) can be used to position the arms horizontally and vertically in response to instructions from the electronic control system. In operation, the electronic control system preferably controls the speed and ramping of the stacker arms to repeatedly move courses of material from a feed system to a stacking area at a rapid rate with little maintenance. The high-speed stacker can also be configured to operate fewer than all of the stacker arms to facilitate faster stacking of smaller courses of material.
摘要翻译：优选地，高速堆垛机包括配置成相互补充操作的双重堆叠臂。最优选地，提供电子控制系统以能够精确地控制堆垛臂在水平和垂直方向上的速度和定位。可以使用直线运动装置（例如液压缸，螺杆驱动线性致动器或其他装置）来响应于来自电子控制系统的指令水平和垂直地定位臂。在操作中，电子控制系统优选地控制堆垛臂的速度和斜坡，以便以很小的维护以快速的速度将进料系统的料料重复地移动到堆垛区域。高速堆垛机也可以配置成比所有的堆垛臂操作更少，以便更快地堆叠较小的材料。

7. 发明申请

US20120220168A1 CABLE INTERFACE DEVICE 有权
标题翻译：电缆接口设备
公开(公告)号：US20120220168A1
公开(公告)日：2012-08-30
申请号：US13037029
申请日：2011-02-28
申请人： Thom Kreider , Mitch Fletcher , Brian Cornelius , Larry Jackson
发明人： Thom Kreider , Mitch Fletcher , Brian Cornelius , Larry Jackson
IPC分类号： H01R27/02
CPC分类号： H01R31/065 , H01R13/622 , H01R13/6658 , H01R31/005
摘要： A cable interface device is provided for physically and electronically connecting two devices. The cable interface device comprises a first pin pickup assembly electrically connectable to a first multi-pin connector of a first electronic device having a first pin geometry. The device also includes a hardware specific signal routing adapter connected electronically and physically in series with the pin pickup assembly and a second pin pickup assembly electrically connectable to a second pin connector of a second electronic device having a second pin geometry, the second pin geometry being electronically and mechanically different from the first pin geometry.
摘要翻译：提供了一种用于物理和电子连接两个设备的电缆接口设备。电缆接口装置包括可电连接到具有第一销几何形状的第一电子装置的第一多针连接器的第一销拾取组件。该设备还包括硬件专用信号路由适配器，其以电子方式和物理地与引脚拾取组件串联连接;以及第二引脚拾取组件，其电连接到具有第二引脚几何形状的第二电子器件的第二引脚连接器，第二引脚几何形状为电子和机械不同于第一针几何形状。

8. 发明申请

US20100306435A1 RECONFIGURABLE VIRTUAL BACKPLANE SYSTEMS AND METHODS 有权
标题翻译：可重构虚拟背景系统和方法
公开(公告)号：US20100306435A1
公开(公告)日：2010-12-02
申请号：US12473830
申请日：2009-05-28
申请人： Bedros Nigoghosian , Mitch Fletcher , John Thompson , James Alexander Ross , Brian Cornelius
发明人： Bedros Nigoghosian , Mitch Fletcher , John Thompson , James Alexander Ross , Brian Cornelius
IPC分类号： G06F13/14 , G06F13/00
CPC分类号： H04L12/4625
摘要： Reconfigurable virtual backplane systems and methods are provided. One virtual backplane system includes a bus, and first and second line cards coupled to the bus. Each line card includes a processor including a memory storing an array of configuration tables. Each configuration table stores a listing of processes to be transmitted to or received from the communication bus, wherein a first configuration table is selected from the first line card upon the occurrence of a first event and a second configuration table is selected from the second line card upon the occurrence of a second event. One method includes connecting first and second buses in first and second systems, respectively, to form a bus for a new system. The method further includes detecting the connection of the first and second buses, and reconfiguring the first and second systems to operate as the new system in response to detecting the connection.
摘要翻译：提供了可重新配置的虚拟背板系统和方法。一个虚拟背板系统包括总线，以及耦合到总线的第一和第二线卡。每个线卡包括处理器，其包括存储配置表阵列的存储器。每个配置表存储要发送到或从通信总线接收的处理的列表，其中在第一事件发生时从第一线路卡选择第一配置表，并且从第二线路卡选择第二配置表发生第二个事件。一种方法包括分别在第一和第二系统中连接第一和第二总线，以形成用于新系统的总线。该方法还包括检测第一和第二总线的连接，并且重新配置第一和第二系统以响应于检测到连接而作为新系统来操作。

9. 发明授权

US07979746B2 Dual-dual lockstep processor assemblies and modules 有权
标题翻译：双双锁定处理器组件和模块
公开(公告)号：US07979746B2
公开(公告)日：2011-07-12
申请号：US12430658
申请日：2009-04-27
申请人： Brian Cornelius , Mitch Fletcher , James Alexander Ross , David Scheid
发明人： Brian Cornelius , Mitch Fletcher , James Alexander Ross , David Scheid
IPC分类号： G06F11/00
CPC分类号： G06F1/3203 , G06F1/3287 , G06F11/1645 , G06F11/2038 , Y02D10/171 , Y02D50/20
摘要： Processor assemblies and modules are provided. One processor assembly includes first and second processors, and first and second input/output (I/O) interfaces coupled to the first and second processors. The first and/or second I/O interfaces are configured to compare outputs of the first and second processors, and render the first and second processors inactive if the outputs are different. One processor module includes first and second buses coupled to first and second processor assemblies. The first processor assembly includes first and second processors coupled to first and second I/O interfaces, wherein the first I/O interface is coupled to the first bus and the second I/O interface is coupled to the second bus. The second processor assembly includes third and fourth processors coupled to third and fourth I/O interfaces, wherein the third I/O interface is coupled to the first bus and the fourth I/O interface is coupled to the second bus.
摘要翻译：提供处理器组件和模块。一个处理器组件包括第一和第二处理器以及耦合到第一和第二处理器的第一和第二输入/输出（I / O）接口。第一和/或第二I / O接口被配置为比较第一和第二处理器的输出，并且如果输出不同，则使第一和第二处理器不活动。一个处理器模块包括耦合到第一和第二处理器组件的第一和第二总线。第一处理器组件包括耦合到第一和第二I / O接口的第一和第二处理器，其中第一I / O接口耦合到第一总线，第二I / O接口耦合到第二总线。第二处理器组件包括耦合到第三和第四I / O接口的第三和第四处理器，其中第三I / O接口耦合到第一总线，第四I / O接口耦合到第二总线。

10. 发明申请

US20100275065A1 DUAL-DUAL LOCKSTEP PROCESSOR ASSEMBLIES AND MODULES 有权
标题翻译：双双锁定装置组件和模块
公开(公告)号：US20100275065A1
公开(公告)日：2010-10-28
申请号：US12430658
申请日：2009-04-27
申请人： Brian Cornelius , Mitch Fletcher , James Alexander Ross , David Scheid
发明人： Brian Cornelius , Mitch Fletcher , James Alexander Ross , David Scheid
IPC分类号： G06F11/07 , G06F1/32
CPC分类号： G06F1/3203 , G06F1/3287 , G06F11/1645 , G06F11/2038 , Y02D10/171 , Y02D50/20
摘要： Processor assemblies and modules are provided. One processor assembly includes first and second processors, and first and second input/output (I/O) interfaces coupled to the first and second processors. The first and/or second I/O interfaces are configured to compare outputs of the first and second processors, and render the first and second processors inactive if the outputs are different. One processor module includes first and second buses coupled to first and second processor assemblies. The first processor assembly includes first and second processors coupled to first and second I/O interfaces, wherein the first I/O interface is coupled to the first bus and the second I/O interface is coupled to the second bus. The second processor assembly includes third and fourth processors coupled to third and fourth I/O interfaces, wherein the third I/O interface is coupled to the first bus and the fourth I/O interface is coupled to the second bus.
摘要翻译：提供处理器组件和模块。一个处理器组件包括第一和第二处理器以及耦合到第一和第二处理器的第一和第二输入/输出（I / O）接口。第一和/或第二I / O接口被配置为比较第一和第二处理器的输出，并且如果输出不同，则使第一和第二处理器不活动。一个处理器模块包括耦合到第一和第二处理器组件的第一和第二总线。第一处理器组件包括耦合到第一和第二I / O接口的第一和第二处理器，其中第一I / O接口耦合到第一总线，第二I / O接口耦合到第二总线。第二处理器组件包括耦合到第三和第四I / O接口的第三和第四处理器，其中第三I / O接口耦合到第一总线，第四I / O接口耦合到第二总线。

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