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    • 7. 发明授权
    • Semiconductor memory device capable of compensating for leakage current
    • 能够补偿漏电流的半导体存储器件
    • US07248494B2
    • 2007-07-24
    • US11220294
    • 2005-09-06
    • Hyung-Rok OhBaek-Hyung ChoChoong-Keun Kwak
    • Hyung-Rok OhBaek-Hyung ChoChoong-Keun Kwak
    • G11C11/00
    • G11C7/12G11C7/14G11C13/0004G11C13/0026G11C13/004G11C2013/0054G11C2213/79
    • A semiconductor memory device compensates leakage current. A plurality of memory cells is disposed at intersections of word lines and bit lines. A plurality of dummy cells is connected to at least one dummy bit line. A leakage compensation circuit is connected to the at least one dummy bit line that outputs a leakage compensation current to at least one of the bit lines. A read current supply circuit outputs a read current necessary for a read operation to at least one of the bit lines in response to a first control signal. The memory device is a phase-change memory device containing phase-change material. The semiconductor memory device compensates leakage current in a read operation and supplies the leakage compensation current to a selected bit line, thereby suppressing error operation occurrence caused by leakage current.
    • 半导体存储器件补偿漏电流。 多个存储单元设置在字线和位线的交点处。 多个虚拟单元被连接到至少一个虚拟位线。 泄漏补偿电路连接到至少一个虚拟位线,其向至少一个位线输出泄漏补偿电流。 读取电流供应电路响应于第一控制信号向至少一个位线输出读取操作所需的读取电流。 存储器件是包含相变材料的相变存储器件。 半导体存储器件在读取操作中补偿漏电流,并将泄漏补偿电流提供给所选择的位线,从而抑制由漏电流引起的误操作发生。