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1. 发明授权

US08660173B2 Video reference frame retrieval 有权
标题翻译：视频参考帧检索
公开(公告)号：US08660173B2
公开(公告)日：2014-02-25
申请号：US12923797
申请日：2010-10-07
申请人： Andreas Björklund , Erik Persson , Pontus Borg , Mats Petter Wallander
发明人： Andreas Björklund , Erik Persson , Pontus Borg , Mats Petter Wallander
IPC分类号： H04B1/66
CPC分类号： H04N19/423 , H04N19/61
摘要： A video data processing apparatus is provided comprising processing circuitry for performing video processing operations requiring access to video reference frames, and a memory management unit configured to translate virtual addresses into physical addresses. Translation circuitry is provided responsive to a memory access request for reference frame pixel data issued by the processing circuitry to perform a translation process on video reference frame information such that the set of input values for at least one hash function in the memory management unit comprises video reference frame identifier bits contained with the video reference frame information. This approach has been found to reduce the frequency of aliasing in the memory management unit when retrieving video reference frames.
摘要翻译：提供了一种视频数据处理装置，包括用于执行需要访问视频参考帧的视频处理操作的处理电路，以及被配置为将虚拟地址转换成物理地址的存储器管理单元。提供翻译电路，其响应于由处理电路发出的参考帧像素数据的存储器访问请求，以执行对视频参考帧信息的转换处理，使得存储器管理单元中的至少一个散列函数的输入值集合包括视频包含在视频参考帧信息中的参考帧标识符位。已经发现这种方法在检索视频参考帧时降低存储器管理单元中的混叠频率。

2. 发明申请

US20110087858A1 Memory management unit 有权
标题翻译：内存管理单元
公开(公告)号：US20110087858A1
公开(公告)日：2011-04-14
申请号：US12588263
申请日：2009-10-08
申请人： Erik Persson , Ola Hugosson , Andreas Björklund
发明人： Erik Persson , Ola Hugosson , Andreas Björklund
IPC分类号： G06F12/10 , G06F12/00
CPC分类号： G06F12/1018 , G06F12/1027 , G06F12/122
摘要： A data processing apparatus is provided comprising a plurality of master devices configured to issue memory access requests including virtual addresses. A memory management unit is configured to receive memory access requests and to translate a virtual address included in a memory access request from a requesting master device into a physical address indicating a storage location in memory. The memory management unit has an internal storage unit having a plurality of entries wherein indications of corresponding virtual address portions and physical address portions are stored. The memory management unit is configured to select an entry of the internal storage unit in dependence on the virtual address and an identifier of the requesting master device. Conflict between the master devices in their usage of the internal storage unit is thus avoided.
摘要翻译：提供了一种数据处理装置，包括被配置为发布包括虚拟地址的存储器访问请求的多个主设备。存储器管理单元被配置为接收存储器访问请求并将包括在存储器访问请求中的虚拟地址从请求主设备转换成指示存储器中的存储位置的物理地址。存储器管理单元具有内部存储单元，其具有多个条目，其中存储对应的虚拟地址部分和物理地址部分的指示。存储器管理单元被配置为根据虚拟地址和请求主设备的标识符来选择内部存储单元的条目。因此避免了主设备在使用内部存储单元时的冲突。

3. 发明授权

US08924686B2 Memory management unit 有权
标题翻译：内存管理单元
公开(公告)号：US08924686B2
公开(公告)日：2014-12-30
申请号：US12588263
申请日：2009-10-08
申请人： Erik Persson , Ola Hugosson , Andreas Björklund
发明人： Erik Persson , Ola Hugosson , Andreas Björklund
IPC分类号： G06F12/00 , G06F9/26 , G06F9/34 , G06F12/10
CPC分类号： G06F12/1018 , G06F12/1027 , G06F12/122
摘要： A data processing apparatus is provided comprising a plurality of master devices configured to issue memory access requests including virtual addresses. A memory management unit is configured to receive memory access requests and to translate a virtual address included in a memory access request from a requesting master device into a physical address indicating a storage location in memory. The memory management unit has an internal storage unit having a plurality of entries wherein indications of corresponding virtual address portions and physical address portions are stored. The memory management unit is configured to select an entry of the internal storage unit in dependence on the virtual address and an identifier of the requesting master device. Conflict between the master devices in their usage of the internal storage unit is thus avoided.
摘要翻译：提供了一种数据处理装置，包括被配置为发布包括虚拟地址的存储器访问请求的多个主设备。存储器管理单元被配置为接收存储器访问请求并将包括在存储器访问请求中的虚拟地址从请求主设备转换成指示存储器中的存储位置的物理地址。存储器管理单元具有内部存储单元，其具有多个条目，其中存储对应的虚拟地址部分和物理地址部分的指示。存储器管理单元被配置为根据虚拟地址和请求主设备的标识符来选择内部存储单元的条目。因此避免了主设备在使用内部存储单元时的冲突。

4. 发明授权

US08661225B2 Data processing apparatus and method for handling vector instructions 有权
标题翻译：用于处理向量指令的数据处理装置和方法
公开(公告)号：US08661225B2
公开(公告)日：2014-02-25
申请号：US12656152
申请日：2010-01-19
申请人： Andreas Björklund , Erik Persson , Ola Hugosson
发明人： Andreas Björklund , Erik Persson , Ola Hugosson
IPC分类号： G06F15/00
CPC分类号： G06F9/30072 , G06F9/30036 , G06F9/30069 , G06F9/3887
摘要： A data processing apparatus and method and provided for handling vector instructions. The data processing apparatus has a register data store with a plurality of registers arranged to store data elements. A vector processing unit is then used to execute a sequence of vector instructions, with the vector processing unit having a plurality of lanes of parallel processing and having access to the register data store in order to read data elements from, and write data elements to, the register data store during the execution of the sequence of vector instructions. A skip indication storage maintains a skip indicator for each of the lanes of parallel processing. The vector processing unit is responsive to a vector skip instruction to perform an update operation to set within the skip indication storage the skip indicator for a determined one or more lanes. The vector processing unit is responsive to a vector operation instruction to perform an operation in parallel on data elements input to the plurality of lanes of parallel processing, but to exclude from the performance of the operation any lane whose associated skip indicator is set. This allows the operation specified by vector instructions to be performed conditionally within each of the lanes of parallel processing without any modification to the vector instructions that are specifying those operations.
摘要翻译：一种用于处理向量指令的数据处理装置和方法。数据处理装置具有寄存器数据存储器，其具有多个用于存储数据元素的寄存器。然后，矢量处理单元用于执行矢量指令序列，其中矢量处理单元具有多个并行处理通道，并且能够访问寄存器数据存储器，以便从数据元素读取数据元素，在执行向量指令序列期间的寄存器数据存储。跳过指示存储保持每个并行处理通道的跳过指示符。向量处理单元响应于向量跳过指令执行更新操作，以在跳过指示存储内设置用于所确定的一个或多个车道的跳过指示符。向量处理单元响应于矢量操作指令，并行地对输入到多个并行处理通道的数据元素执行操作，但是从执行操作排除任何相关联的跳过指示符被设置的通道。这允许在并行处理的每个通道内有条件地执行由向量指令指定的操作，而不对指定这些操作的向量指令进行任何修改。

5. 发明授权

US08375196B2 Vector processor with vector register file configured as matrix of data cells each selecting input from generated vector data or data from other cell via predetermined rearrangement path 有权
标题翻译：向量处理器，其向量寄存器文件被配置为数据单元的矩阵，每个数据单元通过预定的重排路径从产生的矢量数据或来自其它单元的数据中选择输入
公开(公告)号：US08375196B2
公开(公告)日：2013-02-12
申请号：US12656156
申请日：2010-01-19
申请人： Andreas Björklund , Erik Persson , Ola Hugosson
发明人： Andreas Björklund , Erik Persson , Ola Hugosson
IPC分类号： G06F17/16
CPC分类号： G06F9/30141 , G06F9/30032 , G06F9/30036 , G06F9/30109 , G06F9/3826 , G06F9/3836
摘要： A data processing apparatus includes a vector register bank having a plurality of vector registers, each register including a plurality of storage cells, each cell storing a data element. A vector processing unit is provided for executing a sequence of vector instructions. The processing unit is arranged to issue a set rearrangement enable signal to the vector register bank. The write interface of the vector register bank is modified to provide not only a first input for receiving the data elements generated by the vector processing unit during normal execution, but also has a second input coupled via a data rearrangement path to the matrix of storage cells via which the data elements currently stored in the matrix of storage cells are provided to the write interface in a rearranged form representing the arrangement of data elements that would be obtained by performance of the predetermined rearrangement operation.
摘要翻译：数据处理装置包括具有多个向量寄存器的向量寄存器组，每个寄存器包括多个存储单元，每个单元存储数据元素。提供了用于执行向量指令序列的向量处理单元。处理单元被布置成向向量寄存器组发出一个置位重排使能信号。修改向量寄存器组的写接口，不仅提供用于在正常执行期间接收由向量处理单元生成的数据元素的第一输入，还具有经由数据重排路径耦合到存储单元矩阵的第二输入通过其将当前存储在存储单元的矩阵中的数据元素以重新排列的形式提供给写入接口，表示通过执行预定重新排列操作将获得的数据元素的布置。

6. 发明授权

US06667695B2 Position code 有权
公开(公告)号：US06667695B2
公开(公告)日：2003-12-23
申请号：US10178573
申请日：2002-06-25
申请人： Mats Petter Pettersson , Andreas Björklund
发明人： Mats Petter Pettersson , Andreas Björklund
IPC分类号： H03M122
CPC分类号： G06F3/03545 , G06F3/0321
摘要： In a method for position coding, positions are coded in a first dimension on a surface in accordance with a primary number sequence that has the property that the place in the primary number sequence of each partial sequence of a first predetermined length is unambiguously determined. Each position in the first dimension is coded by one of the partial sequences. The primary number sequence is built up of at least two secondary number sequences that have a smaller base than the base of the primary number sequence and that are used for determination of the partial sequences of the primary number sequence which correspond to the positions in the first dimension. This makes possible, among other things, realization of the method in devices with limited memory capacity, as the secondary number sequences require less memory in total than the primary number sequence. The secondary number sequences can also be used for decoding the position code.

7. 发明申请

US20140055421A1 TRACKING OBJECTS ON A TOUCH SURFACE 有权
标题翻译：在触摸表面追踪对象
公开(公告)号：US20140055421A1
公开(公告)日：2014-02-27
申请号：US14004323
申请日：2012-12-10
申请人： Tomas Christiansson , Nicklas Ohlsson , Andreas Björklund , Mats Petter Wallander
发明人： Tomas Christiansson , Nicklas Ohlsson , Andreas Björklund , Mats Petter Wallander
IPC分类号： G06F3/041 , G06F3/042
CPC分类号： G06F3/0418 , G06F3/0421 , G06F2203/04109
摘要： A device implements a method of tracking objects on a touch surface of an FTIR based touch-sensitive apparatus. The method repeatedly operates to generate an interaction pattern that indicates local changes in interaction on the touch surface, identify apparent peaks in the interaction pattern, and update existing movement trajectories based on the apparent peaks. An error suppression process is executed at least intermittently in the method to process the apparent peaks and/or the existing movement trajectories to identify implicated trajectories with a potential tracking problem, define two or more movement propositions for each implicated trajectory, and cause an evaluation of the movement propositions in one or more subsequent repetitions of the method. The error suppression process improves tracking by postponing the final decision on how to track the object of the implicated trajectory until more information is available.
摘要翻译：设备实现了在基于FTIR的触敏设备的触摸表面上跟踪对象的方法。该方法重复操作以产生指示触摸表面上的交互的局部变化的交互模式，识别交互模式中的明显峰值，并且基于表观峰值来更新现有移动轨迹。至少在方法中执行误差抑制过程以处理表观峰值和/或现有移动轨迹以识别具有潜在跟踪问题的牵连轨迹，为每个牵连轨迹定义两个或更多个运动命题，并且引起对在该方法的一个或多个后续重复中的运动命题。误差抑制过程通过延迟关于如何跟踪牵连轨迹的对象的最终决定来改进跟踪，直到有更多信息可用。

8. 发明申请

US20110080959A1 Video reference frame retrieval 有权
标题翻译：视频参考帧检索
公开(公告)号：US20110080959A1
公开(公告)日：2011-04-07
申请号：US12923797
申请日：2010-10-07
申请人： Andreas Björklund , Erik Persson , Pontus Borg , Mats Petter Wallander
发明人： Andreas Björklund , Erik Persson , Pontus Borg , Mats Petter Wallander
IPC分类号： H04N5/14 , H04N7/26
CPC分类号： H04N19/423 , H04N19/61
摘要： A video data processing apparatus is provided comprising processing circuitry for performing video processing operations requiring access to video reference frames, and a memory management unit configured to translate virtual addresses into physical addresses. Translation circuitry is provided responsive to a memory access request for reference frame pixel data issued by the processing circuitry to perform a translation process on video reference frame information such that the set of input values for at least one hash function in the memory management unit comprises video reference frame identifier bits contained with the video reference frame information. This approach has been found to reduce the frequency of aliasing in the memory management unit when retrieving video reference frames.
摘要翻译：提供了一种视频数据处理装置，包括用于执行需要访问视频参考帧的视频处理操作的处理电路，以及被配置为将虚拟地址转换成物理地址的存储器管理单元。提供翻译电路，其响应于由处理电路发出的参考帧像素数据的存储器访问请求，以执行对视频参考帧信息的转换处理，使得存储器管理单元中的至少一个散列函数的输入值集合包括视频包含在视频参考帧信息中的参考帧标识符位。已经发现这种方法在检索视频参考帧时降低存储器管理单元中的混叠频率。

9. 发明申请

US20100312988A1 Data processing apparatus and method for handling vector instructions 有权
标题翻译：用于处理向量指令的数据处理装置和方法
公开(公告)号：US20100312988A1
公开(公告)日：2010-12-09
申请号：US12656152
申请日：2010-01-19
申请人： Andreas BJÖRKLUND , Erik Persson , Ola Hugosson
发明人： Andreas BJÖRKLUND , Erik Persson , Ola Hugosson
IPC分类号： G06F15/00
CPC分类号： G06F9/30072 , G06F9/30036 , G06F9/30069 , G06F9/3887
摘要： A data processing apparatus and method and provided for handling vector instructions. The data processing apparatus has a register data store with a plurality of registers arranged to store data elements. A vector processing unit is then used to execute a sequence of vector instructions, with the vector processing unit having a plurality of lanes of parallel processing and having access to the register data store in order to read data elements from, and write data elements to, the register data store during the execution of the sequence of vector instructions. A skip indication storage maintains a skip indicator for each of the lanes of parallel processing. The vector processing unit is responsive to a vector skip instruction to perform an update operation to set within the skip indication storage the skip indicator for a determined one or more lanes. The vector processing unit is responsive to a vector operation instruction to perform an operation in parallel on data elements input to the plurality of lanes of parallel processing, but to exclude from the performance of the operation any lane whose associated skip indicator is set. This allows the operation specified by vector instructions to be performed conditionally within each of the lanes of parallel processing without any modification to the vector instructions that are specifying those operations.
摘要翻译：一种用于处理向量指令的数据处理装置和方法。数据处理装置具有寄存器数据存储器，其具有多个用于存储数据元素的寄存器。然后，矢量处理单元用于执行矢量指令序列，其中矢量处理单元具有多个并行处理通道，并且能够访问寄存器数据存储器，以便从数据元素读取数据元素，在执行向量指令序列期间的寄存器数据存储。跳过指示存储保持每个并行处理通道的跳过指示符。向量处理单元响应于向量跳过指令执行更新操作，以在跳过指示存储内设置用于所确定的一个或多个车道的跳过指示符。向量处理单元响应于矢量操作指令，并行地对输入到多个并行处理通道的数据元素执行操作，但是从执行操作排除任何相关联的跳过指示符被设置的通道。这允许在并行处理的每个通道内有条件地执行由向量指令指定的操作，而不对指定这些操作的向量指令进行任何修改。

10. 发明申请

US20120051437A1 Reducing reference frame data store bandwidth requirements in video decoders 有权
标题翻译：在视频解码器中减少参考帧数据存储带宽要求
公开(公告)号：US20120051437A1
公开(公告)日：2012-03-01
申请号：US12923083
申请日：2010-08-31
申请人： Andreas Björklund , Ola Hugosson
发明人： Andreas Björklund , Ola Hugosson
IPC分类号： H04N7/12
CPC分类号： H04N19/423 , H04N19/44
摘要： A video processing apparatus, method and computer program are disclosed. The video processing apparatus comprises: first stage video processing circuitry for receiving a bitstream of compressed encoded video data representing a plurality of frames of video data and configured to perform one or more processing operations on the input compressed video data; analysing circuitry configured to analyse the processed bitstream and to determine for at least one of the plurality of frames at least one portion of the at least one frame that is not required in the decoding of other frames and to generate at least one indicator indicating the at least one portion. The frame reconstruction processing circuitry is configured to perform frame reconstruction on the compressed encoded video data and to receive the at least one indicator and to generate at least one partial reference frame for use in decoding other frames from the bitstream and the at least one indicator, the frame reconstruction processing circuitry being configured to determine from the at least one indicator the at least one portion that is not required for decoding other frames and to generate the partial reference frame as a frame that does not include the at least one portion and to output the partial reference frame for use in decoding the other frames.
摘要翻译：公开了一种视频处理装置，方法和计算机程序。视频处理装置包括：第一级视频处理电路，用于接收表示多个视频数据帧的压缩编码视频数据的比特流，并配置为对输入的压缩视频数据执行一个或多个处理操作; 分析电路，被配置为分析所处理的比特流，并且为所述多个帧中的至少一个帧确定所述至少一个帧中的至少一个部分，所述至少一个部分在其他帧的解码中不是必需的，并且生成至少一个指示至少一部分。帧重建处理电路被配置为对压缩的编码视频数据执行帧重构并且接收至少一个指示符并且生成用于从比特流和至少一个指示符解码其他帧的至少一个部分参考帧，所述帧重建处理电路被配置为从所述至少一个指示符确定所述至少一个部分，所述至少一个部分不是解码其他帧所必需的，并且将所述部分参考帧生成为不包括所述至少一个部分的帧，并且输出用于解码其他帧的部分参考帧。

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