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1. 发明申请

US20110227738A1 WEARABLE ELECTRONIC GROUND INTEGRITY MONITOR 审中-公开
标题翻译：可靠的电子接地完整性监控
公开(公告)号：US20110227738A1
公开(公告)日：2011-09-22
申请号：US13048354
申请日：2011-03-15
申请人： Guy T. McIlroy , Bruce C. Lundeen , Ching Chieh Allen Wu , Cuong Tran , Robin Chung
发明人： Guy T. McIlroy , Bruce C. Lundeen , Ching Chieh Allen Wu , Cuong Tran , Robin Chung
IPC分类号： G08B23/00
CPC分类号： A61N1/14
摘要： A device that can electronically track operator ground connectivity to; a) provide continuous visual and/or auditory indication of connection state, b) optionally provide that the ground connectivity state may be monitored and displayed remotely using RF communications, and c) optionally provide that the operators device can track RFID ‘follower’ tags specifically placed to facilitate work-flow data recording and the correlation of the operators activities with specific work-flow process.
摘要翻译：可以电子跟踪操作员地面连接的设备; a）提供连接状态的连续视觉和/或听觉指示，b）可选地提供可以使用RF通信远程监视和显示地面连接状态，以及c）可选地提供操作者设备可以专门跟踪RFID“跟随者” 用于促进工作流程数据记录和操作员活动与具体工作流程过程的相关性。

2. 发明授权

US5844818A Method for creating and using design shells for integrated circuit designs 失效
标题翻译：用于创建和使用集成电路设计的设计外壳的方法
公开(公告)号：US5844818A
公开(公告)日：1998-12-01
申请号：US627823
申请日：1996-05-10
申请人： Dan Kochpatcharin , Zarir B. Sarkari , Christian Joly , Allen Wu
发明人： Dan Kochpatcharin , Zarir B. Sarkari , Christian Joly , Allen Wu
IPC分类号： H01L21/82 , G06F17/50 , G06F9/455
CPC分类号： G06F17/5022
摘要： A method for creating a shell to represent a functional block of an IC design comprising of a plurality of interconnected functional blocks. The critical information from a synthesized gate level block is retained in the shell such that when analyzing the static characteristics of another block connected to the block now represented by the shell the analysis is still accurate. At a hierarchial level the present invention provides a method for analyzing the functional blocks of an IC design such that the memory requirement for storing the information of the functional blocks of the IC design is reduced as well as a decrease in run time.
摘要翻译：一种用于创建壳体以表示由多个互连的功能块组成的IC设计的功能块的方法。来自合成门级别块的关键信息保留在外壳中，使得当分析连接到现在由外壳表示的块的另一个块的静态特性时，分析仍然是准确的。本发明提供了一种用于分析IC设计的功能块的方法，从而降低了存储IC设计的功能块的信息的存储器需求以及运行时间的减少。

3. 发明授权

US5307375A Two stage accumulator for use in updating coefficients 失效
标题翻译：用于更新系数的两级累加器
公开(公告)号：US5307375A
公开(公告)日：1994-04-26
申请号：US973430
申请日：1992-11-19
申请人： Allen Wu , Woo H. Paik
发明人： Allen Wu , Woo H. Paik
IPC分类号： H03H15/00 , G06F7/50 , G06F7/509 , G06F7/62 , H03H17/00 , H03H21/00 , H04B3/06 , H03K5/159
CPC分类号： G06F7/5095 , G06F7/62
摘要： A two stage accumulator is provided for updating coefficients. The accumulator is particularly useful in an adaptive equalizer. A first stage of the accumulator receives an error word and outputs sign and carry bits resulting from the addition of the error word and an N-bit LSB portion of a larger M-bit coefficient. A second stage is responsive to the sign and carry bits for updating the (M-N) MSB's of the M-bit coefficient. New error words are cyclically provided to the first stage during successive coefficient update cycles. The first stage can be implemented using an N-bit twos complement adder. The second stage can be implemented using an up/down counter. A leakage function is provided by causing the up/down counter to periodically skip over increment and decrement cycles.
摘要翻译：提供两级累加器用于更新系数。累加器在自适应均衡器中特别有用。累加器的第一级接收错误字，并输出符号并携带由误差字的相加和较大M位系数的N位LSB部分产生的位。第二级响应于符号并携带用于更新M位系数的（M-N）个MSB的位。在连续系数更新周期期间，新的错误字被循环地提供给第一级。第一级可以使用N位二进制补码加法器来实现。第二阶段可以使用向上/向下计数器来实现。通过使上/下计数器周期性地跳过增量和递减周期来提供泄漏功能。

4. 发明授权

US10660951B2 Antibody recognizing arbitrarily designed epitope of three or more amino acid residues in a peptide and method of generating thereof 有权
公开(公告)号：US10660951B2
公开(公告)日：2020-05-26
申请号：US13621626
申请日：2012-09-17
申请人： Zhiwei Allen Wu , Xilin Wu
发明人： Zhiwei Allen Wu , Xilin Wu
IPC分类号： A61K39/00 , A61K39/12 , A61K39/21 , A61K39/245 , A61K38/00
摘要： Peptide vaccine that is a mixture of different peptide species, where each species has a number of fixed amino acid residues and a number of randomized residues. The fixed resides are the same amino acid residues at the corresponding positions in each species of the mixture while the randomized residues are randomly any available candidate amino acids chosen by design. The degree of randomization may be also been chosen according to the design under a particular situation. This type of peptide vaccines have shown to be able to induce highly specific antibodies against epitopes that are otherwise difficult to induce antibodies in vitro, for example the GPG triplet in the V3 of HIV-1 gp120.

5. 发明申请

US20170365011A1 GARMENT SHARING INFRASTRUCTURE 审中-公开
公开(公告)号：US20170365011A1
公开(公告)日：2017-12-21
申请号：US15186002
申请日：2016-06-17
申请人： Adrik Robert McIlroy , James Bernstein , Allen Wu , Guy Mcllroy , Angel Allaire , Luke Boyle , Phil Rizzo , Drew Rizzo
发明人： Adrik Robert McIlroy , James Bernstein , Allen Wu , Guy Mcllroy , Angel Allaire , Luke Boyle , Phil Rizzo , Drew Rizzo
IPC分类号： G06Q50/00 , G06Q30/02
CPC分类号： G06Q50/01 , G06Q30/0214 , G06Q30/0231
摘要： A system comprising a software application which can be installed on communications devices to create a social network where users can share the contents of their real closet and their aspirational closet including vendor item combined with a means for vendors to tap into said social network and suggest combinations of clothing and accessories including items for purchase to complete the look.

6. 发明申请

US20140079735A1 ANTIBODY RECOGNIZING ARBITRARILY DESIGNED EPITOPE OF THREE OR MORE AMINO ACID RESIDUES IN A PEPTIDE AND METHOD OF GENERATING THEREOF 审中-公开
标题翻译：三肽或更多的氨基酸残基的抗体识别ARBITRARILY设计的抗原肽及其产生方法
公开(公告)号：US20140079735A1
公开(公告)日：2014-03-20
申请号：US13621626
申请日：2012-09-17
申请人： Zhiwei (Allen) Wu , Xilin Wu
发明人： Zhiwei (Allen) Wu , Xilin Wu
IPC分类号： A61K39/21
CPC分类号： A61K39/21 , A61K39/12 , C12N2740/16034 , C12N2740/16134 , C12N2760/16034 , C12N2770/24234
摘要： Peptide vaccine that is a mixture of different peptide species, where each species has a number of fixed amino acid residues and a number of randomized residues. The fixed resides are the same amino acid residues at the corresponding positions in each species of the mixture while the randomized residues are randomly any available candidate amino acids chosen by design. The degree of randomization may be also been chosen according to the design under a particular situation. This type of peptide vaccines have shown to be able to induce highly specific antibodies against epitopes that are otherwise difficult to induce antibodies in vitro, for example the GPG triplet in the V3 of HIV-1 gp120.
摘要翻译：肽疫苗是不同肽种的混合物，其中每个物种具有多个固定的氨基酸残基和多个随机残基。固定位置在混合物的每个种类中的相应位置处是相同的氨基酸残基，而随机残基是随机选择的任何可选的候选氨基酸。随机化程度也可以根据特定情况下的设计选择。已证明，这种类型的肽疫苗能够诱导针对另外难以在体外诱导抗体的表位的高度特异性抗体，例如HIV-1 gp120 V3的GPG三联体。

7. 发明授权

US5644498A Timing shell generation through netlist reduction 失效
标题翻译：通过网表减少定时shell生成
公开(公告)号：US5644498A
公开(公告)日：1997-07-01
申请号：US377844
申请日：1995-01-25
申请人： Christian Joly , Francois Ducaroir , Zarir Sarkari , Allen Wu
发明人： Christian Joly , Francois Ducaroir , Zarir Sarkari , Allen Wu
IPC分类号： H01L21/82 , G06F17/50 , G06F15/00
CPC分类号： G06F17/5031
摘要： Gate level netlists used for timing analysis in integrated circuit design are reduced using a timing shell generator while preserving critical information for timing analysis. After verification of timings, the gate level netlist is convened into a shell containing block boundary information. The function of the shell generator is to delete internal cells meeting a set of criteria. The result is a shell netlist containing a subset of the original netlist. Thus, the design cycle time involved and computing time and resources needed in ASIC development for chips using circuits represented by timing shell netlists are decreased by substituting design verification at the top level of large hierarchical netlists or large flat netlists by bottom up verification procedures using timing shells.
摘要翻译：集成电路设计中用于定时分析的门级网表使用定时外壳生成器减少，同时保留了时序分析的关键信息。在验证定时之后，门级网表被调入包含块边界信息的外壳。 shell生成器的功能是删除符合一组条件的内部单元格。结果是包含原始网表的子集的shell网表。因此，使用由时序壳网表表示的电路的芯片的ASIC开发所需的设计周期时间和计算时间和资源通过使用定时从底层向上验证程序替代大型分层网表或大型平面网表的顶层的设计验证而减少贝壳。

8. 发明授权

US5376968A Adaptive compression of digital video data using different modes such as PCM and DPCM 失效
标题翻译：使用不同模式（如PCM和DPCM）对数字视频数据进行自适应压缩
公开(公告)号：US5376968A
公开(公告)日：1994-12-27
申请号：US23251
申请日：1993-03-11
申请人： Allen Wu , Edward A. Krause , Woo H. Paik
发明人： Allen Wu , Edward A. Krause , Woo H. Paik
IPC分类号： H04N7/30 , G06T9/00 , H03M7/30 , H04N7/26 , H04N7/32 , H04N7/36 , H04N7/50 , H04N7/137
CPC分类号： H04N19/90 , H04N19/12 , H04N19/186 , H04N19/503 , H04N19/51 , H04N19/517 , H04N19/61
摘要： Digital video signals are adaptively compressed for communication to a receiver. Superblocks, each containing a plurality of blocks of digital video data, are compressed using PCM, DPCM with a general motion vector for the entire superblock, and DPCM with a specific motion vector for each block contained within a superblock. The result of each compression mode is compared after accounting for overhead data, to determine which results in the least amount of data for each block. These blocks are assembled into a superblock, and compared together with necessary overhead and motion vector data to the same superblock processed using all PCM as well as the superblock processed using all DPCM. The comparison determines which compression mode produces the least amount of data for the superblock. The most compact superblock is selected for transmission. The transmitted superblocks are decoded by a decoder that recovers the necessary motion vectors and overhead information which identifies the type of compression used to provide the superblock.
摘要翻译：数字视频信号被自适应地压缩以用于与接收机的通信。使用具有用于整个超块的通用运动矢量的PCM，DPCM以及包含在超级块内的每个块的特定运动矢量的DPCM对每个包含多个数字视频数据块的超块进行压缩。在计算开销数据后，对每个压缩模式的结果进行比较，以确定每个块的数据量最少的结果。这些块被组装成超级块，并且与必要的开销和运动矢量数据一起与使用所有PCM处理的相同的超级块以及使用所有DPCM处理的超级块进行比较。该比较确定哪个压缩模式为超级块产生最少量的数据。选择最紧凑的超级块进行传输。发送的超块被解码器解码，该解码器恢复必要的运动矢量和标识用于提供超级块的压缩类型的开销信息。

9. 发明授权

US5243624A Method and apparatus for updating coefficients in a complex adaptive equalizer 失效
标题翻译：用于在复杂自适应均衡器中更新系数的方法和装置
公开(公告)号：US5243624A
公开(公告)日：1993-09-07
申请号：US733791
申请日：1991-07-26
申请人： Woo H. Paik , Scott A. Lery , Allen Wu
发明人： Woo H. Paik , Scott A. Lery , Allen Wu
IPC分类号： H03H21/00 , H03H15/00 , H03H17/00 , H04B3/06 , H04L25/03 , H04L27/01
CPC分类号： H04L25/03038 , H04L2025/0342 , H04L2025/03477 , H04L2025/03617
摘要： Convergence of a complex adaptive equalizer used in digital communications is substantially improved by updating all coefficients of the equalizer during each filter clock cycle. Complex signal data is passed through a plurality of successive delay stages to provide N sets of delayed complex signal data. The product of each set and a complex error signal is obtained. Each product is concurrently updated with previous product data for the set to provide N sets of updated complex coefficients for selective input to equalizer filters. In an illustrated embodiment, the updated coefficients are truncated and their gain is adjusted prior to input to the filters. The updated coefficients can be multiplexed to provide a clocked stream of coefficient sets for input to the equalizer filters. A VLSI implementation of the equalizer is also disclosed.

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