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1. 发明申请

US20080072013A1 Microprocessor starting to execute a computer program at a predetermined interval 有权
标题翻译：微处理器以预定间隔开始执行计算机程序
公开(公告)号：US20080072013A1
公开(公告)日：2008-03-20
申请号：US11902365
申请日：2007-09-20
申请人： Tsuyoshi Yamamoto , Takayuki Matsuda , Akimasa Niwa
发明人： Tsuyoshi Yamamoto , Takayuki Matsuda , Akimasa Niwa
IPC分类号： G06F9/30 , G06F15/76
CPC分类号： G06F9/3851 , G06F9/30101 , G06F9/321 , G06F9/4843
摘要： A microprocessor which is adapted to start a second task at a predetermined time when a first task is running if a current time becomes to be equal to the predetermined time is disclosed. The microprocessor executing an instruction read out from a program address updated every time when each execution of instruction is completed, includes update ceasing means for ceasing the program address from being updated when an stopping time comes in order to abort a first task defined by a first computer program and overwriting means for overwriting the program address with an initial address of a second computer program when a predetermined time comes in order to start to execute a second task defined by the second computer program at the predetermined time.
摘要翻译：公开了一种微处理器，其适于在当前时间变得等于预定时间时在第一任务正在运行的预定时间开始第二任务。执行从每次完成指令时更新的程序地址读出的指令的微处理器包括当停止时间到来时停止程序地址被更新的更新停止装置，以便中止由第一计算机程序和重写装置，用于在预定时间到来时用第二计算机程序的初始地址重写程序地址，以便在预定时间开始执行由第二计算机程序定义的第二任务。

2. 发明申请

US20060155976A1 Processor, microcomputer and method for controlling program of microcomputer 有权
标题翻译：微机控制程序的处理器，微机及方法
公开(公告)号：US20060155976A1
公开(公告)日：2006-07-13
申请号：US11312830
申请日：2005-12-21
申请人： Naoki Ito , Masahiro Kamiya , Hideaki Ishihara , Akimasa Niwa , Takayuki Matsuda , Toshihiko Matsuoka
发明人： Naoki Ito , Masahiro Kamiya , Hideaki Ishihara , Akimasa Niwa , Takayuki Matsuda , Toshihiko Matsuoka
IPC分类号： G06F9/44
CPC分类号： G06F9/3851 , G06F9/3842 , G06F9/3861
摘要： A microcomputer includes a CPU capable of performing a plurality of tasks in a parallel time-sharing operation. The tasks include at least one special task having a fixed loop program with a constant increase of an instruction address. When the CPU performs a conditional judgement instruction in the special task, the CPU prohibits reflecting an execution result of the conditional judgement instruction to both of the CPU and a periphery circuit in a case where it is no need to perform an instruction described in the special task after the conditional judgement instruction.
摘要翻译：微型计算机包括能够在并行分时操作中执行多个任务的CPU。这些任务包括至少一个具有固定循环程序的特殊任务，其具有指令地址的不断增加。当CPU在特殊任务中执行条件判断指令时，CPU在不需要执行特殊操作中描述的指令的情况下禁止将CPU和外围电路两者的条件判断指令的执行结果反映条件判决指示后的任务。

3. 发明授权

US07433494B2 Moving body detecting apparatus 失效
标题翻译：移动体检测装置
公开(公告)号：US07433494B2
公开(公告)日：2008-10-07
申请号：US10662401
申请日：2003-09-16
申请人： Akimasa Niwa
发明人： Akimasa Niwa
IPC分类号： G06K9/00 , H04N5/225
CPC分类号： B60R25/305 , B60R25/104 , G06T7/215 , G06T7/254
摘要： Provided is a moving body detecting apparatus capable of detecting only a body to be notified without detecting a body similar in feature to the body to be notified. To confirm whether a break-in body appears in static images from a camera, the apparatus sets a monitoring region for monitoring a window portion in the static images and a monitoring region for monitoring a door body portion therein, and produces difference images from the static images. A pixel set existing in common to the difference images continuing in time sequence is extracted from an image composed so that pixel values reach a maximum. On the basis of the motion vector, a decision is made as to whether the movement of the pixel set from the window portion to the door body portion occurs or not.
摘要翻译：提供一种移动体检测装置，其能够仅检测要通知的身体，而不检测与要通知的身体相似的身体。为了确认摄像机是否出现静态图像中的入场体，该设备设置用于监视静态图像中的窗口部分的监视区域和用于监视其中的门体部分的监视区域，并且从静态图像生成差异图像图片。从以使得像素值达到最大的组合的图像中提取与以时间顺序连续的差分图像共同存在的像素集。基于运动矢量，决定是否发生从窗口部分到门体部分的像素组的移动。

4. 发明授权

US06798707B2 Memory control apparatus for serial memory 失效
标题翻译：用于串行存储器的存储器控制装置
公开(公告)号：US06798707B2
公开(公告)日：2004-09-28
申请号：US10234132
申请日：2002-09-05
申请人： Akimasa Niwa , Takuya Harada , Takayuki Aono , Shuji Agatsuma
发明人： Akimasa Niwa , Takuya Harada , Takayuki Aono , Shuji Agatsuma
IPC分类号： G11C700
CPC分类号： G11C7/109 , G11C7/1078 , G11C16/32 , G11C2207/107 , G11C2216/30
摘要： A memory control apparatus for controlling the operation of a memory array in a serial memory employs a command control section for registering the bits of an instruction which is received as an externally supplied set of serial data in conjunction with a corresponding series of cycles of a clock signal, with each set of serial data formatted as a command data portion preceded by a start bit, whereby the shifting of the start bit into the MSB stage of the shift register is detected and used to terminate supplying the clock signal to the shift register, thereby eliminating the use of a counter circuit. Any additional clock signal cycle following shifting of the start bit into the MSB stage of the shift register is detected, so that operating errors caused by noise in the received clock signal can be reliably eliminated.
摘要翻译：用于控制串行存储器中的存储器阵列的操作的存储器控制装置使用命令控制部分，用于将作为外部提供的串行数据集合接收的指令的位与一个时钟的相应的一系列周期相结合信号，其中每组串行数据被格式化为在起始位之前的命令数据部分，由此检测起始位到移位寄存器的MSB级的移位，并用于终止向移位寄存器提供时钟信号，从而消除了使用计数器电路。检测到起始位移位到移位寄存器的MSB级之后的任何额外的时钟信号周期，从而可以可靠地消除接收到的时钟信号中由噪声引起的操作错误。

5. 发明申请

US20090204841A1 Periodic signal processing apparatus 有权
标题翻译：周期信号处理装置
公开(公告)号：US20090204841A1
公开(公告)日：2009-08-13
申请号：US12320800
申请日：2009-02-05
申请人： Akimasa Niwa , Masahiro Kamiya , Hideaki Ishihara , Yoshinori Teshima
发明人： Akimasa Niwa , Masahiro Kamiya , Hideaki Ishihara , Yoshinori Teshima
IPC分类号： G06F13/42
CPC分类号： G01D3/022
摘要： A signal processing apparatus for processing a periodic signal outputted from a signal source has a central processing unit and a task switch timer. The central processing unit performs multiple tasks including a signal processing task in parallel. In the signal processing task, the central processing unit starts to process the periodic signal after performing a synchronization processing to synchronize with the periodic signal, setting the task switch timer to a predetermined time upon completion of the synchronization processing, and enabling an interrupt to the central processing unit upon completion of the synchronization processing. The task switch timer disables the interrupt to the central processing unit immediately before expiring. The task switch timer outputs a task switch signal to the central processing unit when expiring, so that the central processing unit switches to the signal processing task.
摘要翻译：用于处理从信号源输出的周期信号的信号处理装置具有中央处理单元和任务切换定时器。中央处理单元并行执行包括信号处理任务的多个任务。在信号处理任务中，中央处理单元在执行同步处理之后开始对周期信号进行处理以与周期信号同步，在完成同步处理之后将任务切换定时器设定到预定时间，完成同步处理后的中央处理单元。任务切换定时器在到期前立即停止中央处理单元的中断。任务切换定时器在到期时向中央处理单元输出任务切换信号，使得中央处理单元切换到信号处理任务。

6. 发明授权

US07991986B2 Microprocessor starting to execute a computer program at a predetermined interval 有权
标题翻译：微处理器以预定间隔开始执行计算机程序
公开(公告)号：US07991986B2
公开(公告)日：2011-08-02
申请号：US11902365
申请日：2007-09-20
申请人： Tsuyoshi Yamamoto , Takayuki Matsuda , Akimasa Niwa
发明人： Tsuyoshi Yamamoto , Takayuki Matsuda , Akimasa Niwa
IPC分类号： G06F9/48 , G06F9/445
CPC分类号： G06F9/3851 , G06F9/30101 , G06F9/321 , G06F9/4843
摘要： A microprocessor which is adapted to start a second task at a predetermined time when a first task is running if a current time becomes to be equal to the predetermined time is disclosed. The microprocessor executing an instruction read out from a program address updated every time when each execution of instruction is completed, includes update ceasing means for ceasing the program address from being updated when an stopping time comes in order to abort a first task defined by a first computer program and overwriting means for overwriting the program address with an initial address of a second computer program when a predetermined time comes in order to start to execute a second task defined by the second computer program at the predetermined time.
摘要翻译：公开了一种微处理器，其适于在当前时间变得等于预定时间时在第一任务正在运行的预定时间开始第二任务。执行从每次完成指令时更新的程序地址读出的指令的微处理器包括当停止时间到来时停止程序地址被更新的更新停止装置，以便中止由第一计算机程序和重写装置，用于在预定时间到来时用第二计算机程序的初始地址重写程序地址，以便在预定时间开始执行由第二计算机程序定义的第二任务。

7. 发明授权

US06947176B1 Method for correcting lightness of image 有权
标题翻译：校正图像亮度的方法
公开(公告)号：US06947176B1
公开(公告)日：2005-09-20
申请号：US09652154
申请日：2000-08-31
申请人： Noboru Kubo , Xiaomang Zhang , Hiroyuki Okuhata , Akimasa Niwa
发明人： Noboru Kubo , Xiaomang Zhang , Hiroyuki Okuhata , Akimasa Niwa
IPC分类号： H04N1/40 , G06T5/40 , H04N1/60
CPC分类号： H04N1/6027 , G06T5/008 , G06T2207/20016
摘要： A method is provided for correcting lightness of an image using a multiscale retinex. Lightness of a subject pixel of an original image is corrected using a convolution operation of a surround function and surround pixels with respect to the subject pixel of the original image, and the convolution operation is performed over a plurality of scales. The surround function has a simplified model such that a value of the surround function is changed in a stepwise way along two axes orthogonal to each other.
摘要翻译：提供了一种使用多尺度视网膜校正图像的亮度的方法。使用环绕函数和环绕像素相对于原始图像的对象像素的卷积运算来校正原始图像的被摄体像素的亮度，并且通过多个刻度进行卷积运算。环绕功能具有简化的模型，使得环绕功能的值沿着彼此正交的两个轴逐步地改变。

8. 发明授权

US06798708B2 Memory controller and serial memory 失效
标题翻译：内存控制器和串行存储器
公开(公告)号：US06798708B2
公开(公告)日：2004-09-28
申请号：US10351311
申请日：2003-01-27
申请人： Akimasa Niwa , Takayuki Aono , Takuya Harada
发明人： Akimasa Niwa , Takayuki Aono , Takuya Harada
IPC分类号： G11C700
CPC分类号： G06F13/1668 , G11C7/1006 , G11C16/06
摘要： In a memory controller, a serial data including an instruction bit train with addition of a start bit, a clock signal, a chip enable signal, and a reset signal are inputted. During the active period in which the chip enable signal is being inputted, the serial data is stored depending on the clock signal and an enabling signal is generated based on the end timing of active period. Thereby, memory access is executed depending on contents of the instruction bit train. However, when the relevant apparatus is reset during the active period, generation of the enabling signal based on the end timing of the active period is inhibited.
摘要翻译：在存储器控制器中，输入包括添加起始位，时钟信号，芯片使能信号和复位信号的指令位列的串行数据。在输入芯片使能信号的活动期间，根据时钟信号存储串行数据，根据活动期间的结束时刻产生使能信号。由此，根据指令位列的内容执行存储器访问。然而，当有效期间相关装置复位时，基于活动期间的结束定时的使能信号的生成被禁止。

9. 发明授权

US06788822B1 Method and device for correcting lightness of image 有权
标题翻译：用于校正图像亮度的方法和装置
公开(公告)号：US06788822B1
公开(公告)日：2004-09-07
申请号：US09651117
申请日：2000-08-30
申请人： Xiaomang Zhang , Noboru Kubo , Hiroyuki Okuhata , Akimasa Niwa
发明人： Xiaomang Zhang , Noboru Kubo , Hiroyuki Okuhata , Akimasa Niwa
IPC分类号： G06K940
CPC分类号： G06T5/008 , G06T2207/10024 , G06T2207/20016
摘要： A method for correcting lightness of an image includes the steps of: calculating a first scale and a second scale based on an image scale of an original image from image information of the original image; multiscale retinex processing the original image with respect to the first scale and the second scale; and synthesizing a result of the multiscale retinex processing with the image information of the original image.
摘要翻译：一种用于校正图像的亮度的方法包括以下步骤：基于原始图像的图像信息，基于原始图像的图像尺度来计算第一刻度和第二刻度; 多尺度retinex相对于第一刻度和第二刻度处理原始图像; 以及用原始图像的图像信息合成多尺度视网膜处理的结果。

10. 发明授权

US08151098B2 Periodic signal processing apparatus 有权
标题翻译：周期信号处理装置
公开(公告)号：US08151098B2
公开(公告)日：2012-04-03
申请号：US12320800
申请日：2009-02-05
申请人： Akimasa Niwa , Masahiro Kamiya , Hideaki Ishihara , Yoshinori Teshima
发明人： Akimasa Niwa , Masahiro Kamiya , Hideaki Ishihara , Yoshinori Teshima
IPC分类号： G06F9/48
CPC分类号： G01D3/022
摘要： A signal processing apparatus for processing a periodic signal outputted from a signal source has a central processing unit and a task switch timer. The central processing unit performs multiple tasks including a signal processing task in parallel. In the signal processing task, the central processing unit starts to process the periodic signal after performing a synchronization processing to synchronize with the periodic signal, setting the task switch timer to a predetermined time upon completion of the synchronization processing, and enabling an interrupt to the central processing unit upon completion of the synchronization processing. The task switch timer disables the interrupt to the central processing unit immediately before expiring. The task switch timer outputs a task switch signal to the central processing unit when expiring, so that the central processing unit switches to the signal processing task.
摘要翻译：用于处理从信号源输出的周期信号的信号处理装置具有中央处理单元和任务切换定时器。中央处理单元并行执行包括信号处理任务的多个任务。在信号处理任务中，中央处理单元在执行同步处理之后开始对周期信号进行处理以与周期信号同步，在完成同步处理之后将任务切换定时器设定到预定时间，完成同步处理后的中央处理单元。任务切换定时器在到期前立即停止中央处理单元的中断。任务切换定时器在到期时向中央处理单元输出任务切换信号，使得中央处理单元切换到信号处理任务。

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