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1. 发明授权

US07996752B2 Method and apparatus for decoding a LDPC code 失效
标题翻译：用于对LDPC码进行解码的方法和装置
公开(公告)号：US07996752B2
公开(公告)日：2011-08-09
申请号：US11744860
申请日：2007-05-05
申请人： Abhiram Prabhakar , Yan Zhong
发明人： Abhiram Prabhakar , Yan Zhong
IPC分类号： G06F11/00
CPC分类号： H03M13/1105 , H03M13/6516
摘要： In a decoder for decoding a low density parity check (LDPC) code suitable for decoding multi-rated LDPC codes, a method is provided. The method comprises the steps of: providing a memory for the decoding with the memory dependent on a parity check matrix H with maximum number of “1”s; using a number of column updating units, updating columns parallely and simultaneously producing messages; and using a number of row updating units, updating rows parallely and simultaneously producing messages. Whereby an improved architecture in a logic and the memory is provided such that an improved throughput, power consumption, and memory area is achieved.
摘要翻译：在用于解码适用于解码多等级LDPC码的低密度奇偶校验（LDPC）码的解码器中，提供了一种方法。该方法包括以下步骤：依赖于具有最大数量“1”的奇偶校验矩阵H提供用于使用存储器进行解码的存储器; 使用多个列更新单元，更新列并行并同时生成消息; 并使用多个行更新单元，并行地并行地生成消息。由此提供了逻辑和存储器中的改进的架构，使得实现了改进的吞吐量，功耗和存储器区域。

2. 发明申请

US20090282313A1 METHOD AND APPARATUS FOR HARD DECISION BOUNDED DISTANCE DECODING OF NORDSTROM ROBINSON CODE 审中-公开
标题翻译：罗宾逊码的硬判决边界距离解码方法与装置
公开(公告)号：US20090282313A1
公开(公告)日：2009-11-12
申请号：US12116931
申请日：2008-05-07
申请人： LIN YANG , ABHIRAM PRABHAKAR
发明人： LIN YANG , ABHIRAM PRABHAKAR
IPC分类号： H03M13/03 , G06F11/08
CPC分类号： H04L1/0045 , H03M13/03
摘要： A receiver is provided that comprises a decoder. The decoder comprises: means for slicing a signal; means for encoding data/messages to a code word among a predetermined number of code words; and means for determining a distance associated with the code word.
摘要翻译：提供了一种包括解码器的接收器。解码器包括：用于切片信号的装置; 用于将数据/消息编码到预定数量的码字中的码字的装置; 以及用于确定与码字相关联的距离的装置。

3. 发明申请

US20080320374A1 METHOD AND APPARATUS FOR DECODING A LDPC CODE 审中-公开
标题翻译：用于解码LDPC码的方法和装置
公开(公告)号：US20080320374A1
公开(公告)日：2008-12-25
申请号：US11767466
申请日：2007-06-22
申请人： Abhiram PRABHAKAR , Zhong Yan
发明人： Abhiram PRABHAKAR , Zhong Yan
IPC分类号： G06F11/00
CPC分类号： H03M13/116 , H03M13/1111 , H03M13/1117 , H03M13/1122 , H03M13/1137 , H03M13/6516
摘要： In a decoder having a predetermined decoder structure for decoding a low density parity check (LDPC) code suitable for decoding multi-rated LDPC codes is provided. An associated method is provided. The method comprises the steps of: providing a memory for the decoding with the memory size proportional to the number of circularly shifted-identity matrices I (t); and providing a number M for both row update unit numbers and column-update unit numbers. Whereby an improved architecture having an improved logic and the memory is provided such that an improved throughput, power consumption, and memory area are achieved.
摘要翻译：在具有用于解码适用于解码多等级LDPC码的低密度奇偶校验（LDPC）码的预定解码器结构的解码器中。提供了一种相关联的方法。该方法包括以下步骤：提供具有与循环同位矩阵I（t）的数量成正比的存储器大小的解码存储器。并为行更新单元号和列更新单元号提供数字M. 由此提供具有改进的逻辑和存储器的改进的架构，使得实现了改进的吞吐量，功耗和存储区域。

4. 发明申请

US20080276151A1 METHOD AND APPARATUS FOR DECODING A LDPC CODE 失效
标题翻译：用于解码LDPC码的方法和装置
公开(公告)号：US20080276151A1
公开(公告)日：2008-11-06
申请号：US11744860
申请日：2007-05-05
申请人： Yan Zhong , Abhiram Prabhakar
发明人： Yan Zhong , Abhiram Prabhakar
IPC分类号： H03M13/05
CPC分类号： H03M13/1105 , H03M13/6516
摘要： In a decoder for decoding a low density parity check (LDPC) code suitable for decoding multi-rated LDPC codes, a method is provided. The method comprises the steps of: providing a memory for the decoding with the memory dependent on a parity check matrix H with maximum number of “1”s; using a number of column updating units, updating columns parallely and simultaneously producing messages; and using a number of row updating units, updating rows parallely and simultaneously producing messages. Whereby an improved architecture in a logic and the memory is provided such that an improved throughput, power consumption, and memory area is achieved.
摘要翻译：在用于解码适用于解码多等级LDPC码的低密度奇偶校验（LDPC）码的解码器中，提供了一种方法。该方法包括以下步骤：依赖于具有最大数目“1”的奇偶校验矩阵H提供用于使用存储器进行解码的存储器; 使用多个列更新单元，更新列并行并同时生成消息; 并使用多个行更新单元，并行地并行地生成消息。由此提供了逻辑和存储器中的改进的架构，使得实现了改进的吞吐量，功耗和存储器区域。

5. 发明授权

US08448041B1 Multistage LDPC encoding 有权
标题翻译：多级LDPC编码
公开(公告)号：US08448041B1
公开(公告)日：2013-05-21
申请号：US12970731
申请日：2010-12-16
申请人： Lingqi Zeng , Abhiram Prabhakar , Kin Man Ng , Yu Kou
发明人： Lingqi Zeng , Abhiram Prabhakar , Kin Man Ng , Yu Kou
IPC分类号： G06F11/00
CPC分类号： H03M13/116 , H03M13/6505
摘要： Low-density parity-check (LDPC) encoding is performed by encoding input data using a first sub-matrix of a parity check matrix to obtain intermediate data. The parity check matrix includes the first sub-matrix and a second sub-matrix having a matrix inversion. The intermediate data is encoded using the matrix inversion of the second sub-matrix of the parity check matrix.
摘要翻译：通过使用奇偶校验矩阵的第一子矩阵对输入数据进行编码来执行低密度奇偶校验（LDPC）编码，以获得中间数据。奇偶校验矩阵包括第一子矩阵和具有矩阵求逆的第二子矩阵。使用奇偶校验矩阵的第二子矩阵的矩阵求逆来对中间数据进行编码。

6. 发明申请

US20080028282A1 RECEIVER ARCHITECTURE HAVING A LDPC DECODER WITH AN IMPROVED LLR UPDATE METHOD FOR MEMORY REDUCTION 审中-公开
标题翻译：具有用于减少存储器的改进的LLR更新方法的LDPC解码器的接收机架构
公开(公告)号：US20080028282A1
公开(公告)日：2008-01-31
申请号：US11557491
申请日：2006-11-07
申请人： Yan Zhong , Abhiram Prabhakar , Dinesh Venkatachalam
发明人： Yan Zhong , Abhiram Prabhakar , Dinesh Venkatachalam
IPC分类号： H03M13/03
CPC分类号： H03M13/116 , H03M13/1102 , H03M13/1114 , H03M13/1117 , H03M13/1122 , H03M13/114 , H03M13/152 , H03M13/251 , H03M13/2732 , H03M13/2906 , H03M13/6505
摘要： The present invention provides a reduced memory implementation for the min-sum algorithm compared to traditional hardware implementations. The improvement includes innovative MIN_SUM method with reduced memory requirements suitable of computer implementation that combines the traditional row update process and column update process into a single process, in that the traditional CNU unit and VNU unit are combined into a single CVNU unit. The improvement not only reduces the time required for decoding by half, but also reduces the logic and routing efforts. Furthermore, instead of storing the whole intermediate LLR values using a significant number of memories, only a set of parameters associated with the intermediate LLR values is stored. The set of parameters includes: 1. sign of LLR; 2. the minimum LLR, 3. sub-minimum LLR, and 4. the column location of minimum value in each row. Therefore, as compared with the traditional LDPC decoder implementation, the required memory size of the present invention is significantly or tremendously reduced.
摘要翻译：与传统硬件实现相比，本发明提供了用于最小和算法的减少的存储器实现。该改进包括创新的MIN_SUM方法，具有较少的内存要求，适合计算机实现，将传统的行更新过程和列更新过程组合到一个过程中，传统的CNU单元和VNU单元组合成一个CVNU单元。该改进不仅将解码所需的时间缩短了一半，而且减少了逻辑和布线工作。此外，代替使用大量存储器存储整个中间LLR值，仅存储与中间LLR值相关联的一组参数。参数集包括：1. LLR的符号; 2.最小LLR，3. sub-minimum LLR和4.每行最小值的列位置。因此，与传统的LDPC解码器实现相比，本发明所需的存储器大小显着或大大降低。

7. 发明申请

US20090070659A1 LDPC DECODER WITH AN IMPROVED LLR UPDATE METHOD USING A SET OF RELATIVE VALUES FREE FROM A SHIFTING ACTION 审中-公开
标题翻译：具有改进的LLR更新方法的LDPC解码器使用一组相对值从移位操作
公开(公告)号：US20090070659A1
公开(公告)日：2009-03-12
申请号：US11853093
申请日：2007-09-11
申请人： YAN ZHONG , ABHIRAM PRABHAKAR
发明人： YAN ZHONG , ABHIRAM PRABHAKAR
IPC分类号： G06F11/00
CPC分类号： H03M13/114 , H03M13/1122 , H04L27/2647
摘要： In a decoder having an improved LLR (log-likelihood-ratio) update method is provided. The method comprising the steps of: providing a parity check matrix; and using merely a set of parameters on a row of the parity check matrix instead of data of the whole non-zero elements of the parity check matrix free from at least one shifting action after each row updating; thereby saving memory space and process time.
摘要翻译：在具有改进的LLR（对数似然比）更新方法的解码器中。该方法包括以下步骤：提供奇偶校验矩阵; 并且仅在奇偶校验矩阵的一行上使用一组参数，而不是在每行更新之后没有至少一个移位动作的奇偶校验矩阵的整个非零元素的数据; 从而节省内存空间和处理时间。

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