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    • 9. 发明公开
    • Synchronous clock generator
    • 同步发电机
    • EP1207445A2
    • 2002-05-22
    • EP01126481.9
    • 2001-11-09
    • TEXAS INSTRUMENTS DEUTSCHLAND GMBH
    • Bakker, PeterRennig, Fred
    • G06F1/10
    • G11C7/222G06F1/10G11C7/22H03L7/06
    • The circuit configuration for the generation of clock signals for a semiconductor memory (14) that are edge-synchronous with the output signals of a clock generator (16) comprises an input stage (20) to which the output signals of the clock generator (16) are applied. It furthermore contains a phase detector (30) which receives the signals output by the input stage (20) and whose output signals control a voltage-controlled oscillator (34) which supplies the clock signals for the semiconductor memory (14). It also contains a conversion stage (42) which applies signals related to the output signals of the oscillator (34) to the phase detector (30), which controls the oscillator in such a way that the phase difference between the signals reaching it from the input stage (20) and the signals also reaching it from the conversion stage (42) becomes zero. The input stage (20) comprises an amplifier (44) containing a circuit component (62) capable of influencing the signal transit time. This circuit component (62) is controlled in such a way as to change the signal transit time in inverse proportion to the changes of the output signals of the clock generator (16).
    • 用于产生与时钟发生器(16)的输出信号同步的半导体存储器(14)的时钟信号的电路配置包括输入级(20),时钟发生器(16)的输出信号 )。 它还包含相位检测器(30),其接收由输入级(20)输出的信号,并且其输出信号控制提供半导体存储器(14)的时钟信号的压控振荡器(34)。 它还包含转换级(42),该转换级(42)将与振荡器(34)的输出信号有关的信号施加到相位检测器(30),该相位检测器(30)以这样的方式控制振荡器,使得从其到达的信号之间的相位差 输入级(20),并且也从转换级(42)到达的信号变为零。 输入级(20)包括一个放大器(44),该放大器(44)包含能够影响信号传输时间的电路部件(62)。 该电路部件(62)被控制成与时钟发生器(16)的输出信号的变化成反比地改变信号传播时间。