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    • 10. 发明公开
    • Storage capacitor for DRAM memory cell and the process of fabricating the same
    • SpeicherkondensatorfürDRAM-Speicherzelle und Verfahren zur Herstellung desselben
    • EP0844667A2
    • 1998-05-27
    • EP97119999.7
    • 1997-11-14
    • TEXAS INSTRUMENTS INCORPORATED
    • Niuya, Takayuki
    • H01L27/108H01L21/8242
    • H01L27/10852H01L21/76897H01L27/10817H01L27/10855H01L27/10894H01L28/91
    • A process for fabricating a crown-cell capacitor in a memory integrated circuit. The process includes the step of forming a transistor having a contact region 353 at a surface of a semiconductor substrate 300. The transistor, with the exception of the contact region, is covered with a first material 362, 366 and the first material and the contact region are then covered with a layer of a second material 370. The portion of the second layer covering the contact region is removed to expose the contact region so that the removal of the portions of the second layer forms a cavity characterized by a bottom formed of the first material and sides formed of the second material. Further steps in the process include forming a first conductive layer 372 in the cavity to contact the contact region and conform to the bottom and sides, forming a dielectric layer 376 over the first conductive layer, and forming a second conductive layer 378 over the dielectric layer.
    • 一种用于在存储器集成电路中制造冠电池电容器的工艺。 该方法包括在半导体衬底300的表面形成具有接触区域353的晶体管的步骤。除接触区域外的晶体管被​​第一材料362,366覆盖,并且第一材料和接触 区域然后被第二材料层370覆盖。覆盖接触区域的第二层的部分被去除以暴露接触区域,使得去除第二层的部分形成空腔,其特征在于由 第一材料和由第二材料形成的侧面。 该方法中的其它步骤包括在空腔中形成第一导电层372以接触接触区域并与底部和侧面相符合,在第一导电层上形成电介质层376,并在介电层上形成第二导电层378 。