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81. 发明申请

US20030224583A1 Method for plasma etching a wafer after backside grinding 失效
标题翻译：背面研磨后等离子体蚀刻晶片的方法
公开(公告)号：US20030224583A1
公开(公告)日：2003-12-04
申请号：US10157683
申请日：2002-05-29
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Feng-Ru Chang , Gau-Ming Lu , Yeong-Rong Chang
IPC分类号： H01L021/461 , H01L021/46 , H01L021/30 , H01L021/302
CPC分类号： H01L21/02054
摘要： A method for plasma etching a wafer after a backside grinding process which incorporates an oxidation pretreatment step is disclosed. The method includes the step of first grinding a backside of a wafer to expose a bare silicon surface. The bare silicon surface is then oxidized in an oxidation chamber to form a substantially uniform silicon oxide layer of at least 50 null thick, and preferably at least 100 null thick. The wafer is then positioned in a plasma etch chamber with an active surface of the wafer exposed, and a surface layer etched away by an oxygen plasma without causing any further silicon oxide formation on the backside of the wafer. The present invention novel plasma etching method can be advantageously used for removing an organic material layer, such as a photoresist layer from a wafer surface.
摘要翻译：公开了一种在包含氧化预处理步骤的背面研磨工艺之后等离子体蚀刻晶片的方法。该方法包括首先研磨晶片的背面以暴露裸硅表面的步骤。裸硅表面然后在氧化室中氧化以形成至少厚度厚度，优选至少为厚的基本均匀的氧化硅层。然后将晶片放置在等离子体蚀刻室中，其中晶片的有源表面被暴露，并且由氧等离子体蚀刻掉的表面层不会在晶片的背面形成任何进一步的氧化硅。本发明的新颖的等离子体蚀刻方法可以有利地用于从晶片表面去除有机材料层，例如光致抗蚀剂层。

82. 发明申请

US20030222334A1 Display apparatus and producing method therefor 审中-公开
标题翻译：显示装置及其制造方法
公开(公告)号：US20030222334A1
公开(公告)日：2003-12-04
申请号：US10447156
申请日：2003-05-29
申请人： Canon Kabushiki Kaisha
发明人： Sotomitsu Ikeda , Takao Yonehara , Kiyofumi Sakaguchi
IPC分类号： H01L021/00 , H01L021/30 , H01L023/02
CPC分类号： G02F1/13454 , G02F1/133305 , G02F2001/13613 , H01L27/3244 , H01L51/56 , H01L2251/5338 , H01L2924/0002 , H01L2924/00
摘要： The invention provides a light, thin flexible display of a high performance. A display element unit including plural display elements is laminated with a semiconductor film bearing an image forming switching element unit for driving the display elements. A semiconductor film is formed on a separating layer of a semiconductor substrate, and a switching circuit unit is formed thereon. Then the semiconductor film is separated at the separating layer, and an image display unit is laminated thereon to obtain a light, thin flexible display apparatus.
摘要翻译：本发明提供了一种具有高性能的轻薄柔性显示器。包括多个显示元件的显示元件单元层叠有支撑用于驱动显示元件的图像形成开关元件单元的半导体膜。在半导体衬底的分离层上形成半导体膜，并在其上形成开关电路单元。然后在分离层处分离半导体膜，并且在其上层叠图像显示单元，以获得轻薄的柔性显示装置。

83. 发明申请

US20030219960A1 Surface protecting adhesive film for semiconductor wafer and processing method for semiconductor wafer using said adhesive film 有权
标题翻译：用于半导体晶片的表面保护粘合剂膜和使用所述粘合膜的半导体晶片的处理方法
公开(公告)号：US20030219960A1
公开(公告)日：2003-11-27
申请号：US10339344
申请日：2003-01-10
申请人： Mitsui Chemicals, Inc.
发明人： Hideki Fukumoto , Takanobu Koshimizu , Makoto Kataoka , Yoshihisa Saimoto
IPC分类号： H01L021/30 , H01L021/46
CPC分类号： H01L21/6836 , C09J7/22 , C09J2203/326 , H01L2221/68327
摘要： An adhesive film for protecting the surface of a semiconductor wafer wherein the adhesive layer is formed on one surface of a substrate film, the substrate film comprising at least one layer which satisfies the following requisites (A) and at least one of (B) or (C): requisite(A): high elastic modulus properties in which the storage modulus is 1null109 Pa to 1null1010 Pa under the total temperature range of from 18 to 50null C. requisite(B): high elastic modulus properties in which the storage modulus within at least part of the temperature range of from 50 to 90null C. is not more than 1null108 Pa. requisite(C): high elastic modulus properties with expansibility by water absorption in which the size-changing ratio by absorbing water for four hours is 0.05 to 0.5% at 23null C. and 90% RH.
摘要翻译：一种用于保护半导体晶片的表面的粘合膜，其中所述粘合剂层形成在基底膜的一个表面上，所述基底膜包括满足以下条件（A）的至少一个层和（B）或（C）：必要条件（A）：在18〜50℃的总温度范围内，储能模量为1×10 9 Pa〜1×10 10 Pa的高弹性模量特性（B）：高弹性其中在50至90℃的至少部分温度范围内的储能模量不大于1×10 8 Pa的模量性质。必需（C）：通过吸水可膨胀的高弹性模量性质，其中通过吸水4小时的尺寸变化率在23℃和90％RH下为0.05〜0.5％。

84. 发明申请

US20030211705A1 Method for low temperature bonding and bonded structure 有权
公开(公告)号：US20030211705A1
公开(公告)日：2003-11-13
申请号：US10460418
申请日：2003-06-13
申请人： Ziptronix, Inc.
发明人： Qin-Yi Tong , Gaius Gillman Fountain JR. , Paul M. Enquist
IPC分类号： H01L021/30 , H01L021/46
CPC分类号： H01L24/83 , H01L21/0206 , H01L21/2007 , H01L21/31105 , H01L21/31116 , H01L21/322 , H01L21/76251 , H01L24/26 , H01L24/75 , H01L25/0657 , H01L25/50 , H01L27/085 , H01L29/06 , H01L29/16 , H01L2224/8301 , H01L2224/8303 , H01L2224/83031 , H01L2224/8309 , H01L2224/83099 , H01L2224/8319 , H01L2224/8385 , H01L2224/83894 , H01L2224/83896 , H01L2224/83948 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01018 , H01L2924/0102 , H01L2924/01023 , H01L2924/01033 , H01L2924/01039 , H01L2924/0106 , H01L2924/01061 , H01L2924/01072 , H01L2924/01074 , H01L2924/01075 , H01L2924/01084 , H01L2924/01093 , H01L2924/0132 , H01L2924/05442 , H01L2924/07802 , H01L2924/10253 , H01L2924/10329 , H01L2924/14 , Y10S148/012 , Y10S438/974 , Y10T156/10 , Y10T156/1043 , H01L2924/01014 , H01L2924/01015 , H01L2924/01049 , H01L2924/01031 , H01L2924/3512 , H01L2924/00
摘要： A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. One etching process The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2. The surfaces to be bonded are polished to a high degree of smoothness and planarity. VSE may use reactive ion etching or wet etching to slightly etch the surfaces being bonded. The surface roughness and planarity are not degraded and may be enhanced by the VSE process. The etched surfaces may be rinsed in solutions such as ammonium hydroxide or ammonium fluoride to promote the formation of desired bonding species on the surfaces.

85. 发明申请

US20030211646A1 Compositions and devices made by synthesis of layers, coatings or films using electrostatic fields 审中-公开
标题翻译：通过使用静电场合成层，涂层或膜制成的组合物和装置
公开(公告)号：US20030211646A1
公开(公告)日：2003-11-13
申请号：US10420087
申请日：2003-04-22
发明人： Billy J. Stanbery
IPC分类号： H01L021/00 , H01L021/30 , H01L021/46
CPC分类号： H01L31/0322 , Y02E10/541
摘要： Systems and methods are described for synthesis of films, coatings or layers using electrostatic fields. A method includes applying an electrostatic field across a first precursor layer that is coupled to a first substrate and a second precursor layer that is coupled to a second substrate; forming a composition layer; and moving the first substrate relative to the second substrate, wherein the composition layer remains coupled to the second substrate.
摘要翻译：描述了使用静电场合成膜，涂层或层的系统和方法。一种方法包括施加穿过耦合到第一衬底的第一前体层的静电场和耦合到第二衬底的第二前体层; 形成组合物层; 并且相对于第二基底移动第一基底，其中组合物层保持与第二基底结合。

86. 发明申请

US20030207545A1 SOI substrate, element substrate, semiconductor device, electro-optical apparatus, electronic equipment, method of manufacturing the SOI substrate, method of manufacturing the element substrate, and method of manufacturing the electro-optical apparatus 有权
公开(公告)号：US20030207545A1
公开(公告)日：2003-11-06
申请号：US10431390
申请日：2003-05-08
申请人： Seiko Epson Corporation
发明人： Masahiro Yasukawa
IPC分类号： H01L021/30 , H01L021/46 , H01L021/00
CPC分类号： H01L27/1218 , H01L21/76254 , H01L27/1203 , H01L27/1214 , H01L27/1266 , H01L29/78603 , H01L29/78633 , H01L2221/68359 , H01L2221/68363 , Y10S438/977
摘要： An SOI (Silicon On Insulator) substrate is provided with: a support substrate (201); a single crystal silicon layer (202) disposed above one surface of the support substrate; an insulation portion (205) disposed between the support substrate and the single crystal silicon layer, the insulation portion comprising a single layer of an insulation film or a lamination structure of a plurality of insulation films, and including a silicon nitride film or a silicon nitride oxide film (204).

87. 发明申请

US20030197268A1 Semiconductor device with stacked memory and logic substrates and method for fabricating the same 有权
公开(公告)号：US20030197268A1
公开(公告)日：2003-10-23
申请号：US10443365
申请日：2003-05-22
申请人： Hyundai Electronics Industries Co., Ltd.
发明人： Il-Suk Han
IPC分类号： H01L021/30 , H01L023/48 , H01L029/40 , H01L021/8242
CPC分类号： H01L25/0657 , H01L2225/06513 , H01L2225/06541 , H01L2924/0002 , Y10S438/928 , H01L2924/00
摘要： Disclosed are a semiconductor device and a method for fabricating the same and, more particularly, a method for decreasing the size of semiconductor devices by stacking two substrates, one of which has only memory cells and the other of which has only logic circuits is disclosed. The disclosed method includes forming memory cells on a first semiconductor substrate; forming logic circuits on a second semiconductor substrate; and stacking the second semiconductor substrate on the first semiconductor substrate in order that the memory cells are electrically operable to the logic circuits on the second semiconductor substrate. In the disclosed stacked semiconductor substrate, the logic circuit area is placed on the memory cell area and these two areas are electrically connected by a metal interconnection, thereby decreasing the size of the semiconductor devices.

88. 发明申请

US20030170966A1 SI wafer-cap wafer bonding method using local laser energy, device produced by the method, and system used in the method 有权
标题翻译： SI晶圆盖晶片接合方法采用局部激光能量，通过该方法制造的器件，以及该方法中使用的系统
公开(公告)号：US20030170966A1
公开(公告)日：2003-09-11
申请号：US10092890
申请日：2002-03-06
申请人： Robert Bosch GmgH
发明人： Markus Lutz
IPC分类号： H01L021/46 , H01L021/00 , H01L021/30 , H01L023/12
CPC分类号： B81C1/00269
摘要： System and method for bonding a cap to a wafer. The method includes providing a wafer with an microelectromechanical system arranged thereon; providing a bond frame arranged on the outer perimeter of the wafer; and providing a transparent cap. A laser beam is projected through the transparent cap and impinges on the bond frame in a region adjacent to the transparent cap. The bond frame absorbs some or all of the laser energy and increases in temperature. The heat generated by the impinging laser beam is transferred from the bond frame to the adjacent cap, which is heated in excess of its melting temperature. The transparent cap melts in the region of the laser impinging on the bond frame and thereby bonds with the bond frame, creating a hermetic seal between the cap and the wafer. The MEMS sensor is thereby protected from the environment by the hermetically sealed cap. A MEMS device with an hermetically sealed cap or a BioMEMS device with a channel having rounded corners is provided. A system for creating hermetically sealed MEMS devices and/or BioMEMS devices having rounded channels is provided.
摘要翻译：用于将盖接合到晶片的系统和方法。该方法包括提供其上布置有微机电系统的晶片; 提供布置在晶片的外周边上的接合框架; 并提供透明盖。激光束通过透明盖突出并撞击在与透明盖相邻的区域中的接合框架上。结合框架吸收部分或全部激光能量并增加温度。由撞击的激光束产生的热量从接合框架转移到相邻的盖子，其被加热超过其熔融温度。透明帽在激光器的区域中熔合在撞击框架上，从而与接合框架结合，从而在盖和晶片之间产生气密的密封。 MEMS传感器因此通过密封盖被保护免受环境的影响。提供具有气密密封盖的MEMS器件或带有具有圆角的通道的BioMEMS装置。提供了一种用于创建具有圆形通道的气密密封的MEMS器件和/或BioMEMS器件的系统。

89. 发明申请

US20030148590A1 Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack 有权
标题翻译：阻挡结构防止三维（3-D）晶圆 - 晶圆垂直堆叠中的腐蚀和污染
公开(公告)号：US20030148590A1
公开(公告)日：2003-08-07
申请号：US10066668
申请日：2002-02-06
发明人： Scot A. Kellar , Sarah E. Kim , R. Scott List
IPC分类号： H01L021/30
CPC分类号： H01L24/10 , H01L23/481 , H01L23/585 , H01L24/13 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/05009 , H01L2224/05571 , H01L2224/05573 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/13 , H01L2224/13025 , H01L2224/13099 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13166 , H01L2224/2919 , H01L2224/81121 , H01L2224/81193 , H01L2224/81801 , H01L2224/8182 , H01L2224/81894 , H01L2225/06513 , H01L2225/06541 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/04941 , H01L2924/13091 , H01L2924/14 , H01L2924/30107 , H01L2924/0665 , H01L2924/00014 , H01L2924/00
摘要： A three-dimensional (3-D) integrated chip system is provided with a first wafer including one or more integrated circuit (IC) devices, metallic lines deposited via an interlevel dielectric (ILD) on a surface, and at least one barrier line deposited on an outer edge of the surface; and a second wafer including one or more integrated circuit (IC) devices, metallic lines deposited via an interlevel dielectric (ILD) on a surface, and at least one barrier line deposited on an outer edge of the surface, wherein the metallic lines and the barrier line deposited on the surface of the second wafer are bonded with the metallic lines and the barrier line deposited on the surface of the first wafer to establish electrical connections between active IC devices on adjacent wafers and to form a barrier structure on the outer edge of the adjacent wafers.
摘要翻译：三维（3-D）集成芯片系统设置有包括一个或多个集成电路（IC）装置的第一晶片，经由表面上的层间电介质（ILD）沉积的金属线，以及沉积的至少一个势垒线在表面的外边缘上; 以及包括一个或多个集成电路（IC）装置的第二晶片，经由表面上的层间电介质（ILD）沉积的金属线以及沉积在所述表面的外边缘上的至少一个势垒线，其中所述金属线和沉积在第二晶片的表面上的屏障线与沉积在第一晶片的表面上的金属线和势垒线结合，以在相邻晶片上的有源IC器件之间建立电连接，并在第二晶片的外边缘上形成阻挡结构相邻的晶片。

90. 发明申请

US20030119280A1 Method for forming SOI substrate 有权
标题翻译： SOI衬底的形成方法
公开(公告)号：US20030119280A1
公开(公告)日：2003-06-26
申请号：US10307351
申请日：2002-12-02
发明人： Jung-Il Lee , Kazuyuki Fujihara , Nae-In Lee , Geum-Jong Bae , Hwa-Sung Rhee , Sang-su Kim
IPC分类号： H01L021/30 , H01L021/46
CPC分类号： H01L21/76254
摘要： A method for forming SOI substrates including a SOI layer containing germanium and a strained silicon layer disposed on the SOI layer, comprises forming a relaxed silicon-germanium layer on a first silicon substrate using an epitaxial growth method, and forming a porous silicon-germanium layer thereon. A silicon-germanium epitaxial layer is formed on the porous silicon-germanium layer, an oxide layer is formed on a second silicon substrate, the second silicon substrate is bonded where the oxide layer is formed to the first silicon substrate where the silicon-germanium epitaxial layer is formed. Layers are removed to expose the silicon-germanium epitaxial layer and a strained silicon epitaxial layer is formed thereon. The porous silicon-germanium layer prevents lattice defects of the relaxed silicon-germanium layer from transferring to the silicon-germanium epitaxial layer. Therefore, it is possible to form the silicon-germanium layer and the strained silicon layer of the SOI layer without defects.
摘要翻译：一种用于形成包括含有锗的SOI层和设置在SOI层上的应变硅层的SOI衬底的方法包括：使用外延生长方法在第一硅衬底上形成松弛的硅 - 锗层，并且形成多孔硅 - 锗层上。在多孔硅锗层上形成硅 - 锗外延层，在第二硅衬底上形成氧化物层，将形成氧化物层的第二硅衬底接合到第一硅衬底上，其中硅 - 锗外延形成层。去除层以暴露硅 - 锗外延层，并在其上形成应变硅外延层。多孔硅 - 锗层防止松散的硅 - 锗层的晶格缺陷转移到硅 - 锗外延层。因此，可以形成SOI层的硅 - 锗层和应变硅层，而没有缺陷。

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