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81. 发明申请

US20090245767A1 LENS ASSEMBLY AND IMAGING DEVICE 审中-公开
标题翻译：镜头组装和成像装置
公开(公告)号：US20090245767A1
公开(公告)日：2009-10-01
申请号：US12404058
申请日：2009-03-13
申请人： Yuya Sakai , Koichi Kato
发明人： Yuya Sakai , Koichi Kato
IPC分类号： G03B17/08 , G02B23/16
CPC分类号： G02B27/0006 , G02B7/021
摘要： A lens assembly is provided and includes: a plurality of lenses including a first lens located nearest to an object side of the lens assembly and a second lens located adjacent to the first lens; and a lens frame having a hollow part which includes an opening on each of an object side and an image forming side of the lens assembly and into which the plurality of lenses are inserted with their optical axes aligned. Liquid is sealed in a part between the first lens and the second lens.
摘要翻译：提供了一种透镜组件，包括：多个透镜，包括最靠近透镜组件的物体侧的第一透镜和位于第一透镜附近的第二透镜; 以及具有中空部的透镜框，所述中空部在所述透镜组的物体侧和图像形成侧的每一方上包括开口，并且所述多个透镜以其光轴对准的方式插入所述透镜框中。液体被密封在第一透镜和第二透镜之间的部分中。

82. 发明授权

US07586163B2 Semiconductor device having an electrode containing boron and manufacturing method thereof 失效
标题翻译：具有含硼电极的半导体装置及其制造方法
公开(公告)号：US07586163B2
公开(公告)日：2009-09-08
申请号：US11287192
申请日：2005-11-28
申请人： Koichi Kato , Daisuke Matsushita , Koichi Muraoka , Yasushi Nakasaki , Yuichiro Mitani , Nobutoshi Aoki
发明人： Koichi Kato , Daisuke Matsushita , Koichi Muraoka , Yasushi Nakasaki , Yuichiro Mitani , Nobutoshi Aoki
IPC分类号： H01L29/76
CPC分类号： H01L29/16 , H01L21/28176 , H01L21/28185 , H01L29/518
摘要： A semiconductor device includes a semiconductor substrate; an insulation film provided on the semiconductor substrate; and an electrode provided on the insulation film, and containing boron and a semiconductor material, wherein at least one element of the group V and carbon is introduced into an interface between the insulation film and the electrode.
摘要翻译：半导体器件包括半导体衬底; 设置在所述半导体基板上的绝缘膜; 以及设置在所述绝缘膜上并且含有硼和半导体材料的电极，其中所述V族和碳族中的至少一种元素被引入到所述绝缘膜和所述电极之间的界面中。

83. 发明授权

US07531964B2 Discharge lamp apparatus 有权
标题翻译：放电灯装置
公开(公告)号：US07531964B2
公开(公告)日：2009-05-12
申请号：US11270720
申请日：2005-11-10
申请人： Koichi Kato , Yoshitaka Sato
发明人： Koichi Kato , Yoshitaka Sato
IPC分类号： B60Q1/14 , B60Q1/02
CPC分类号： H05B41/02 , B60Q1/0094 , F21S41/17 , F21S41/192 , F21S45/33 , F21V23/026
摘要： In a discharge lamp apparatus for lighting a discharge lamp, a ballast is disposed outside of a lamp housing of a discharge lamp and is electrically connected to the discharge lamp through a connector. A ballast housing of the ballast is connected to a bottom wall of the lamp housing. In the ballast housing, a ballast circuit board is arranged along a top wall of the ballast housing that is opposed to the lamp housing. Accordingly, it is less likely that the ballast circuit board will be wetted by condensation or water vapor entered the ballast housing. Additionally, a partition wall can be provided in the ballast housing between the connector and the ballast circuit board to block the condensation or water vapor from flowing toward the ballast circuit board.
摘要翻译：在用于点灯的放电灯装置中，将镇流器设置在放电灯的灯壳体的外侧，并通过连接器与放电灯电连接。镇流器的镇流器外壳连接到灯壳的底壁。在镇流器壳体中，镇流器电路板沿着与灯壳体相对的镇流器壳体的顶壁布置。因此，镇流器电路板不会被冷凝或水蒸汽进入镇流器壳体而被润湿。此外，可以在连接器和镇流器电路板之间的镇流器壳体中设置分隔壁，以阻止冷凝或水蒸汽流向镇流器电路板。

84. 发明申请

US20090008727A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090008727A1
公开(公告)日：2009-01-08
申请号：US12208730
申请日：2008-09-11
申请人： Takashi YAMAUCHI , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
发明人： Takashi YAMAUCHI , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
IPC分类号： H01L29/78
CPC分类号： H01L21/28537 , H01L21/265 , H01L21/28052 , H01L21/28518 , H01L29/41791 , H01L29/66143 , H01L29/66643 , H01L29/66795 , H01L29/7833 , H01L29/7839 , H01L29/785 , H01L29/872 , H01L2029/7858
摘要： It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region; depositing a Ni layer so as to cover the impurity region; changing the surface of the impurity region into a NiSi2 layer through annealing; forming a Ni layer on the NiSi2 layer; and silicidating the NiSi2 layer through annealing.
摘要翻译：可以降低硅化镍膜与硅之间界面处的界面电阻。半导体制造方法包括：在硅衬底上形成杂质区域，杂质被引入杂质区域; 沉积Ni层以覆盖杂质区域; 通过退火将杂质区的表面改变为NiSi2层; 在NiSi2层上形成Ni层; 并通过退火将NiSi2层硅化。

85. 发明申请

US20080305647A1 Method for Manufacturing a Semiconductor Device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20080305647A1
公开(公告)日：2008-12-11
申请号：US11547691
申请日：2006-08-28
申请人： Daisuke Matsushita , Koichi Muraoka , Koichi Kato , Yasushi Nakasaki , Yuichiro Mitani
发明人： Daisuke Matsushita , Koichi Muraoka , Koichi Kato , Yasushi Nakasaki , Yuichiro Mitani
IPC分类号： H01L21/469
CPC分类号： H01L27/11568 , C23C8/02 , C23C8/24 , C23C8/80 , H01L21/2652 , H01L21/28202 , H01L21/28238 , H01L21/28273 , H01L21/3144 , H01L21/3145 , H01L21/3185 , H01L27/115 , H01L27/11521 , H01L29/105 , H01L29/513
摘要： It is made possible to restrain generation of defects at the time of insulating film formation. A method for manufacturing a semiconductor device, includes: placing a semiconductor substrate into an atmosphere, thereby forming a nitride film on a surface of the semiconductor substrate, the atmosphere containing a first nitriding gas nitriding the surface of the semiconductor substrate and a first diluent gas not actually reacting with the semiconductor substrate, the ratio of the sum of the partial pressure of the first diluent gas and the partial pressure of the first nitriding gas to the partial pressure of the first nitriding gas being 5 or higher, and the total pressure of the atmosphere being 40 Torr or lower.
摘要翻译：可以抑制成膜时的缺陷的产生。一种制造半导体器件的方法，包括：将半导体衬底放置在大气中，从而在所述半导体衬底的表面上形成氮化物膜，所述气氛包含氮化所述半导体衬底的表面的第一氮化气体和第一稀释气体实际上不与半导体衬底反应，第一稀释气体的分压和第一氮化气体的分压与第一氮化气体的分压之和的比率为5以上，气氛为40乇或更低。

86. 发明申请

US20080173930A1 Semiconductor memory device and method for manufacturing the same 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20080173930A1
公开(公告)日：2008-07-24
申请号：US11902132
申请日：2007-09-19
申请人： Hiroshi Watanabe , Daisuke Matsushita , Kouichi Muraoka , Yasushi Nakasaki , Koichi Kato
发明人： Hiroshi Watanabe , Daisuke Matsushita , Kouichi Muraoka , Yasushi Nakasaki , Koichi Kato
IPC分类号： H01L29/788 , H01L21/285 , H01L29/792
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/40114 , H01L29/40117 , H01L29/42324 , H01L29/513 , H01L29/792
摘要： The present invention provides a semiconductor memory device having a tunnel insulating film that does not degrade the endurance characteristics when writing/erasing is repeated, even if the tunnel insulating film is made thinner. The semiconductor memory device includes: a semiconductor substrate; a first insulating film formed on the semiconductor substrate, and including a silicon oxynitride film and a silicon-rich silicon oxide film formed on the silicon oxynitride film, the silicon oxynitride film having a stacked structure formed with a first silicon oxynitride layer, a silicon nitride layer, and a second silicon oxynitride layer in order; a charge storage layer formed on the first insulating film; a second insulating film formed on the charge storage layer; and a control gate formed on the second insulating film.
摘要翻译：本发明提供了一种半导体存储器件，其具有隧道绝缘膜，即使在隧道绝缘膜变薄的情况下，也不会降低写入/擦除时的耐久特性。半导体存储器件包括：半导体衬底; 形成在所述半导体衬底上的第一绝缘膜，并且包括氮氧化硅膜和形成在所述氧氮化硅膜上的富硅氧化物膜，所述氧氮化硅膜具有由第一氮氧化硅层形成的堆叠结构，氮化硅层和第二氮氧化硅层; 形成在所述第一绝缘膜上的电荷存储层; 形成在电荷存储层上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制栅极。

87. 发明申请

US20080157701A1 Electric discharge lamp control unit with sealing structure 有权
标题翻译：具有密封结构的放电灯控制单元
公开(公告)号：US20080157701A1
公开(公告)日：2008-07-03
申请号：US11986646
申请日：2007-11-21
申请人： Koichi Kato
发明人： Koichi Kato
IPC分类号： H05B41/02
CPC分类号： H05B41/00 , F21S41/17 , F21S41/192
摘要： The present invention provides an electric discharge lamp control unit which is capable of enhancing air-tightness in the electric discharge lamp while suppressing increase in the size thereof. The electric discharge lamp control unit for controlling lighting ON/OFF of an electric discharge lamp includes an electronic component in which a circuit element is implemented and which has a connector section for connection to an outside thereof; and a casing for housing the electronic component which includes a base on which the electronic component is mounted and a cover which covers the base. The thorough hole is sealed with the electronic components on the inner side of the base.
摘要翻译：本发明提供一种放电灯控制单元，其能够在抑制放电灯的尺寸增大的同时提高放电灯的气密性。用于控制放电灯的点亮的放电灯控制单元包括其中实现电路元件的电子部件，并且具有用于连接到其外部的连接器部分; 以及用于容纳电子部件的壳体，其包括安装有电子部件的基座和覆盖基部的盖。通孔用底座内侧的电子部件密封。

88. 发明申请

US20080106858A1 Unit for accomodating electronic component 有权
标题翻译：用于容纳电子元件的单元
公开(公告)号：US20080106858A1
公开(公告)日：2008-05-08
申请号：US11982775
申请日：2007-11-05
申请人： Koichi Kato
发明人： Koichi Kato
IPC分类号： H05K5/02 , H05B41/00
CPC分类号： H05K5/0047 , H05K5/0213
摘要： The present invention provides an electronic control unit which is capable of suppressing harmful effects caused by liquid while suppressing increase in the size thereof. The electronic control unit includes an electronic component in which a circuit element coated with an anti-splash agent is implemented, a casing, and a liquid discharge portion. The casing includes a base on which the electronic component is mounted, a cover which is connected to the base in the state where the electronic component is covered with the cover, and a connector which electrically connects the electronic component to the outside. The liquid discharge portion includes a flow passage in which liquid which has intruded into an internal space in the casing formed by the base, the cover and the connector for housing the electronic component flows, and an opening portion which discharges the liquid to the outside of the internal space via the flow passage.
摘要翻译：本发明提供一种电子控制单元，其能够抑制由液体引起的有害影响，同时抑制其尺寸的增加。电子控制单元包括其中涂覆有防溅剂的电路元件，壳体和液体排出部分的电子部件。壳体包括安装电子部件的基座，在电子部件被盖覆盖的状态下连接到基座的盖以及将电子部件电连接到外部的连接器。液体排出部分包括一个流动通道，其中已经侵入由基座形成的壳体内部空间的液体，盖子和用于容纳电子部件的连接器流动，并且将液体排出到外部的开口部分通过流路的内部空间。

89. 发明授权

US07253801B2 Input device of 3-D translation and rotation and its method and recording medium 有权
标题翻译： 3-D平移和旋转的输入装置及其方法和记录介质
公开(公告)号：US07253801B2
公开(公告)日：2007-08-07
申请号：US10728997
申请日：2003-12-05
申请人： Koichi Kato , Kenji Mochizuki , Shinichi Meguro
发明人： Koichi Kato , Kenji Mochizuki , Shinichi Meguro
IPC分类号： G09G5/08 , H04N7/00 , G02B27/22
CPC分类号： G06F3/0325 , G06F3/0346 , G06F3/037 , G06F3/04845
摘要： A photo device condenses the bright spot on the display to project the spot light onto the projection plane, thereby projecting it onto photo detectors the projection plane. A counter counts the time from the time of a vertical sync signal and supplies its output to AND gates. A correspondence detector brings bright spot display positions on the display at multiple times into correspondence with their projection positions on the photo device in accordance to recording time. An extrinsic parameter calculator calculates the 3-D translation and rotation of the photo device with respect to the bright spot scanning surface of the display from at least three sets of the bright spot display positions and their corresponding projection positions.
摘要翻译：照片装置将亮点聚集在显示器上以将光束投影到投影平面上，从而将其投影到投影平面的光电检测器上。计数器从垂直同步信号的时间计数时间，并将其输出提供给与门。对应检测器根据记录时间在显示器上使亮点显示位置与照相装置上的投影位置相对应地多次显示。外部参数计算器从至少三组亮点显示位置及其对应的投影位置计算照相装置相对于显示器的亮点扫描表面的3-D平移和旋转。

90. 发明申请

US20070141836A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070141836A1
公开(公告)日：2007-06-21
申请号：US11530724
申请日：2006-09-11
申请人： Takashi Yamauchi , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
发明人： Takashi Yamauchi , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
IPC分类号： H01L21/4763
CPC分类号： H01L21/28537 , H01L21/265 , H01L21/28052 , H01L21/28518 , H01L29/41791 , H01L29/66143 , H01L29/66643 , H01L29/66795 , H01L29/7833 , H01L29/7839 , H01L29/785 , H01L29/872 , H01L2029/7858
摘要： It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region; depositing a Ni layer so as to cover the impurity region; changing the surface of the impurity region into a NiSi2 layer through annealing; forming a Ni layer on the NiSi2 layer; and silicidating the NiSi2 layer through annealing.
摘要翻译：可以降低硅化镍膜与硅之间界面处的界面电阻。半导体制造方法包括：在硅衬底上形成杂质区域，杂质被引入杂质区域; 沉积Ni层以覆盖杂质区域; 通过退火将杂质区的表面改变成NiSi 2层; 在NiSi 2层上形成Ni层; 并通过退火对NiSi 2层进行硅化。

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