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81. 发明授权

US07180358B2 CMOS exponential function generating circuit with temperature compensation technique 失效
标题翻译：具有温度补偿技术的CMOS指数函数发生电路
公开(公告)号：US07180358B2
公开(公告)日：2007-02-20
申请号：US11004432
申请日：2004-12-03
申请人： Jong Kee Kwon , Mun Yang Park , Jong Dae Kim , Won Chul Song
发明人： Jong Kee Kwon , Mun Yang Park , Jong Dae Kim , Won Chul Song
IPC分类号： G06G7/20
CPC分类号： H03F3/45928 , H03F3/45179 , H03F3/45475 , H03F2203/45212 , H03F2203/45482 , H03F2203/45484 , H03F2203/45508 , H03G7/001
摘要： Provided is a CMOS exponential function generating circuit capable of compensating for the exponential function characteristic according to temperature variations. The exponential function generating circuit includes an voltage scaler scaling the value of an external gain control voltage signal, an exponential function generating unit generating exponential function current and voltage in response to a signal output from the voltage scaler, a reference voltage generator providing a reference voltage to the exponential function generating unit, and a temperature compensator compensating for the exponential function characteristic according to temperature variations.
摘要翻译：提供了能够根据温度变化补偿指数函数特性的CMOS指数函数发生电路。指数函数发生电路包括缩放外部增益控制电压信号的值的电压缩放器，响应于从电压调节器输出的信号产生指数函数电流和电压的指数函数产生单元，提供参考电压的参考电压发生器到指数函数产生单元，以及根据温度变化补偿指数函数特性的温度补偿器。

82. 发明申请

US20060105528A1 High voltage mosfet having Si/SiGe heterojunction structure and method of manufacturing the same 有权
标题翻译：具有Si / SiGe异质结结构的高电压mosfet及其制造方法
公开(公告)号：US20060105528A1
公开(公告)日：2006-05-18
申请号：US11182671
申请日：2005-07-15
申请人： Young Kyun Cho , Sung Ku Kwon , Tae Moon Roh , Dae Woo Lee , Jong Dae Kim
发明人： Young Kyun Cho , Sung Ku Kwon , Tae Moon Roh , Dae Woo Lee , Jong Dae Kim
IPC分类号： H01L21/8234
CPC分类号： H01L29/7835 , H01L21/823807 , H01L29/1054 , H01L29/66659
摘要： Provided are high voltage metal oxide semiconductor field effect transistor (HVMOSFET) having a Si/SiGe heterojunction structure and method of manufacturing the same. In this method, a substrate on which a Si layer, a relaxed SiGe epitaxial layer, a SiGe epitaxial layer, and a Si epitaxial layer are stacked or a substrate on which a Si layer having a well region, a SiGe epitaxial layer, and a Si epitaxial layer are stacked is formed. For the device having the heterojunction structure, the number of conduction carriers through a potential well and the mobility of the carriers increase to reduce an on resistance, thus increasing saturation current. Also, an intensity of vertical electric field decreases so that a breakdown voltage can be maintained at a very high level. Further, a reduction in vertical electric field due to the heterojunction structure leads to a gain in transconductance (Gm), with the results that a hot electron effect is inhibited and the reliability of the device is enhanced.
摘要翻译：提供了具有Si / SiGe异质结结构的高压金属氧化物半导体场效应晶体管（HVMOSFET）及其制造方法。在该方法中，层叠有Si层，弛豫SiGe外延层，SiGe外延层和Si外延层的基板或其上具有阱区的Si层，SiGe外延层和 Si外延层被形成。对于具有异质结结构的器件，通过势阱的导电载流子数量和载流子的迁移率增加，以降低导通电阻，从而增加饱和电流。此外，垂直电场的强度降低，使得击穿电压可以保持在非常高的水平。此外，由于异质结构造成的垂直电场的减少导致跨导增益（Gm），结果是热电子效应被抑制，并且器件的可靠性增强。

83. 发明授权

US06852597B2 Method for fabricating power semiconductor device having trench gate structure 有权
公开(公告)号：US06852597B2
公开(公告)日：2005-02-08
申请号：US10071127
申请日：2002-02-08
申请人： Il-Yong Park , Jong Dae Kim , Sang Gi Kim , Jin Gun Koo , Dae Woo Lee , Roh Tae Moon , Yang Yil Suk
发明人： Il-Yong Park , Jong Dae Kim , Sang Gi Kim , Jin Gun Koo , Dae Woo Lee , Roh Tae Moon , Yang Yil Suk
IPC分类号： H01L21/336 , H01L29/417 , H01L29/78
CPC分类号： H01L29/7813 , H01L29/41766 , H01L29/41775 , H01L29/7802
摘要： A method for fabricating a power semiconductor device having a trench gate structure is provided. An epitaxial layer of a first conductivity type having a low concentration and a body region of a second conductivity type are sequentially formed on a semiconductor substrate of the first conductivity type having a high concentration. An oxide layer pattern is formed on the body region. A first trench is formed using the oxide layer pattern as an etching mask to perforate a predetermined portion of the body region having a first thickness. A body contact region of the second conductivity type having a high concentration is formed to surround the first trench by impurity ion implantation using the oxide layer pattern as an ion implantation mask. First spacer layers are formed to cover the sidewalls of the first trench and the sidewalls of the oxide layer pattern. A second trench is formed using the oxide layer pattern and the first spacer layers as etching masks to perforate a predetermined portion of the body region having a second thickness greater than the first thickness. A source region of the first conductivity type having a high concentration is formed to surround the second trench by impurity ion implantation using the oxide layer pattern and the first spacer layers as ion implantation masks. Second spacer layers are formed to cover the sidewalls of the second trench and the sidewalls of the first spacer layers. A third trench is formed to a predetermined depth of the epitaxial layer using the oxide layer pattern, the first spacer layers, and the second spacer layers as etching masks. A gate insulating layer is formed in the third trench. A gate conductive pattern is formed in the gate insulating layer. An oxide layer is formed on the gate conductive layer pattern. The first and second spacer layers are removed. A first metal electrode layer is formed to be electrically connected to the source region and the body contact region. A second metal electrode layer is formed to be electrically connected to the gate conductive layer pattern. A third metal electrode layer is formed to be electrically connected to the semiconductor substrate.

84. 发明授权

US06731259B2 Driving circuit of a liquid crystal display device 有权
标题翻译：液晶显示装置的驱动电路
公开(公告)号：US06731259B2
公开(公告)日：2004-05-04
申请号：US10029196
申请日：2001-12-28
申请人： Jung Taeck Yer , Sin Ho Kang , Jong Dae Kim
发明人： Jung Taeck Yer , Sin Ho Kang , Jong Dae Kim
IPC分类号： G09G336
CPC分类号： G09G3/3696 , G09G2320/0673 , G09G2360/144
摘要： A driving circuit of an LCD device compensates a gamma voltage according to a peripheral environment so that exact picture images can be displayed. The driving circuit of the LCD device includes a memory dividing the peripheral environment into a plurality of modes and storing information of each mode, an environment sensor sensing variation of the peripheral environment, a controller selecting information of a mode corresponding to the resultant value sensed by the environment sensor, a digital variable resistor adjusting a resistance value to correspond to mode information selected by the controller, and a gamma voltage outputting unit outputting a plurality of gamma voltages corresponding to the adjusted resistance value.
摘要翻译： LCD装置的驱动电路根据外围环境补偿伽马电压，从而可以显示精确的图像图像。 LCD装置的驱动电路包括将外围环境分解为多种模式并存储每种模式的信息的存储器，感测周边环境的变化的环境传感器，控制器选择与由环境传感器，调整与由控制器选择的模式信息相对应的电阻值的数字可变电阻器;以及伽马电压输出单元，输出对应于调整后的电阻值的多个伽马电压。

85. 发明授权

US06534365B2 Method of fabricating TDMOS device using self-align technique 有权
标题翻译：使用自对准技术制造TDMOS器件的方法
公开(公告)号：US06534365B2
公开(公告)日：2003-03-18
申请号：US09726910
申请日：2000-11-29
申请人： Jong Dae Kim , Sang Gi Kim , Jin Gun Koo , Kee Soo Nam , Dae Woo Lee , Tae Moon Roh
发明人： Jong Dae Kim , Sang Gi Kim , Jin Gun Koo , Kee Soo Nam , Dae Woo Lee , Tae Moon Roh
IPC分类号： H01L21336
CPC分类号： H01L29/7813 , H01L29/0847 , H01L29/42368
摘要： A method of fabricating a vertical TDMOS power device using sidewall spacers and a self-align technique and a TDMOS power device of the same. The TDMOS is fabricated using only 3 masks and a source is formed using the self-align technique to embody a highly integrated trench formation. During the process, ion implantation of high concentration into the bottom of the trench makes a thick oxide film grow on the bottom and the corner of the gate, so that electrical characteristic, specifically leakage current and breakdown voltage of the device can be improved. Also, process steps can be much decreased to lower process cost, high integration is possible, and reliability of the device can be improved.
摘要翻译：使用侧壁间隔物和自对准技术制造垂直TDMOS功率器件的方法以及使用其的TDMOS功率器件。 TDMOS仅使用3个掩模制造，并且使用自对准技术形成源以体现高度集成的沟槽形成。在此过程中，高浓度离子注入沟槽的底部使得厚的氧化膜在栅极的底部和拐角处生长，从而可以提高器件的电气特性，特别是漏电流和击穿电压。此外，可以大大降低工艺步骤以降低工艺成本，可以实现高集成度，并且可以提高器件的可靠性。

86. 发明授权

US08705777B2 MEMS microphone and method of manufacturing the same 失效
标题翻译： MEMS麦克风及其制造方法相同
公开(公告)号：US08705777B2
公开(公告)日：2014-04-22
申请号：US13601896
申请日：2012-08-31
申请人： Chang Han Je , Jae Woo Lee , Woo Seok Yang , Jong Dae Kim
发明人： Chang Han Je , Jae Woo Lee , Woo Seok Yang , Jong Dae Kim
IPC分类号： H04R1/00 , H04R31/00
CPC分类号： H04R1/00 , B81B3/007 , B81B2201/0257 , H04R1/2807 , H04R19/005 , H04R19/04 , H04R31/00 , H04R31/006 , H04R2201/003
摘要： Disclosed are a MEMS microphone and a method of manufacturing the same. The MEMS microphone includes: a substrate; a rear acoustic chamber formed inside a front surface of the substrate; a vibrating plate formed on the substrate and having an exhaust hole; a fixed electrode formed on the vibrating plate; and a fixed electrode support supported by a bottom of the rear acoustic chamber and connected to the fixed electrode through the exhaust hole.
摘要翻译：公开了一种MEMS麦克风及其制造方法。 MEMS麦克风包括：基板; 形成在所述基板的前表面内的后声室; 形成在所述基板上并具有排气孔的振动板; 形成在振动板上的固定电极; 以及由后声室的底部支撑并通过排气孔连接到固定电极的固定电极支撑件。

87. 发明授权

US08461798B2 Apparatus and method for extracting maximum power from solar cell by changing the duty cycle of a pulse width modulation signal 失效
标题翻译：通过改变脉冲宽度调制信号的占空比来提取太阳能电池的最大功率的装置和方法
公开(公告)号：US08461798B2
公开(公告)日：2013-06-11
申请号：US12878443
申请日：2010-09-09
申请人： Se Wan Heo , Yil Suk Yang , Jae Woo Lee , Moon Gyu Jang , Jong Dae Kim
发明人： Se Wan Heo , Yil Suk Yang , Jae Woo Lee , Moon Gyu Jang , Jong Dae Kim
IPC分类号： H02J7/00
CPC分类号： H02J7/35 , G05F1/67 , Y02E10/566 , Y02E10/58
摘要： An apparatus and method for extracting maximum power from a solar cell are provided. The apparatus includes a solar cell for producing power from solar energy, a maximum power extractor for generating a pulse width modulation signal for extracting the maximum power from the solar cell, and a DC-DC converter for adjusting an amount of current generated from the solar cell according to the pulse width modulation signal.
摘要翻译：提供一种从太阳能电池提取最大功率的装置和方法。该装置包括用于从太阳能产生电能的太阳能电池，用于产生用于从太阳能电池提取最大功率的脉宽调制信号的最大功率提取器，以及用于调节从太阳能产生的电流量的DC-DC转换器单元根据脉宽调制信号。

88. 发明申请

US20130100779A1 ACOUSTIC SENSOR AND FABRICATION METHOD THEREOF 有权
标题翻译：声学传感器及其制造方法
公开(公告)号：US20130100779A1
公开(公告)日：2013-04-25
申请号：US13557108
申请日：2012-07-24
申请人： Jae Woo LEE , Chang Han Je , Woo Seok Yang , Jong Dae Kim
发明人： Jae Woo LEE , Chang Han Je , Woo Seok Yang , Jong Dae Kim
IPC分类号： H04R17/00 , H04R31/00
CPC分类号： H04R19/005 , H01L2224/48091 , H01L2224/48137 , H01L2924/15151 , H04R19/04 , H04R31/00 , Y10T29/49005 , H01L2924/00014
摘要： A method for fabricating an acoustic sensor according to an exemplary embodiment of the present disclosure includes: forming an acoustic sensor unit by forming a lower electrode on an upper portion of a substrate, forming etching holes on the lower electrode, forming a sacrifice layer on an upper portion of the lower electrode, and coupling a diaphragm to an upper portion of the sacrifice layer; coupling a lower portion of the substrate of the acoustic sensor unit to a printed circuit board on which a sound pressure input hole is formed so as to expose the lower portion of the substrate of the acoustic sensor unit to the outside through the sound pressure input hole; attaching a cover covering the acoustic sensor unit on the printed circuit board; etching the substrate of the acoustic sensor unit to form an acoustic chamber; and removing the sacrifice layer.
摘要翻译：根据本公开的示例性实施例的用于制造声学传感器的方法包括：通过在基板的上部形成下电极来形成声传感器单元，在下电极上形成蚀刻孔，在其上形成牺牲层下部电极的上部，并且将隔膜连接到牺牲层的上部; 将声学传感器单元的基板的下部耦合到其上形成有声压输入孔的印刷电路板，以便通过声压输入孔将声学传感器单元的基板的下部暴露于外部 ; 将覆盖所述声学传感器单元的盖附着在所述印刷电路板上; 蚀刻声学传感器单元的基板以形成声学室; 并去除牺牲层。

89. 发明授权

US08398727B2 Method of manufacturing vacuum-sealing-type flexible-film primary battery 有权
标题翻译：制造真空密封型柔性膜一次电池的方法
公开(公告)号：US08398727B2
公开(公告)日：2013-03-19
申请号：US13607645
申请日：2012-09-07
申请人： Young Gi Lee , Kwang Man Kim , Min Gyu Choi , Sang Hyo Lee , Jong Dae Kim
发明人： Young Gi Lee , Kwang Man Kim , Min Gyu Choi , Sang Hyo Lee , Jong Dae Kim
IPC分类号： H01M6/00 , H01M8/00 , H01M10/00
CPC分类号： H01M6/40 , H01M4/366 , H01M4/76 , H01M6/02 , H01M6/181 , H01M10/0472
摘要： A method of manufacturing a flexible-film primary battery includes forming a first conductive carbon layer directly on a surface-treated inner surface of a first pouch film to form a positive electrode collector, and forming a positive electrode layer on the first conductive carbon layer to form a positive electrode plate. A second conductive carbon layer is formed directly on a surface-treated inner surface of a second pouch film to form a negative electrode collector, and a negative electrode layer is formed on the second conductive carbon layer to form a negative electrode plate. An adhesion/post-injection polymer electrolyte layer is inserted between the positive electrode plate and the negative electrode plate to manufacture a battery assembly. An electrolyte is injected into the polymer electrolyte layer of the battery assembly. The battery assembly is sealed completely to form a primary battery.
摘要翻译：一种制造柔性膜一次电池的方法包括：在第一袋膜的表面处理内表面上直接形成第一导电性碳层，形成正极集电体，在第一导电性碳层上形成正极层，形成正极板。在第二袋膜的表面处理内表面上直接形成第二导电性碳层，形成负极集电体，在第二导电性碳层上形成负极层，形成负极板。在正极板和负极板之间插入粘合/后注入聚合物电解质层以制造电池组件。将电解质注入到电池组件的聚合物电解质层中。电池组件被完全密封以形成一次电池。

90. 发明授权

US08285444B2 Integrated vehicle control system 有权
标题翻译：综合车辆控制系统
公开(公告)号：US08285444B2
公开(公告)日：2012-10-09
申请号：US12533104
申请日：2009-07-31
申请人： Jae Kwan Lee , Jong Dae Kim
发明人： Jae Kwan Lee , Jong Dae Kim
IPC分类号： G06F7/00
CPC分类号： B60W50/04 , B60W10/06 , B60W10/10 , B60W10/184 , B60W10/20 , B60W10/22 , B60W30/02 , B60W2050/0031
摘要： Disclosed herein is an integrated vehicle control system, which eliminates the possibility of interfering with motion control devices and is capable of accurately controlling the targeted behavior of a vehicle.
摘要翻译：这里公开了一种集成车辆控制系统，其消除了干扰运动控制装置的可能性，并且能够精确地控制车辆的目标行为。

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