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81. 发明申请

US20050152691A1 Shutter apparatus 审中-公开
标题翻译：快门装置
公开(公告)号：US20050152691A1
公开(公告)日：2005-07-14
申请号：US11021368
申请日：2004-12-21
申请人： Takahiro Kawauchi , Akihito Yamamoto
发明人： Takahiro Kawauchi , Akihito Yamamoto
IPC分类号： G03B9/08 , G03B9/10
CPC分类号： G03B9/10
摘要： A shutter apparatus according to the present invention includes a base member having an opening with a predetermined diameter and first and second blades, which are placed on a blade support surface of the base member and can open and close the opening, wherein the first blade can open and close the opening by rotating on the blade support surface, and the second blade can open and close the opening by having a predetermined gap above the first blade so as to be arranged.
摘要翻译：根据本发明的快门装置包括具有预定直径的开口的基座构件和第一和第二叶片，其被放置在基座构件的叶片支撑表面上并且可以打开和关闭开口，其中第一叶片可以通过在叶片支撑表面上旋转来打开和关闭开口，并且第二叶片可以通过在第一叶片上方具有预定间隙来打开和关闭开口，以便布置。

82. 发明授权

US06188838B1 Apparatus for heat treating a semiconductor wafer to reduce stress 失效
标题翻译：用于热处理半导体晶片以减少应力的装置
公开(公告)号：US06188838B1
公开(公告)日：2001-02-13
申请号：US09240669
申请日：1999-02-02
申请人： Yuichi Mikata , Akihito Yamamoto
发明人： Yuichi Mikata , Akihito Yamamoto
IPC分类号： F26B330
CPC分类号： H01L21/67309 , C30B31/14 , H01L21/67103 , H01L21/68721 , H01L21/68735 , H01L21/68785 , Y10S438/931
摘要： A susceptor in a semiconductor wafer heat treatment apparatus holds a wafer such that the wafer is made flat at a heat treatment temperature. In particular, the susceptor is constituted by an elastic platy member which is convex upward with respect to the direction of the gravity. Therefore, when the wafer is subjected to a high-temperature heat treatment, a crystal defect in the wafer can be suppressed.
摘要翻译：半导体晶片热处理装置中的感受体保持晶片，使得晶片在热处理温度下平坦化。特别地，感受体由相对于重力方向向上凸起的弹性板状构件构成。因此，当对晶片进行高温热处理时，可以抑制晶片中的晶体缺陷。

83. 发明授权

US5885905A Semiconductor substrate and method of processing the same 失效
标题翻译：半导体衬底及其加工方法
公开(公告)号：US5885905A
公开(公告)日：1999-03-23
申请号：US582975
申请日：1996-01-04
申请人： Souichi Nadahara , Kikuo Yamabe , Hideyuki Kobayashi , Kunihiro Terasaka , Akihito Yamamoto , Naohiko Yasuhisa
发明人： Souichi Nadahara , Kikuo Yamabe , Hideyuki Kobayashi , Kunihiro Terasaka , Akihito Yamamoto , Naohiko Yasuhisa
IPC分类号： H01L21/223 , C30B33/00 , H01L21/322 , H01L21/324 , H01L21/477
CPC分类号： C30B29/06 , C30B33/00 , H01L21/3225 , Y10S438/909
摘要： A method of processing a semiconductor substrate includes the step of subjecting a semiconductor substrate to a heat treatment under a gaseous atmosphere. The method comprises the step of subjecting a semiconductor substrate to a heat treatment at temperatures not lower than 1100.degree. C. under a non-oxidizing atmosphere, wherein heat treatments before said heat treatment applied to the semiconductor substrate are applied under heat treating temperatures and heat treating time which fall within a region defined by a line connecting four points of (900.degree. C., 4 minutes), (800.degree. C., 40 minutes), (700.degree. C., 11 hours) and (600.degree.0 C., 320 hours) in a graph, in which the heat treating temperature is plotted on the abscissa and the heat treating time is plotted on the ordinate of the graph.
摘要翻译：一种处理半导体衬底的方法包括在气氛下对半导体衬底进行热处理的步骤。该方法包括在非氧化性气氛下对半导体衬底进行不低于1100℃的热处理的步骤，其中在加热处理温度和热量下施加所述加热处理之前的热处理处理时间落在由连接（900℃，4分钟），（800℃，40分钟），（700℃，11小时）和（600℃）四个点，320小时），其中热处理温度绘制在横坐标上，热处理时间绘制在图的纵坐标上。

84. 发明授权

US5714406A Method for forming film on semiconductor substrate by thermal CVD method 失效
标题翻译：通过热CVD法在半导体衬底上形成膜的方法
公开(公告)号：US5714406A
公开(公告)日：1998-02-03
申请号：US640257
申请日：1996-04-30
申请人： Takashi Suzuki , Akihito Yamamoto , Hiroshi Ogino , Yoshio Kasai
发明人： Takashi Suzuki , Akihito Yamamoto , Hiroshi Ogino , Yoshio Kasai
IPC分类号： C23C16/44 , C23C16/46 , H01L21/205 , H01L21/302
CPC分类号： H01L21/02381 , H01L21/02532 , H01L21/0262
摘要： A semiconductor substrate is supported on a lower electrode provided within a chamber. The semiconductor substrate is heated up to about 600.degree. to 700.degree. by radiation heat from a halogen lamp. While the pressure within the chamber is reduced to about 0.1 to 1 Torr, the lower electrode is used as a positive electrode, and an upper electrode is used as a negative electrode. In this state, a DC voltage of 20 V is applied from a DC power supply. Then, a material gas is introduced into the chamber via an introducing hole, and a polysilicon film is grown on an oxide film on the semiconductor substrate. Electricity in the oxide film increases an initial growth rate of the polysilicon film and prevents formation of pinholes in the polysilicon film.
摘要翻译：半导体基板被支撑在设置在室内的下电极上。通过来自卤素灯的辐射热将半导体衬底加热至约600℃至700℃。虽然室内的压力降低到约0.1至1乇，但是下电极用作正电极，并且上电极用作负电极。在该状态下，从直流电源施加20V的直流电压。然后，通过导入孔将原料气体引入室内，在半导体基板上的氧化膜上生长多晶硅膜。氧化膜中的电流增加了多晶硅膜的初始生长速率并且防止了在多晶硅膜中形成针孔。

85. 发明授权

US5484484A Thermal processing method and apparatus therefor 失效
标题翻译：热处理方法及其设备
公开(公告)号：US5484484A
公开(公告)日：1996-01-16
申请号：US269039
申请日：1994-06-30
申请人： Kenichi Yamaga , Yuichi Mikata , Akihito Yamamoto
发明人： Kenichi Yamaga , Yuichi Mikata , Akihito Yamamoto
IPC分类号： C23C16/34 , C23C16/44 , C23C16/455 , C23C16/54 , C23C16/56 , C23C16/00
CPC分类号： C23C16/4409 , C23C16/345 , C23C16/455 , C23C16/54 , C23C16/56
摘要： An Si.sub.3 N.sub.4 layer is formed on a surface of a wafer, which is an object to be processed, at a high temperature of, for example, 780.degree. C., using a vertical thermal processing apparatus having a reaction tube of a double-wall structure comprising an inner tube and an outer tube in which a predetermined reduced-pressure status is maintained within the reaction tube while a reaction gas comprising, for example, SiH.sub.2 Cl.sub.2 and NH.sub.3 is made to flow from an inner side to an outer side of the inner tube by the action of a first gas supply pipe and first exhaust pipe provided in the thermal processing apparatus. Next, the temperature in the interior of the reaction tube is raised to, for example, 1000.degree. C., a reaction gas comprising, for example, H.sub.2 O vapor and HCl is made to flow from the outer side to the inner side of the inner tube by the action of a second gas supply pipe and second exhaust pipe, and an SiO.sub.2 layer is formed by the oxidation of the surface of the Si.sub.3 N.sub.4 layer formed on the surface of the wafer, under normal-pressure conditions. The use of a combined chamber enables the implementation of film formation and either oxidation or diffusion processing without having to remove the object to be processed from the reaction tube, and thus prevents the intrusion of a natural oxide layer or the incorporation of particles into a thin film structure of, for example, SiO.sub.2 and Si.sub.3 N.sub.4 layers used as a multi-layer insulating film for devices such as DRAMs.
摘要翻译：使用具有双壁结构的反应管的垂直热处理装置，在作为被处理物的晶片的表面上，例如在780℃的高温下形成Si 3 N 4层包括内管和外管，其中在反应管内保持预定的减压状态，同时使包括例如SiH 2 Cl 2和NH 3的反应气体从内管的内侧流到外管通过设置在热处理装置中的第一气体供给管和第一排气管的作用。接下来，将反应管内部的温度升高至例如1000℃，由例如H 2 O蒸气和HCl构成的反应气体从内侧的内侧流向内侧通过第二气体供给管和第二排气管的作用，通过在常压条件下氧化形成在晶片表面上的Si 3 N 4层的表面形成SiO 2层。使用组合室能够实现成膜和氧化或扩散处理，而不必从反应管中除去待处理的物体，从而防止天然氧化物层的侵入或将颗粒引入薄的例如用作用于诸如DRAM的器件的多层绝缘膜的SiO 2和Si 3 N 4层的膜结构。

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