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81. 发明授权

US5638246A Semiconductor device having a protection circuit, and electronic system including the same 失效
标题翻译：具有保护电路的半导体装置和包括该保护电路的电子系统
公开(公告)号：US5638246A
公开(公告)日：1997-06-10
申请号：US10572
申请日：1993-01-28
申请人： Kozo Sakamoto , Isao Yoshida , Masatoshi Morikawa , Shigeo Ohtaka , Hideki Tsunoda
发明人： Kozo Sakamoto , Isao Yoshida , Masatoshi Morikawa , Shigeo Ohtaka , Hideki Tsunoda
IPC分类号： H02H5/04 , H03K17/08 , H03K17/082
CPC分类号： H02H5/044 , H03K17/0822 , H03K2017/0806
摘要： In a semiconductor device including a power MOSFET (M.sub.0) for the output stage, a temperature detection circuit produces an output signal upon detecting an abnormal rise in the chip temperature, the signal turns on a set input element (M.sub.1) in a latch circuit so that the latch circuit becomes a set state, the set output of the latch circuit turns on a control element (M.sub.5), causing the power MOSFET to become non-conductive so that it is protected from destruction. The latch circuit is not brought to a reset state even if the external gate terminal of the device is brought to zero volt. With a voltage outside the range of the normal input signal, e.g., a large negative voltage, being applied to the external gate terminal, the gate capacitance of the control element (M.sub.5) discharges, and consequently the latch circuit is brought to the reset state and the protective operation is cancelled. The semiconductor device is further provided with an external reset terminal, and the protective operation can also be cancelled through the application of a reset signal to the external reset terminal. The semiconductor device is protected from destruction and also from deterioration of characteristics of the power MOSFET (M.sub.0), and yet the protective operation is not cancelled erroneously by the normal input signal.
摘要翻译：在包括用于输出级的功率MOSFET（M0）的半导体器件中，温度检测电路在检测到芯片温度的异常升高时产生输出信号，该信号使锁存电路中的设定输入元件（M1）接通，从而锁存电路变为置位状态，锁存电路的设定输出导通控制元件（M5），使功率MOSFET变得不导通，从而防止其破坏。即使器件的外部栅极端子达到零伏，锁存电路也不会进入复位状态。在外部栅极端子施加正常输入信号（例如，大的负电压）的范围之外的电压时，控制元件（M5）的栅极电容放电，因此锁存电路进入复位状态并且保护操作被取消。半导体器件还具有外部复位端子，并且还可以通过向外部复位端子施加复位信号来取消保护操作。保护半导体器件不受破坏，也可以防止功率MOSFET（M0）的特性恶化，而保护操作也不会被正常输入信号错误地消除。

82. 发明授权

US5264053A Production method for a vehicular endless track bushing 失效
标题翻译：车辆环形轨道衬套的生产方法
公开(公告)号：US5264053A
公开(公告)日：1993-11-23
申请号：US941262
申请日：1992-09-04
申请人： Masahiro Nakajima , Hisahiko Kusano , Isao Yoshida , Yoshio Hamajima , Hiroyuki Takeno
发明人： Masahiro Nakajima , Hisahiko Kusano , Isao Yoshida , Yoshio Hamajima , Hiroyuki Takeno
IPC分类号： B62D55/205 , C21D9/14 , C21D1/10 , C21D1/18
CPC分类号： C21D9/14 , B62D55/205
摘要： A production method for an endless track bushing wherein high-carbon low-alloy steel is selected as a bushing material, the bushing material is quench-hardened without pre-carburizing the bushing material, and then tempered. In the quench-hardening, the bushing material is induction-heated from an outside surface of the bushing material only so that an inside surface of the bushing material is heated to a temperature above and close to a transformation temperature of the high-carbon low-alloy steel, and then the heated bushing material is cooled from the outside surface of the bushing material only so that a residual compressive stress is produced at the inside surface of the bushing material when it has been cooled to an ambient temperature. The thus produced bushing has a high hardness throughout the entire cross section and a high toughness.
摘要翻译：选择高碳低合金钢作为衬套材料的环形履带衬套的制造方法，将衬套材料淬火硬化而不对衬套材料进行预渗碳，然后回火。在淬火硬化中，衬套材料仅从衬套材料的外表面进行感应加热，使得衬套材料的内表面被加热到高于和接近高碳低温转变温度的转变温度的温度，合金钢，然后加热的衬套材料仅从衬套材料的外表面冷却，使得当衬套材料已被冷却到环境温度时，在衬套材料的内表面产生残留的压缩应力。由此制造的衬套在整个横截面上具有高硬度和高韧性。

83. 发明授权

US5021890A Method of and apparatus for facsimile communications 失效
标题翻译：传真通讯方法及装置
公开(公告)号：US5021890A
公开(公告)日：1991-06-04
申请号：US326801
申请日：1989-03-21
申请人： Isao Yoshida , Hidetoshi Inoue , Kanji Arai
发明人： Isao Yoshida , Hidetoshi Inoue , Kanji Arai
IPC分类号： H04N1/00 , H04M11/00 , H04N1/32 , H04N1/333
CPC分类号： H04N1/33346 , H04N1/33307
摘要： Stable facsimile communications and reduced deterioration in image quality are achieved, when standard facsimile apparatuses communicate using a communication network composed a subnetwork with relatively good transmission quality such as a wire system and a subnetwork with relatively bad transmission quality such a mobile system subnetwork, both subnetworks being interspersed between the facsimile apparatuses, by inserting a pair of FAX signal converting apparatuses into the communication channel between the facsimile apparatuses for error control responsive to the quality of the channel in use.

84. 发明授权

US4599576A Insulated gate type field effect semiconductor device and a circuit employing the device 失效
标题翻译：绝缘栅型场效应半导体器件和采用该器件的电路
公开(公告)号：US4599576A
公开(公告)日：1986-07-08
申请号：US882625
申请日：1978-03-01
申请人： Isao Yoshida , Takeaki Okabe , Shikayuki Ochi , Hidefumi Ito , Masatomo Furumi , Masaru Takeuchi , Minoru Nagata
发明人： Isao Yoshida , Takeaki Okabe , Shikayuki Ochi , Hidefumi Ito , Masatomo Furumi , Masaru Takeuchi , Minoru Nagata
IPC分类号： H01L21/8238 , H01L27/02 , H01L27/092 , H01L29/78 , H03F3/30 , H03F3/16 , H03F3/18
CPC分类号： H03F3/3001 , H01L27/0251 , H01L27/092 , H01L29/78 , H01L29/7835 , H01L2224/48472 , H01L2924/1305 , H01L2924/13091
摘要： An insulated gate type field effect transistor for high power which has a low conductivity region surrounding a drain region and an offset gate region having a further lower conductivity adjoined thereto, wherein the length and impurity concentration are designed according to the electric characteristics of the transistor. A combination of P channel and N channel type transistors having substantially the same electric characteristics and an audio amplifying circuit using the combination are also disclosed.
摘要翻译：一种用于高功率的绝缘栅型场效应晶体管，其具有围绕漏极区域的低导电性区域和与其相邻的更低导电率的偏移栅极区域，其中根据晶体管的电特性设计长度和杂质浓度。还公开了具有基本相同电特性的P沟道和N沟道型晶体管的组合以及使用该组合的音频放大电路。

85. 发明授权

US4492974A DMOS With gate protection diode formed over base region 失效
标题翻译： DMOS在基极区域形成栅极保护二极管
公开(公告)号：US4492974A
公开(公告)日：1985-01-08
申请号：US350589
申请日：1982-02-22
申请人： Isao Yoshida , Takeaki Okabe , Mineo Katsueda , Minoru Nagata , Toshiaki Masuhara , Kazutoshi Ashikawa , Hideaki Kato , Mitsuo Ito , Shigeo Ohtaka , Osamu Minato , Yoshio Sakai
发明人： Isao Yoshida , Takeaki Okabe , Mineo Katsueda , Minoru Nagata , Toshiaki Masuhara , Kazutoshi Ashikawa , Hideaki Kato , Mitsuo Ito , Shigeo Ohtaka , Osamu Minato , Yoshio Sakai
IPC分类号： H01L27/02 , H01L27/04 , H01L27/06 , H01L29/78 , H01L29/861 , H01L29/90 , H02H3/20
CPC分类号： H01L29/7811 , H01L27/0255 , H01L27/0688 , H01L29/7808 , H01L29/861 , H01L2924/0002
摘要： A semiconductor integrated circuit device is provided to include a vertical type MOSFET and a gate protection element for the MOSFET. The vertical type MOSFET is made up of a silicon layer of n-type conductivity formed on an n.sup.+ -type silicon substrate, a base region of p-type conductivity formed in the surface of the silicon layer of n-type conductivity, an n.sup.+ -type source region provided in the base region, and a gate electrode formed on a portion of the base region through a gate insulating film. The silicon substrate serves as the drain. The gate protection element is formed of a polycrystalline silicon layer which is provided on the base region through an insulating film and includes at least one pn junction. By virtue of forming the gate protection element over the base region rather than directly over the substrate, a more stable operation is achieved.
摘要翻译：提供半导体集成电路器件以包括用于MOSFET的垂直型MOSFET和栅极保护元件。垂直型MOSFET由n +型硅衬底上形成的n型导电硅层，n型导电性硅层表面形成的p型导电基极区，n +型硅衬底，设置在基极区域中的源极区，以及通过栅极绝缘膜形成在基极区域的一部分上的栅电极。硅衬底用作漏极。栅极保护元件由多晶硅层形成，该多晶硅层通过绝缘膜设置在基极区上并且包括至少一个pn结。通过在基极区域而不是直接在衬底上形成栅极保护元件，实现更稳定的操作。

86. 发明授权

US4234835A Speed control apparatus for DC motor 失效
标题翻译：直流电机调速装置
公开(公告)号：US4234835A
公开(公告)日：1980-11-18
申请号：US957577
申请日：1978-11-03
申请人： Mitsuharu Ota , Isao Yoshida , Hiromitsu Nakano
发明人： Mitsuharu Ota , Isao Yoshida , Hiromitsu Nakano
IPC分类号： H02P7/288 , H02P5/16
CPC分类号： H02P7/2885 , Y10S388/93
摘要： Speed control apparatus for DC motor comprising a current mirror circuit including a first transistor 11 and second transistors 12-14 with their bases connected in common, the collectors of the second transistors 12-14 being in-common connected to one end of the DC motor 9 so as to control the motor current, the bases of the transistors being fed with such base current that saturates the transistors, thereby to raise their maximum controlling torque and starting torque of the DC motor.
摘要翻译：用于直流电动机的速度控制装置包括电流镜电路，该电流镜电路包括第一晶体管11和第二晶体管12-14，它们的基极共同连接，第二晶体管12-14的集电极共同连接到直流电动机的一端为了控制电动机电流，晶体管的基极馈送有使晶体管饱和的基极电流，从而提高其最大控制转矩和直流电动机的启动转矩。

87. 发明授权

US08741544B2 Salt, photoresist composition and method for producing photoresist pattern 有权
标题翻译：盐，光致抗蚀剂组合物和制造光致抗蚀剂图案的方法
公开(公告)号：US08741544B2
公开(公告)日：2014-06-03
申请号：US13589852
申请日：2012-08-20
申请人： Isao Yoshida , Yuichi Mukai , Koji Ichikawa
发明人： Isao Yoshida , Yuichi Mukai , Koji Ichikawa
IPC分类号： G03F7/00 , C07C317/06 , C07C309/19 , C07C309/07
CPC分类号： C07C381/12 , C07C309/06 , C07C309/10 , C07C309/12 , C07C309/17 , C07C2601/14 , C07C2603/74 , C07D307/00 , G03F7/0045 , G03F7/0046 , G03F7/0397 , G03F7/2041
摘要： A photoresist composition containing a resin that is hardly soluble or insoluble, but which is soluble in an aqueous alkali solution by action of an acid, and a salt represented by formula (I): wherein Q1, Q2, L1, W1, W2, R1, R2, t1 and t2 are defined in the specification, and Z+ represents an organic cation.
摘要翻译：含有难溶性或不溶性但通过酸作用而溶于碱性水溶液的树脂的光致抗蚀剂组合物和式（I）表示的盐：其中Q1，Q2，L1，W1，W2，R1 在说明书中定义了R2，t1和t2，Z +表示有机阳离子。

88. 发明授权

US08735044B2 Salt and photoresist composition containing the same 有权
标题翻译：含有其的盐和光致抗蚀剂组合物
公开(公告)号：US08735044B2
公开(公告)日：2014-05-27
申请号：US12786738
申请日：2010-05-25
申请人： Koji Ichikawa , Isao Yoshida
发明人： Koji Ichikawa , Isao Yoshida
IPC分类号： G03F7/039 , C07C303/32 , G03F7/004
CPC分类号： G03F7/039 , C07C303/32 , C07C309/17 , C07C381/12 , C07C2601/14 , C07C2603/74 , G03F7/0045 , G03F7/0046 , G03F7/0397 , Y10S430/106 , Y10S430/111 , Y10S430/122 , Y10S430/123
摘要： A salt represented by the formula (a): wherein Q1 and Q2 each independently represent a fluorine atom etc., X1 represents a single bond etc., X2 represents a single bond etc., Y1 represents a C3-C6 alicyclic hydrocarbon group etc., with the proviso that —X2—Y1 group has one or more fluorine atoms, and Z+ represents an organic counter cation, and a photoresist composition comprising the salt represented by the formula (a) and a resin comprising a structural unit having an acid-labile group and being insoluble or poorly soluble in an aqueous alkali solution but becoming soluble in an aqueous alkali solution by the action of an acid.
摘要翻译：由式（a）表示的盐：其中Q1和Q2各自独立地表示氟原子等，X1表示单键等，X2表示单键等，Y1表示C3-C6脂肪族烃基等。条件是-X2-Y1基团具有一个或多个氟原子，Z +表示有机抗衡阳离子，以及包含由式（a）表示的盐的光致抗蚀剂组合物和包含具有酸性基团的结构单元的树脂，不稳定的基团，并且在碱性水溶液中不溶或难溶，但是通过酸的作用变得可溶于碱性水溶液。

89. 发明授权

US08685617B2 Salt, photoresist composition and process for producing photoresist pattern 有权
标题翻译：盐，光致抗蚀剂组合物和制造光致抗蚀剂图案的方法
公开(公告)号：US08685617B2
公开(公告)日：2014-04-01
申请号：US13333521
申请日：2011-12-21
申请人： Koji Ichikawa , Isao Yoshida , Yuki Suzuki
发明人： Koji Ichikawa , Isao Yoshida , Yuki Suzuki
IPC分类号： G03F7/004 , G03F7/028 , C07C309/02 , C07C309/04 , C07C309/06
CPC分类号： C07C309/17 , C07C2603/74 , C07D307/33 , C07D307/93 , G03F7/0045 , G03F7/0046 , G03F7/0397 , G03F7/2041
摘要： A salt represented by the formula (I): wherein Q1, Q2, L1, L2, ring W, s, t, R1, R2 and Z+ are defined in the specification.
摘要翻译：由式（I）表示的盐：其中Q1，Q2，L1，L2，环W，s，t，R1，R2和Z +在说明书中定义。

90. 发明授权

US08482058B2 Semiconductor device including a power MISFET 有权
标题翻译：包括功率MISFET的半导体器件
公开(公告)号：US08482058B2
公开(公告)日：2013-07-09
申请号：US13486153
申请日：2012-06-01
申请人： Yutaka Hoshino , Shuji Ikeda , Isao Yoshida , Shiro Kamohara , Megumi Kawakami , Tomoyuki Miyake , Masatoshi Morikawa
发明人： Yutaka Hoshino , Shuji Ikeda , Isao Yoshida , Shiro Kamohara , Megumi Kawakami , Tomoyuki Miyake , Masatoshi Morikawa
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L27/10 , H01L29/74
CPC分类号： H01L29/66659 , H01L21/823475 , H01L21/823871 , H01L23/4827 , H01L23/53219 , H01L23/53295 , H01L27/0255 , H01L27/088 , H01L29/0692 , H01L29/0696 , H01L29/0847 , H01L29/086 , H01L29/1045 , H01L29/105 , H01L29/1083 , H01L29/4175 , H01L29/41758 , H01L29/42368 , H01L29/4238 , H01L29/4916 , H01L29/7835 , H01L29/861 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (4), to which a first layer wirings 11a, 11d (M1) are connected and, further, backing second layer wirings 12a to 12d are connected on the conductor plugs 13 (P1) to the first layer wirings 11s, 11d (M1).
摘要翻译：在具有漏极偏移区域的高频放大MOSFET中，通过在源极区域10，漏极区域9和浸出层9上引出电极的导体插头13（P1）来减小尺寸并降低导通电阻。连接有第一层布线11a，11d（M1）的第3层（4），另外，背面的第二层布线12a〜12d在导体插塞13（P1）上连接到第一层布线11s，11d（M1 ）。

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