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    • 85. 发明申请
    • Memory device and control method therefor
    • 存储器及其控制方法
    • US20060227629A1
    • 2006-10-12
    • US11378444
    • 2006-03-16
    • Koji ShimbayashiTakaaki FuruyamaKenji Shibata
    • Koji ShimbayashiTakaaki FuruyamaKenji Shibata
    • G11C7/06
    • G11C7/08G11C7/1018G11C16/26G11C16/32
    • An access identification circuit (4) identifies a first access operation or a second access operation and outputs an identification signal S. During the first access operation, stored data is read out after detecting a column address CADD, a burst address, and updating a word line to newly select memory cells MC. In the second access operation, the memory cells MC connected to the common word line which has been selected are selected by sequentially switching column selector switches. Operating condition information Dx (DAx and/or DBx) used for setting a load condition in a dummy load circuit (5) and/or setting a pulse width for an equalize signal EQ in an amplification control circuit (6) is stored in each of first and second storage sections (1, 2) that are provided for the first and second access operations, respectively. The operating condition information Dx is selected by a selector circuit (3) in response to the identification signal S and fed to the dummy load circuit (5) and/or the amplification control circuit (6). A suitable operating condition is selected for each of the access operations.
    • 访问识别电路(4)识别第一访问操作或第二访问操作并输出识别信号S.在第一访问操作期间,在检测列地址CADD,突发地址和更新字之后读出存储的数据 行新选择存储单元MC。 在第二访问操作中,通过依次切换列选择器开关来选择连接到所选择的公共字线的存储单元MC。 在放大控制电路(6)中用于设置虚拟负载电路(5)中的负载条件和/或设定均衡信号EQ的脉冲宽度的工作条件信息Dx(DAx和/或DBx)被存储在 分别为第一和第二存取操作提供的第一和第二存储部分(1,2)。 操作条件信息Dx由选择器电路(3)响应于识别信号S选择并馈送到虚拟负载电路(5)和/或放大控制电路(6)。 为每个访问操作选择合适的操作条件。
    • 87. 发明授权
    • Current-voltage converter circuit and its control method
    • 电流 - 电压转换电路及其控制方法
    • US07046043B2
    • 2006-05-16
    • US11061119
    • 2005-02-18
    • Kenji ShibataSatoru Kawamoto
    • Kenji ShibataSatoru Kawamoto
    • G01R19/00
    • G11C16/28
    • An input current flowing into a current-voltage conversion circuit (1) is converted to a voltage value at an output terminal SAIN and, then, a differential amplification circuit (5) amplifies and outputs a differential voltage between the voltage value and the reference voltage Vref. PMOS and NMOS transistors T1, T2 are connected between the output terminal SAIN and the power-supply voltage VCC. After the output terminal SAIN is precharged to the power-supply voltage VCC by making the transistors conductive, the current-voltage conversion operation is performed by making a voltage drop corresponding to the input current. The precharge operation precharges the output terminal SAIN up to the power-supply voltage VCC and supplies precharge to a common data line N3 and bit lines.
    • 流入电流 - 电压转换电路(1)的输入电流被转换为输出端子SAIN处的电压值,然后差分放大电路(5)放大并输出电压值与基准电压之间的差分电压 Vref。 PMOS和NMOS晶体管T 1,T 2连接在输出端子SAIN和电源电压VCC之间。 在通过使晶体管导通来将输出端子SAIN预充电到电源电压VCC之后,通过使与输入电流相对应的电压降来执行电流 - 电压转换操作。 预充电操作将输出端子SAIN预充电到电源电压VCC,并将预充电提供给公共数据线N 3和位线。
    • 89. 发明授权
    • Cell multiplexing system and method for an ATM network
    • ATM网络的小区复用系统和方法
    • US06721326B1
    • 2004-04-13
    • US09524321
    • 2000-03-13
    • Kenji Shibata
    • Kenji Shibata
    • H04L1228
    • H04L49/3081H04L12/5601H04L2012/5615H04L2012/5656H04L2012/5672
    • A multiplexing system in an ATM network is disclosed. The system produces low deviation in generation timing of a standard ATM cell and low transmission delay to realize high transmission efficiency. A cell multiplexing means is provided for assembling data received from a plurality of terminal lines into a short cell to be multiplexed into a standard ATM cell. A short cell is selected from a plurality of short cells to define a reference line. The short cell generation timing of the reference line is used as the reference timing to generate short cells for other lines so as to synchronize the generation timing. The short cells thus generated are then multiplexed into a standard ATM cell.
    • 公开了ATM网络中的复用系统。 该系统产生标准ATM信元的生成定时偏差小,传输延迟低,实现高传输效率。 提供了一个单元复用装置,用于将从多个终端线路接收到的数据组装成一个要被复用到标准ATM信元的短信元。 从多个短单元中选择短单元以限定参考线。 基准线的短信元生成定时被用作生成用于其它行的短信元的基准定时,以便同步发生定时。 然后将由此产生的短信元复用到标准ATM信元中。