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81. 发明授权

US5890058A Electronic circuit and filter device using same 失效
标题翻译：电子电路和过滤器使用相同
公开(公告)号：US5890058A
公开(公告)日：1999-03-30
申请号：US715345
申请日：1996-09-18
申请人： Takashi Ueno , Tetsuro Itakura , Hiroshi Tanimoto
发明人： Takashi Ueno , Tetsuro Itakura , Hiroshi Tanimoto
IPC分类号： H03H11/04 , H04B1/40
CPC分类号： H03H11/04
摘要： In an FDNR type active filter fabricated on an integrated circuit, an FDNR circuit is provided wherein one ends of a first capacitor and an impedance element are connected to an inverted input of an operational amplifier, one ends of the impedance element and a second capacitor are connected to an output end of the operational amplifier, and the other ends of the first and second capacitors are connected to each other. To the impedance element, resistors are connected in series. To the connecting end of the resistors, one end of another resistor is connected, the other end thereof being grounded in an alternating current form. The capacity value of the second capacitor is greater than that of the first capacitor.
摘要翻译：在集成电路上制造的FDNR型有源滤波器中，提供FDNR电路，其中第一电容器和阻抗元件的一端连接到运算放大器的反相输入，阻抗元件的一端和第二电容器连接到运算放大器的输出端，并且第一和第二电容器的另一端彼此连接。阻抗元件串联连接电阻。电阻器的连接端连接另一个电阻的一端，另一端以交流形式接地。第二电容器的容量值大于第一电容器的容量值。

82. 发明授权

US5162670A Sample-and-hold circuit device 失效
标题翻译：采样保持电路设备
公开(公告)号：US5162670A
公开(公告)日：1992-11-10
申请号：US636427
申请日：1990-12-28
申请人： Tetsuro Itakura , Takeshi Shima
发明人： Tetsuro Itakura , Takeshi Shima
IPC分类号： G09G3/36 , G11C27/02
CPC分类号： G11C27/026 , G11C27/024 , G09G2310/0289 , G09G3/3688
摘要： A sample-and-hold circuit includes a first switch element which is opened or closed in accordance with a first control signal so as to selectively connect an input signal terminal for receiving an input signal to an internal terminal, a non-linear element for connecting the internal terminal to an output terminal, a potential holding circuit connected between the output terminal and ground, and a second switch element or a current source circuit which is controlled by a second control signal so as to selectively connect the output terminal to ground.

83. 发明授权

US08835830B2 Voltage output circuit, connector module, and active cable 有权
标题翻译：电压输出电路，连接器模块和有源电缆
公开(公告)号：US08835830B2
公开(公告)日：2014-09-16
申请号：US13308646
申请日：2011-12-01
申请人： Hiroshi Uemura , Ippei Akita , Tetsuro Itakura , Hideto Furuyama
发明人： Hiroshi Uemura , Ippei Akita , Tetsuro Itakura , Hideto Furuyama
IPC分类号： H01J40/12 , H04B10/25 , H04B10/69
CPC分类号： H04B10/69 , H04B10/25
摘要： According to one embodiment, a circuit comprises a first resistor configured to have one end to which a first voltage is input and the other end which outputs a second voltage and a first amplifier configured to have an inverting input connected to the other end of the first resistor and a noninverting input to which a third voltage is input. The circuit further comprises a first capacitor configured to have one end to which an output of the first amplifier is input and the other end to which the other end of the first resistor is connected. An output of the first amplifier or an output of a second amplifier connected to the other end of the first resistor is a fourth voltage. In the circuit, the first resistor and a mirror capacitance composed of the first capacitor and the first amplifier constitute a low-pass filter.
摘要翻译：根据一个实施例，电路包括第一电阻器，其被配置为具有输入第一电压的一端和输出第二电压的另一端和配置成具有连接到第一电压的另一端的反相输入的第一放大器电阻器和输入第三电压的同相输入端。电路还包括第一电容器，其被配置为具有输入第一放大器的输出的一端和第一电阻器的另一端连接到的另一端。连接到第一电阻器的另一端的第一放大器的输出或第二放大器的输出是第四电压。在该电路中，由第一电容器和第一放大器组成的第一电阻器和反射镜电容器构成低通滤波器。

84. 发明申请

US20110235367A1 DC TO DC CONVERTER 有权
标题翻译：直流到直流转换器
公开(公告)号：US20110235367A1
公开(公告)日：2011-09-29
申请号：US12878271
申请日：2010-09-09
申请人： Takeshi Ueno , Tetsuro Itakura
发明人： Takeshi Ueno , Tetsuro Itakura
IPC分类号： H02M3/24
CPC分类号： H02M3/1563
摘要： A DC to DC converter includes an input terminal, an output terminal, first and second switches, an inductor, a smoothing unit, a first impedance element, a first resistor element, an operational amplifier and a control unit. The first switch is connected to the input terminal. The second switch is connected to the first switch and a ground terminal. The inductor is connected to the first switch and the output terminal. The smoothing unit is connected to the inductor and the ground terminal. The first impedance element is connected to the smoothing unit. The first resistor element is connected in series with the first impedance element. The operational amplifier is connected to the first impedance element. Reference voltage is added to the operational amplifier. The control unit controls the first and second switches according to a control signal outputted from the operational amplifier.
摘要翻译： DC-DC转换器包括输入端子，输出端子，第一和第二开关，电感器，平滑单元，第一阻抗元件，第一电阻元件，运算放大器和控制单元。第一个开关连接到输入端。第二开关连接到第一开关和接地端子。电感器连接到第一开关和输出端子。平滑单元连接到电感器和接地端子。第一阻抗元件连接到平滑单元。第一电阻元件与第一阻抗元件串联连接。运算放大器连接到第一阻抗元件。参考电压加到运算放大器上。控制单元根据从运算放大器输出的控制信号来控制第一和第二开关。

85. 发明授权

US07676528B2 Image data processing apparatus and image data processing method 失效
标题翻译：图像数据处理装置和图像数据处理方法
公开(公告)号：US07676528B2
公开(公告)日：2010-03-09
申请号：US11231762
申请日：2005-09-22
申请人： Haruhiko Okumura , Tetsuro Itakura , Hironori Minamizaki
发明人： Haruhiko Okumura , Tetsuro Itakura , Hironori Minamizaki
IPC分类号： G09G5/00
CPC分类号： G06F3/1415 , G09G3/2096 , G09G3/3688 , G09G5/006 , G09G5/008 , G09G2310/027 , G09G2330/06 , G09G2340/16 , G09G2370/045 , G09G2370/047
摘要： An image data processing apparatus includes: a data dividing unit dividing arithmetic image data into arithmetic pixel data corresponding to a signal line of a display device; an adder adding first data and second data; and a data delaying unit delaying the added data, wherein the first data is the divided arithmetic pixel data from the data dividing unit, and the second data is the delayed added arithmetic pixel data from the data delaying unit.
摘要翻译：图像数据处理装置包括：数据划分单元，将运算图像数据分割成与显示装置的信号线对应的算术像素数据; 加法器，其添加第一数据和第二数据; 以及数据延迟单元延迟所添加的数据，其中所述第一数据是来自所述数据分割单元的分割的运算像素数据，并且所述第二数据是来自所述数据延迟单元的延迟加法运算像素数据。

86. 发明申请

US20090322326A1 Magnetic field probe, current distribution measuring device and radio device 审中-公开
标题翻译：磁场探头，电流分布测量装置和无线电装置
公开(公告)号：US20090322326A1
公开(公告)日：2009-12-31
申请号：US12379250
申请日：2009-02-17
申请人： Takayoshi Ito , Tetsuro Itakura , Shuichi Obayashi
发明人： Takayoshi Ito , Tetsuro Itakura , Shuichi Obayashi
IPC分类号： G01R33/00
CPC分类号： G01R33/0283 , G01R15/181
摘要： There is provided a magnetic field probe which includes: a probe body which is a coaxial cable wound to form a plurality of loop-like portions in planar view, the coaxial cable including an inner conductor, an insulator enclosing the inner conductor and an outer conductor enclosing the insulator; and a plurality of notches each of which is formed in each of the loop-like portions so that the outer conductor is divided to expose the inner conductor or the insulator, wherein: a plurality of outer conductor parts resulting from division by the notches are arranged to be electrically connected to each other, an one end of the inner conductor in the coaxial cable is connected to any one of the outer conductor parts; and winding directions of at least one of a pair of loop-like portions among the loop-like portions are reversed from each other in planar view.
摘要翻译：提供了一种磁场探针，其包括：探针体，其是在平面图中缠绕以形成多个环状部分的同轴电缆，所述同轴电缆包括内部导体，包围内部导体的绝缘体和外部导体封闭绝缘体; 以及多个凹口，每个凹槽形成在每个环状部分中，使得外部导体被分割以暴露内部导体或绝缘体，其中：由凹口划分产生的多个外部导体部件布置彼此电连接，同轴电缆中的内部导体的一端连接到任何一个外部导体部分; 并且在环状部分中的一对环状部分中的至少一个的卷绕方向在平面视图中彼此相反。

87. 发明授权

US07538585B2 Transconductor 失效
标题翻译：跨导体
公开(公告)号：US07538585B2
公开(公告)日：2009-05-26
申请号：US11847503
申请日：2007-08-30
申请人： Rui Ito , Tetsuro Itakura
发明人： Rui Ito , Tetsuro Itakura
IPC分类号： H02M11/00 , H03F3/45
CPC分类号： H03G1/0029 , H03F1/3211 , H03F3/45179 , H03F3/45475 , H03F2203/45318 , H03F2203/45342 , H03F2203/45352 , H03F2203/45398 , H03H11/04
摘要： Disclosed is a transconductor including: first and second transistors each having first and second gates, the first and second gates being independently controlled, differential voltage input being supplied between the one first gate and the other first gate, the one source and the other source being connected, a first control voltage being commonly given to both of the second gates, and the drains being differential current output terminals; third and fourth transistors each having the same connection as the first and second transistors, each of the one drain and the other drain being connected with either of the one drain and the other drain of the first and the second transistors so that polarities are opposite to each other; and a current source connected with both of the sources of the first and the second transistors and both of the sources of the third and the fourth transistors.
摘要翻译：公开了一种跨导体，包括：第一和第二晶体管，每个具有第一和第二栅极，第一和第二栅极被独立地控制，差分电压输入被提供在一个第一栅极和另一个第一栅极之间，一个源极和另一个源极所述第一控制电压通常被提供给所述第二栅极，并且所述漏极是差动电流输出端子; 第三和第四晶体管各自具有与第一和第二晶体管相同的连接，一个漏极和另一个漏极中的每一个与第一和第二晶体管的一个漏极和另一个漏极中的任一个连接，使得极性与彼此; 以及与第一和第二晶体管的源极以及第三和第四晶体管的源极两者连接的电流源。

88. 发明授权

US07532069B2 Differential amplifying circuit 失效
标题翻译：差分放大电路
公开(公告)号：US07532069B2
公开(公告)日：2009-05-12
申请号：US12173431
申请日：2008-07-15
申请人： Tomohiko Ito , Tetsuro Itakura
发明人： Tomohiko Ito , Tetsuro Itakura
IPC分类号： H03F3/45
CPC分类号： H03F3/45179
摘要： Disclosed is a differential amplifying circuit including an amplifying circuit, wherein 1) a drain of a sixth transistor is connected to a drain of an eighth transistor, and a drain of a tenth transistor is connected to a drain of a fourth transistor, and 2) a ratio between a total of gate widths of the fourth (or eighth) and tenth (or sixth) transistors (converted per unit gate length, and gate widths that follow are the same) and a gate width of a fifth (or ninth) transistor is nearly proportional to a current ratio between a first (or third) and second (or fourth) current source circuits, the gate width of the fourth (or eighth) transistor being equal to or more than that of the tenth (or sixth) transistor.
摘要翻译：公开了一种包括放大电路的差分放大电路，其中1）第六晶体管的漏极连接到第八晶体管的漏极，第十晶体管的漏极连接到第四晶体管的漏极，以及2）第四（或第八）和第十（或第六）晶体管（每单位栅极长度转换，并且随后的栅极宽度相同）的栅极宽度的总和与第五（或第九）晶体管几乎与第一（或第三）和第二（或第四）电流源电路之间的电流比成比例，第四（或第八）晶体管的栅极宽度等于或大于第十（或第六）晶体管的栅极宽度。

89. 发明申请

US20080309436A1 MULTI-INPUT MULTI-OUTPUT AMPLIFIER, AN ACTIVE INDUCTOR, A FILTER AND A RADIO COMMUNICATION DEVICE 审中-公开
标题翻译：多输入多输出放大器，有源电感器，滤波器和无线电通信装置
公开(公告)号：US20080309436A1
公开(公告)日：2008-12-18
申请号：US12051098
申请日：2008-03-19
申请人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
发明人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
IPC分类号： H03H11/00 , H03F3/00 , H04L25/00
CPC分类号： H04L27/3854 , H03F3/19 , H03F3/211 , H03F2200/451 , H04B1/40 , H04L27/233
摘要： A non-inverting amplifier includes n external input terminals which receive n (n≧3) input voltage signals having a constant sum of voltages, respectively, n amplification units each including n−1 internal input terminals connected to n−1 terminals of the n external input terminals in a different combination for each of the amplification units, n−1 voltage-to-current converters which convert input voltage signals from the internal input terminals into current signals, and a load which converts an added current signal obtained by adding up the current signals into an output voltage signal, and n external output terminals which output n output voltage signals from the n amplification units.
摘要翻译：非反相放大器包括n个外部输入端子，其分别接收具有恒定电压和的n（n> = 3）个输入电压信号，n个放大单元，每个放大单元包括n-1个内部输入端子，其连接到 n个不同组合的外部输入端子用于每个放大单元，n-1个电压 - 电流转换器，其将来自内部输入端子的输入电压信号转换为电流信号;以及负载，其将通过添加获得的相加电流信号将电流信号提升为输出电压信号，以及从n个放大单元输出n个输出电压信号的n个外部输出端子。

90. 发明授权

US07414472B2 Differential amplifying circuit 有权
标题翻译：差分放大电路
公开(公告)号：US07414472B2
公开(公告)日：2008-08-19
申请号：US11618071
申请日：2006-12-29
申请人： Tomohiko Ito , Tetsuro Itakura
发明人： Tomohiko Ito , Tetsuro Itakura
IPC分类号： H03F3/45
CPC分类号： H03F3/45179
摘要： Disclosed is a differential amplifying circuit including an amplifying circuit, wherein 1) a drain of a sixth transistor is connected to a drain of an eighth transistor, and a drain of a tenth transistor is connected to a drain of a fourth transistor, and 2) a ratio between a total of gate widths of the fourth (or eighth) and tenth (or sixth) transistors (converted per unit gate length, and gate widths that follow are the same)and a gate width of a fifth (or ninth) transistor is nearly proportional to a current ratio between a first (or third) and second (or fourth) current source circuits, the gate width of the fourth (or eighth) transistor being equal to or more than that of the tenth (or sixth) transistor.
摘要翻译：公开了一种包括放大电路的差分放大电路，其中1）第六晶体管的漏极连接到第八晶体管的漏极，第十晶体管的漏极连接到第四晶体管的漏极，以及2）第四（或第八）和第十（或第六）晶体管（每单位栅极长度转换，并且随后的栅极宽度相同）的栅极宽度的总和与第五（或第九）晶体管与第一（或第三）和第二（或第四）电流源电路之间的电流比几乎成比例，第四（或第八）晶体管的栅极宽度等于或大于第十（或第六）晶体管的栅极宽度。

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