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    • 81. 发明授权
    • Cancellation of inductor winding capacitance
    • 消除电感绕组电容
    • US07554423B2
    • 2009-06-30
    • US11552292
    • 2006-10-24
    • Shuo WangFred C. Lee
    • Shuo WangFred C. Lee
    • H03H7/00H01F27/28
    • H01F17/062H01F27/34H01F27/38H03H7/427H03H2001/0035H03H2001/0057H03H2001/0092
    • An inductor device or filter such as an electromagnetic interference (EMI) filter which includes an inductor provides cancellation of parasitic capacitance of the inductor and extends high frequency performance of the inductor or filter by providing the inductor using split windings and including capacitors to couple signals corresponding to those which are passed by the equivalent parallel capacitance of the inductor to another split winding or an inductor in the ground return path. Cancellation of parasitic capacitance is provided for differential mode and common mode split windings where the split windings may be either inductively coupled or not. Forming the split windings as a bifilar winding to increase coupling coefficient further improves performance and allows cancellation (as distinct from parasitic capacitance reduction) and avoidance of resonance in circuits in which an inductor is not permitted in the ground return path.
    • 包括电感器的电感器件或滤波器例如电磁干扰(EMI)滤波器提供消除电感器的寄生电容,并通过使用分离绕组提供电感并且包括电容器来耦合相应的信号来延长电感器或滤波器的高频性能 通过电感器的等效并联电容到另一个分离绕组或接地返回路径中的电感器的那些。 为差分模式和共模分离绕组提供寄生电容的消除,其中分离绕组可以感应耦合或不耦合。 形成双绕组作为双线绕组以增加耦合系数进一步提高了性能,并允许抵消(与寄生电容降低不同)和避免在接地返回路径中不允许电感的电路中的谐振。
    • 82. 发明授权
    • Generalized cancellation of inductor winding capacitance
    • 电感绕组电容的广义消除
    • US07548137B2
    • 2009-06-16
    • US11850762
    • 2007-09-06
    • Shuo WangFred C. Lee
    • Shuo WangFred C. Lee
    • H03H7/00H01F30/00H01F30/16
    • H01F17/062H01F27/34H01F27/38H03H7/427H03H2001/0035H03H2001/005H03H2001/0057H03H2001/0092
    • An inductor device or filter such as an electromagnetic interference (EMI) filter which includes an inductor provides cancellation of parasitic capacitance of the inductor and extends high frequency performance of the inductor or filter by using an inductor network (a special case being split windings) and including capacitors to couple signals corresponding to those which are passed by the equivalent parallel capacitance of an inductor of a network of inductors such as in a multi-phase power supply of voltage converter to another inductor terminal, ground or an inductor in the ground return path. Cancellation of parasitic capacitance is provided for differential mode and common mode windings where the windings may be either inductively coupled or not. Forming the windings as a bifilar winding to increase coupling coefficient further improves performance and allows cancellation (as distinct from parasitic capacitance reduction) and avoidance of resonance in circuits in which an inductor is not permitted in the ground return path. Different inductance values and turns ratios of any or all inductors of the network, including multi-phase networks, may be accommodated.
    • 包括电感器的电感器件或滤波器例如电磁干扰(EMI)滤波器提供消除电感器的寄生电容,并通过使用电感器网络(特殊情况是分流绕组)来延长电感器或滤波器的高频性能,以及 包括电容器,用于耦合与电感器网络的电感器的等效并联电容(例如在电压转换器的多相电源)中的等效并联电容相对应的信号到另一个电感器端子,接地或地线返回路径 。 为差分模式和共模绕组提供寄生电容的取消,其中绕组可以感应耦合或不耦合。 将绕组形成为双线绕组以增加耦合系数进一步提高性能并允许抵消(与寄生电容降低不同)和避免在接地返回路径中不允许电感器的电路中的谐振。 可以适应网络的任何或所有电感器(包括多相网络)的不同的电感值和匝数比。
    • 83. 发明申请
    • Digital Constant On-Time Power Supply Control
    • 数字恒定导通时间电源控制
    • US20080298090A1
    • 2008-12-04
    • US11755331
    • 2007-05-30
    • Jian LiYang QiuMing XuFred C. Lee
    • Jian LiYang QiuMing XuFred C. Lee
    • H02M3/335
    • H02M3/157
    • A switched voltage regulator provides improved regulation at a lower clock rate/sampling frequency (e.g. several orders of magnitude lower than would be required for comparable regulation) while using a low resolution digital pulse width modulator such that limit cycle oscillations occur (and thus of low cost and complexity and small size) by limiting the amplitude of limit cycle oscillations which therefore need not be avoided by more complex arrangements which are not commercially feasible. Limiting of amplitude of limit cycle oscillations is achieved by adding essentially a digitized ripple voltage signal corresponding to the difference between the output of the voltage regulator and an average output of the voltage regulator as an input to the digital pulse width modulator. Performance of this arrangement may be enhanced by adding a ramp signal to the digitized ripple voltage signal and even further enhanced by limiting the ramp signal to a range which corresponds to steady state operation but not transients.
    • 开关电压调节器在使用低分辨率数字脉冲宽度调制器时,以较低的时钟频率/采样频率(例如比可比较的调节要求的数量级低几个数量级)提供改进的调节器,从而发生极限循环振荡(从而降低 成本和复杂性以及小尺寸)通过限制极限循环振荡的幅度,因此不可避免地由于商业上不可行的更复杂的布置。 极限循环振荡幅度的限制通过将基本上相当于电压调节器的输出与调压器的平均输出之间的差值相对应的数字化纹波电压信号作为数字脉宽调制器的输入来实现。 可以通过向数字化纹波电压信号添加斜坡信号并且甚至通过将斜坡信号限制到对应于稳态操作但不是瞬变的范围来进一步增强该布置的性能。
    • 85. 发明申请
    • COMMON MODE NOISE REDUCTION USING PARASITIC CAPACITANCE CANCELLATION
    • 使用PARASITIC CAPACITANCE CANCELLATION减少通用模式噪声
    • US20080204126A1
    • 2008-08-28
    • US11678864
    • 2007-02-26
    • Shuo WangFred C. Lee
    • Shuo WangFred C. Lee
    • H04B15/02
    • H04B15/02
    • A negative capacitance is developed by configuring an inductor as two inversely or opposingly coupled windings having different numbers of turns and connecting a capacitance to a center tap between the two windings. The negative capacitance is developed on the side of the inductor having the winding with the greater number of turns. The negative capacitance so developed may advantageously be used to cancel any capacitance or parasitic capacitance desired for reducing power loss, increasing switching speed or reducing or eliminating common mode noise in a swiched circuit such as a switched power converter.
    • 通过将电感器配置为具有不同匝数的两个反相或相对耦合的绕组并将电容连接到两个绕组之间的中心抽头来开发负电容。 在具有较大匝数的绕组的电感器的侧面上产生负电容。 这样显影的负电容可以有利地用于抵消所需的用于降低功率损耗,增加开关速度或降低或消除诸如开关式功率转换器的开关电路中的共模噪声所需的任何电容或寄生电容。
    • 86. 发明申请
    • HYBRID CONTROL METHODS FOR DIGITAL PULSE WIDTH MODULATOR (DPWM)
    • 数字脉宽调制器混合控制方法(DPWM)
    • US20080116871A1
    • 2008-05-22
    • US11561104
    • 2006-11-17
    • Jian LiDong S. HaYang QiuMing XuFred C. Lee
    • Jian LiDong S. HaYang QiuMing XuFred C. Lee
    • G05F1/00
    • H02M3/157
    • A digital pulse width modulator leverages clock frequency to achieve very fine duty cycle resolution by using a constant number of time slots for each state of a pulse signal and varying the number of time slots in a switching cycle within acceptable limits for variation of the switching cycle frequency or by using two relatively low frequency clocks of slightly differing frequency and selecting pulse leading and trailing edges in accordance with pulses output therefrom. A fine resolution of duty cycle adjustment can thus be provided corresponding to a much higher effective clock frequency than is actually used; allowing improvement of efficiency of clock and switching circuits, particularly in switching voltage regulator applications.
    • 数字脉冲宽度调制器利用时钟频率通过对脉冲信号的每个状态使用恒定数量的时隙来实现非常精细的占空比分辨率,并且在开关周期内将开关周期中的时隙数量改变为可接受的开关周期变化的限度内 或通过使用两个稍微不同频率的相对低频的时钟,并根据从其输出的脉冲选择脉冲前沿和后沿。 因此,可以对应于比实际使用的更高的有效时钟频率提供精确的占空比调整分辨率; 允许提高时钟和开关电路的效率,特别是在开关稳压器应用中。
    • 88. 发明授权
    • Multiphase voltage regulator having coupled inductors with reduced winding resistance
    • 具有耦合电感器的多相电压调节器具有降低的绕组电阻
    • US07199695B1
    • 2007-04-03
    • US11257404
    • 2005-10-25
    • Jinghai ZhouFred C. LeeMing XuYan Dong
    • Jinghai ZhouFred C. LeeMing XuYan Dong
    • H01F27/24
    • H01F37/00H01F29/02H02M3/1584
    • A multiple phase buck converter or boost converter, or buck-boost converter has an inductor in each phase. A magnetic core with a unique woven topology provides inverse coupling between the inductors. The inductors can comprise straight conductors since the magnetic core has the woven topology wrapped around each inductor. The inductors have a reduced electrical resistance since they are straight and do not loop around the magnetic core. The reduced electrical resistance increases energy efficiency and improves transient response of the circuit. The magnetic core can comprise top and bottom portions that are magnetically connected. The inductors can comprise straight circuit board traces and the circuit board can have holes to accommodate the magnetic core.
    • 多相降压转换器或升压转换器或降压 - 升压转换器在每相中都有一个电感。 具有独特编织拓扑的磁芯提供了电感器之间的反耦合。 电感器可以包括直导体,因为磁芯具有缠绕在每个电感器周围的编织拓扑。 电感器具有降低的电阻,因为它们是直的并且不环绕磁芯。 降低的电阻提高了能量效率并改善了电路的瞬态响应。 磁芯可以包括磁性连接的顶部和底部。 电感器可以包括直线电路板迹线,并且电路板可以具有孔以容纳磁芯。
    • 89. 发明授权
    • EMI filter and frequency filters having capacitor with inductance cancellation loop
    • EMI滤波器和具有电感消除回路的电容器的滤波器
    • US07180389B2
    • 2007-02-20
    • US11013930
    • 2004-12-17
    • Shuo WangFred C. LeeWilliem Gerhardus Odendaal
    • Shuo WangFred C. LeeWilliem Gerhardus Odendaal
    • H03H7/09
    • H04B3/28H03H7/175H03H7/1758H03H7/1766H03H7/1775H03H7/427H03H2001/005
    • An electromagnetic interference (EMI) filter or frequency filters (e.g. bandpass or band reject filters) in which a capacitor has an inductance cancellation loop. Inductive coupling between capacitors can allow undesired high frequencies to propagate across a filter. This is particularly a concern when the capacitors are oriented in parallel. In the present invention, the inductance cancellation loop is disposed adjacent to one capacitor so that mutual inductance between the capacitors is reduced. The attenuation of the filter at high frequencies is thereby increased. The loop can increase voltage attenuation of an EMI filter by about 20 dB. In another aspect, inductors in the filter are oriented horizontally relative to a circuitboard. Horizontal orientation reduces leakage inductance coupling between the inductors and circuitboard traces, and between the inductor and capacitors, thereby preventing unwanted propagation of high frequencies. Both measures in combination can provide a voltage attenuation increase of 30 dB.
    • 电磁干扰(EMI)滤波器或频率滤波器(例如带通或带阻滤波器),其中电容器具有电感消除环路。 电容器之间的感应耦合可以使不期望的高频率在滤波器上传播。 当电容器并联取向时,这尤其值得关注。 在本发明中,电感消除环路被设置成与一个电容器相邻,使得电容器之间的互感减小。 因此,高频下的滤波器的衰减增加。 该环路可以将EMI滤波器的电压衰减提高约20 dB。 在另一方面,滤波器中的电感器相对于电路板水平取向。 水平方向减小电感器和电路板走线之间以及电感器和电容器之间的漏电感耦合,从而防止高频率的不必要的传播。 组合的两种措施都可以提供30 dB的电压衰减。
    • 90. 发明授权
    • Self-driven circuit for synchronous rectifier DC/DC converter
    • 用于同步整流DC / DC转换器的自驱动电路
    • US07016203B2
    • 2006-03-21
    • US10852683
    • 2004-05-25
    • Ming XuFred C. LeeYuancheng Ren
    • Ming XuFred C. LeeYuancheng Ren
    • H02M3/335
    • H02M3/33592Y02B70/1475
    • A power converter having a primary circuit (e.g. full bridge) and a secondary circuit (e.g. current doubler) has switches in the secondary circuit that are controlled by a drive circuit. The drive circuit is connected to a swing node in the primary circuit, and is powered by the primary circuit. The drive circuit has an isolation device such as a transformer to provide electrical isolation between the primary circuit and secondary circuit. The drive circuit provides a current source for driving the secondary switch gates, thereby reducing power consumption. The present drive circuit provides clean gate drive signals without noise and oscillations. The drive circuits of the invention are simple, and require only a few components.
    • 具有主电路(例如全桥)和次级电路(例如倍频器)的功率转换器具有由驱动电路控制的次级电路中的开关。 驱动电路连接到主电路中的摆动节点,并由主电路供电。 驱动电路具有诸如变压器的隔离装置,以在主电路和次级电路之间提供电隔离。 驱动电路提供用于驱动次级开关门的电流源,从而降低功耗。 本驱动电路提供清洁的栅极驱动信号,无噪声和振荡。 本发明的驱动电路简单,仅需少量组件。